1/* 2 * Driver for the Atmel USBA high speed USB device controller 3 * 4 * Copyright (C) 2005-2007 Atmel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#ifndef __LINUX_USB_GADGET_USBA_UDC_H__ 11#define __LINUX_USB_GADGET_USBA_UDC_H__ 12 13/* USB register offsets */ 14#define USBA_CTRL 0x0000 15#define USBA_FNUM 0x0004 16#define USBA_INT_ENB 0x0010 17#define USBA_INT_STA 0x0014 18#define USBA_INT_CLR 0x0018 19#define USBA_EPT_RST 0x001c 20#define USBA_TST 0x00e0 21 22/* USB endpoint register offsets */ 23#define USBA_EPT_CFG 0x0000 24#define USBA_EPT_CTL_ENB 0x0004 25#define USBA_EPT_CTL_DIS 0x0008 26#define USBA_EPT_CTL 0x000c 27#define USBA_EPT_SET_STA 0x0014 28#define USBA_EPT_CLR_STA 0x0018 29#define USBA_EPT_STA 0x001c 30 31/* USB DMA register offsets */ 32#define USBA_DMA_NXT_DSC 0x0000 33#define USBA_DMA_ADDRESS 0x0004 34#define USBA_DMA_CONTROL 0x0008 35#define USBA_DMA_STATUS 0x000c 36 37/* Bitfields in CTRL */ 38#define USBA_DEV_ADDR_OFFSET 0 39#define USBA_DEV_ADDR_SIZE 7 40#define USBA_FADDR_EN (1 << 7) 41#define USBA_EN_USBA (1 << 8) 42#define USBA_DETACH (1 << 9) 43#define USBA_REMOTE_WAKE_UP (1 << 10) 44#define USBA_PULLD_DIS (1 << 11) 45 46#if defined(CONFIG_AVR32) 47#define USBA_ENABLE_MASK USBA_EN_USBA 48#define USBA_DISABLE_MASK 0 49#elif defined(CONFIG_ARCH_AT91) 50#define USBA_ENABLE_MASK (USBA_EN_USBA | USBA_PULLD_DIS) 51#define USBA_DISABLE_MASK USBA_DETACH 52#endif /* CONFIG_ARCH_AT91 */ 53 54/* Bitfields in FNUM */ 55#define USBA_MICRO_FRAME_NUM_OFFSET 0 56#define USBA_MICRO_FRAME_NUM_SIZE 3 57#define USBA_FRAME_NUMBER_OFFSET 3 58#define USBA_FRAME_NUMBER_SIZE 11 59#define USBA_FRAME_NUM_ERROR (1 << 31) 60 61/* Bitfields in INT_ENB/INT_STA/INT_CLR */ 62#define USBA_HIGH_SPEED (1 << 0) 63#define USBA_DET_SUSPEND (1 << 1) 64#define USBA_MICRO_SOF (1 << 2) 65#define USBA_SOF (1 << 3) 66#define USBA_END_OF_RESET (1 << 4) 67#define USBA_WAKE_UP (1 << 5) 68#define USBA_END_OF_RESUME (1 << 6) 69#define USBA_UPSTREAM_RESUME (1 << 7) 70#define USBA_EPT_INT_OFFSET 8 71#define USBA_EPT_INT_SIZE 16 72#define USBA_DMA_INT_OFFSET 24 73#define USBA_DMA_INT_SIZE 8 74 75/* Bitfields in EPT_RST */ 76#define USBA_RST_OFFSET 0 77#define USBA_RST_SIZE 16 78 79/* Bitfields in USBA_TST */ 80#define USBA_SPEED_CFG_OFFSET 0 81#define USBA_SPEED_CFG_SIZE 2 82#define USBA_TST_J_MODE (1 << 2) 83#define USBA_TST_K_MODE (1 << 3) 84#define USBA_TST_PKT_MODE (1 << 4) 85#define USBA_OPMODE2 (1 << 5) 86 87/* Bitfields in EPT_CFG */ 88#define USBA_EPT_SIZE_OFFSET 0 89#define USBA_EPT_SIZE_SIZE 3 90#define USBA_EPT_DIR_IN (1 << 3) 91#define USBA_EPT_TYPE_OFFSET 4 92#define USBA_EPT_TYPE_SIZE 2 93#define USBA_BK_NUMBER_OFFSET 6 94#define USBA_BK_NUMBER_SIZE 2 95#define USBA_NB_TRANS_OFFSET 8 96#define USBA_NB_TRANS_SIZE 2 97#define USBA_EPT_MAPPED (1 << 31) 98 99/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */ 100#define USBA_EPT_ENABLE (1 << 0) 101#define USBA_AUTO_VALID (1 << 1) 102#define USBA_INTDIS_DMA (1 << 3) 103#define USBA_NYET_DIS (1 << 4) 104#define USBA_DATAX_RX (1 << 6) 105#define USBA_MDATA_RX (1 << 7) 106/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */ 107#define USBA_BUSY_BANK_IE (1 << 18) 108 109/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */ 110#define USBA_FORCE_STALL (1 << 5) 111#define USBA_TOGGLE_CLR (1 << 6) 112#define USBA_TOGGLE_SEQ_OFFSET 6 113#define USBA_TOGGLE_SEQ_SIZE 2 114#define USBA_ERR_OVFLW (1 << 8) 115#define USBA_RX_BK_RDY (1 << 9) 116#define USBA_KILL_BANK (1 << 9) 117#define USBA_TX_COMPLETE (1 << 10) 118#define USBA_TX_PK_RDY (1 << 11) 119#define USBA_ISO_ERR_TRANS (1 << 11) 120#define USBA_RX_SETUP (1 << 12) 121#define USBA_ISO_ERR_FLOW (1 << 12) 122#define USBA_STALL_SENT (1 << 13) 123#define USBA_ISO_ERR_CRC (1 << 13) 124#define USBA_ISO_ERR_NBTRANS (1 << 13) 125#define USBA_NAK_IN (1 << 14) 126#define USBA_ISO_ERR_FLUSH (1 << 14) 127#define USBA_NAK_OUT (1 << 15) 128#define USBA_CURRENT_BANK_OFFSET 16 129#define USBA_CURRENT_BANK_SIZE 2 130#define USBA_BUSY_BANKS_OFFSET 18 131#define USBA_BUSY_BANKS_SIZE 2 132#define USBA_BYTE_COUNT_OFFSET 20 133#define USBA_BYTE_COUNT_SIZE 11 134#define USBA_SHORT_PACKET (1 << 31) 135 136/* Bitfields in DMA_CONTROL */ 137#define USBA_DMA_CH_EN (1 << 0) 138#define USBA_DMA_LINK (1 << 1) 139#define USBA_DMA_END_TR_EN (1 << 2) 140#define USBA_DMA_END_BUF_EN (1 << 3) 141#define USBA_DMA_END_TR_IE (1 << 4) 142#define USBA_DMA_END_BUF_IE (1 << 5) 143#define USBA_DMA_DESC_LOAD_IE (1 << 6) 144#define USBA_DMA_BURST_LOCK (1 << 7) 145#define USBA_DMA_BUF_LEN_OFFSET 16 146#define USBA_DMA_BUF_LEN_SIZE 16 147 148/* Bitfields in DMA_STATUS */ 149#define USBA_DMA_CH_ACTIVE (1 << 1) 150#define USBA_DMA_END_TR_ST (1 << 4) 151#define USBA_DMA_END_BUF_ST (1 << 5) 152#define USBA_DMA_DESC_LOAD_ST (1 << 6) 153 154/* Constants for SPEED_CFG */ 155#define USBA_SPEED_CFG_NORMAL 0 156#define USBA_SPEED_CFG_FORCE_HIGH 2 157#define USBA_SPEED_CFG_FORCE_FULL 3 158 159/* Constants for EPT_SIZE */ 160#define USBA_EPT_SIZE_8 0 161#define USBA_EPT_SIZE_16 1 162#define USBA_EPT_SIZE_32 2 163#define USBA_EPT_SIZE_64 3 164#define USBA_EPT_SIZE_128 4 165#define USBA_EPT_SIZE_256 5 166#define USBA_EPT_SIZE_512 6 167#define USBA_EPT_SIZE_1024 7 168 169/* Constants for EPT_TYPE */ 170#define USBA_EPT_TYPE_CONTROL 0 171#define USBA_EPT_TYPE_ISO 1 172#define USBA_EPT_TYPE_BULK 2 173#define USBA_EPT_TYPE_INT 3 174 175/* Constants for BK_NUMBER */ 176#define USBA_BK_NUMBER_ZERO 0 177#define USBA_BK_NUMBER_ONE 1 178#define USBA_BK_NUMBER_DOUBLE 2 179#define USBA_BK_NUMBER_TRIPLE 3 180 181/* Bit manipulation macros */ 182#define USBA_BF(name, value) \ 183 (((value) & ((1 << USBA_##name##_SIZE) - 1)) \ 184 << USBA_##name##_OFFSET) 185#define USBA_BFEXT(name, value) \ 186 (((value) >> USBA_##name##_OFFSET) \ 187 & ((1 << USBA_##name##_SIZE) - 1)) 188#define USBA_BFINS(name, value, old) \ 189 (((old) & ~(((1 << USBA_##name##_SIZE) - 1) \ 190 << USBA_##name##_OFFSET)) \ 191 | USBA_BF(name, value)) 192 193/* Register access macros */ 194#define usba_readl(udc, reg) \ 195 __raw_readl((udc)->regs + USBA_##reg) 196#define usba_writel(udc, reg, value) \ 197 __raw_writel((value), (udc)->regs + USBA_##reg) 198#define usba_ep_readl(ep, reg) \ 199 __raw_readl((ep)->ep_regs + USBA_EPT_##reg) 200#define usba_ep_writel(ep, reg, value) \ 201 __raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg) 202#define usba_dma_readl(ep, reg) \ 203 __raw_readl((ep)->dma_regs + USBA_DMA_##reg) 204#define usba_dma_writel(ep, reg, value) \ 205 __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg) 206 207/* Calculate base address for a given endpoint or DMA controller */ 208#define USBA_EPT_BASE(x) (0x100 + (x) * 0x20) 209#define USBA_DMA_BASE(x) (0x300 + (x) * 0x10) 210#define USBA_FIFO_BASE(x) ((x) << 16) 211 212/* Synth parameters */ 213#define USBA_NR_ENDPOINTS 7 214 215#define EP0_FIFO_SIZE 64 216#define EP0_EPT_SIZE USBA_EPT_SIZE_64 217#define EP0_NR_BANKS 1 218 219/* 220 * REVISIT: Try to eliminate this value. Can we rely on req->mapped to 221 * provide this information? 222 */ 223#define DMA_ADDR_INVALID (~(dma_addr_t)0) 224 225#define FIFO_IOMEM_ID 0 226#define CTRL_IOMEM_ID 1 227 228#define DBG_ERR 0x0001 /* report all error returns */ 229#define DBG_HW 0x0002 /* debug hardware initialization */ 230#define DBG_GADGET 0x0004 /* calls to/from gadget driver */ 231#define DBG_INT 0x0008 /* interrupts */ 232#define DBG_BUS 0x0010 /* report changes in bus state */ 233#define DBG_QUEUE 0x0020 /* debug request queue processing */ 234#define DBG_FIFO 0x0040 /* debug FIFO contents */ 235#define DBG_DMA 0x0080 /* debug DMA handling */ 236#define DBG_REQ 0x0100 /* print out queued request length */ 237#define DBG_ALL 0xffff 238#define DBG_NONE 0x0000 239 240#define DEBUG_LEVEL (DBG_ERR) 241 242#define DBG(level, fmt, ...) \ 243 do { \ 244 if ((level) & DEBUG_LEVEL) \ 245 pr_debug("udc: " fmt, ## __VA_ARGS__); \ 246 } while (0) 247 248enum usba_ctrl_state { 249 WAIT_FOR_SETUP, 250 DATA_STAGE_IN, 251 DATA_STAGE_OUT, 252 STATUS_STAGE_IN, 253 STATUS_STAGE_OUT, 254 STATUS_STAGE_ADDR, 255 STATUS_STAGE_TEST, 256}; 257/* 258 EP_STATE_IDLE, 259 EP_STATE_SETUP, 260 EP_STATE_IN_DATA, 261 EP_STATE_OUT_DATA, 262 EP_STATE_SET_ADDR_STATUS, 263 EP_STATE_RX_STATUS, 264 EP_STATE_TX_STATUS, 265 EP_STATE_HALT, 266*/ 267 268struct usba_dma_desc { 269 dma_addr_t next; 270 dma_addr_t addr; 271 u32 ctrl; 272}; 273 274struct usba_ep { 275 int state; 276 void __iomem *ep_regs; 277 void __iomem *dma_regs; 278 void __iomem *fifo; 279 struct usb_ep ep; 280 struct usba_udc *udc; 281 282 struct list_head queue; 283 const struct usb_endpoint_descriptor *desc; 284 285 u16 fifo_size; 286 u8 nr_banks; 287 u8 index; 288 unsigned int can_dma:1; 289 unsigned int can_isoc:1; 290 unsigned int is_isoc:1; 291 unsigned int is_in:1; 292 293#ifdef CONFIG_USB_GADGET_DEBUG_FS 294 u32 last_dma_status; 295 struct dentry *debugfs_dir; 296 struct dentry *debugfs_queue; 297 struct dentry *debugfs_dma_status; 298 struct dentry *debugfs_state; 299#endif 300}; 301 302struct usba_request { 303 struct usb_request req; 304 struct list_head queue; 305 306 u32 ctrl; 307 308 unsigned int submitted:1; 309 unsigned int last_transaction:1; 310 unsigned int using_dma:1; 311 unsigned int mapped:1; 312}; 313 314struct usba_udc { 315 /* Protect hw registers from concurrent modifications */ 316 spinlock_t lock; 317 318 void __iomem *regs; 319 void __iomem *fifo; 320 321 struct usb_gadget gadget; 322 struct usb_gadget_driver *driver; 323 struct platform_device *pdev; 324 int irq; 325 int vbus_pin; 326 int vbus_pin_inverted; 327 struct clk *pclk; 328 struct clk *hclk; 329 330 u16 devstatus; 331 332 u16 test_mode; 333 int vbus_prev; 334 335#ifdef CONFIG_USB_GADGET_DEBUG_FS 336 struct dentry *debugfs_root; 337 struct dentry *debugfs_regs; 338#endif 339}; 340 341static inline struct usba_ep *to_usba_ep(struct usb_ep *ep) 342{ 343 return container_of(ep, struct usba_ep, ep); 344} 345 346static inline struct usba_request *to_usba_req(struct usb_request *req) 347{ 348 return container_of(req, struct usba_request, req); 349} 350 351static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget) 352{ 353 return container_of(gadget, struct usba_udc, gadget); 354} 355 356#define ep_is_control(ep) ((ep)->index == 0) 357#define ep_is_idle(ep) ((ep)->state == EP_STATE_IDLE) 358 359#endif /* __LINUX_USB_GADGET_USBA_UDC_H */ 360