1/* 2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers 3 * 4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) 5 * Copyright (C) 2003 Robert Schwebel, Pengutronix 6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix 7 * Copyright (C) 2003 David Brownell 8 * Copyright (C) 2003 Joshua Wise 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 */ 15 16/* #define VERBOSE_DEBUG */ 17 18#include <linux/device.h> 19#include <linux/module.h> 20#include <linux/kernel.h> 21#include <linux/ioport.h> 22#include <linux/types.h> 23#include <linux/errno.h> 24#include <linux/delay.h> 25#include <linux/slab.h> 26#include <linux/init.h> 27#include <linux/timer.h> 28#include <linux/list.h> 29#include <linux/interrupt.h> 30#include <linux/mm.h> 31#include <linux/platform_device.h> 32#include <linux/dma-mapping.h> 33#include <linux/irq.h> 34#include <linux/clk.h> 35#include <linux/err.h> 36#include <linux/seq_file.h> 37#include <linux/debugfs.h> 38#include <linux/io.h> 39#include <linux/prefetch.h> 40 41#include <asm/byteorder.h> 42#include <asm/dma.h> 43#include <asm/gpio.h> 44#include <asm/mach-types.h> 45#include <asm/unaligned.h> 46 47#include <linux/usb/ch9.h> 48#include <linux/usb/gadget.h> 49#include <linux/usb/otg.h> 50 51/* 52 * This driver is PXA25x only. Grab the right register definitions. 53 */ 54#ifdef CONFIG_ARCH_PXA 55#include <mach/pxa25x-udc.h> 56#endif 57 58#ifdef CONFIG_ARCH_LUBBOCK 59#include <mach/lubbock.h> 60#endif 61 62#include <asm/mach/udc_pxa2xx.h> 63 64 65/* 66 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x 67 * series processors. The UDC for the IXP 4xx series is very similar. 68 * There are fifteen endpoints, in addition to ep0. 69 * 70 * Such controller drivers work with a gadget driver. The gadget driver 71 * returns descriptors, implements configuration and data protocols used 72 * by the host to interact with this device, and allocates endpoints to 73 * the different protocol interfaces. The controller driver virtualizes 74 * usb hardware so that the gadget drivers will be more portable. 75 * 76 * This UDC hardware wants to implement a bit too much USB protocol, so 77 * it constrains the sorts of USB configuration change events that work. 78 * The errata for these chips are misleading; some "fixed" bugs from 79 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there. 80 * 81 * Note that the UDC hardware supports DMA (except on IXP) but that's 82 * not used here. IN-DMA (to host) is simple enough, when the data is 83 * suitably aligned (16 bytes) ... the network stack doesn't do that, 84 * other software can. OUT-DMA is buggy in most chip versions, as well 85 * as poorly designed (data toggle not automatic). So this driver won't 86 * bother using DMA. (Mostly-working IN-DMA support was available in 87 * kernels before 2.6.23, but was never enabled or well tested.) 88 */ 89 90#define DRIVER_VERSION "30-June-2007" 91#define DRIVER_DESC "PXA 25x USB Device Controller driver" 92 93 94static const char driver_name [] = "pxa25x_udc"; 95 96static const char ep0name [] = "ep0"; 97 98 99#ifdef CONFIG_ARCH_IXP4XX 100 101/* cpu-specific register addresses are compiled in to this code */ 102#ifdef CONFIG_ARCH_PXA 103#error "Can't configure both IXP and PXA" 104#endif 105 106/* IXP doesn't yet support <linux/clk.h> */ 107#define clk_get(dev,name) NULL 108#define clk_enable(clk) do { } while (0) 109#define clk_disable(clk) do { } while (0) 110#define clk_put(clk) do { } while (0) 111 112#endif 113 114#include "pxa25x_udc.h" 115 116 117#ifdef CONFIG_USB_PXA25X_SMALL 118#define SIZE_STR " (small)" 119#else 120#define SIZE_STR "" 121#endif 122 123/* --------------------------------------------------------------------------- 124 * endpoint related parts of the api to the usb controller hardware, 125 * used by gadget driver; and the inner talker-to-hardware core. 126 * --------------------------------------------------------------------------- 127 */ 128 129static void pxa25x_ep_fifo_flush (struct usb_ep *ep); 130static void nuke (struct pxa25x_ep *, int status); 131 132/* one GPIO should control a D+ pullup, so host sees this device (or not) */ 133static void pullup_off(void) 134{ 135 struct pxa2xx_udc_mach_info *mach = the_controller->mach; 136 int off_level = mach->gpio_pullup_inverted; 137 138 if (gpio_is_valid(mach->gpio_pullup)) 139 gpio_set_value(mach->gpio_pullup, off_level); 140 else if (mach->udc_command) 141 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT); 142} 143 144static void pullup_on(void) 145{ 146 struct pxa2xx_udc_mach_info *mach = the_controller->mach; 147 int on_level = !mach->gpio_pullup_inverted; 148 149 if (gpio_is_valid(mach->gpio_pullup)) 150 gpio_set_value(mach->gpio_pullup, on_level); 151 else if (mach->udc_command) 152 mach->udc_command(PXA2XX_UDC_CMD_CONNECT); 153} 154 155static void pio_irq_enable(int bEndpointAddress) 156{ 157 bEndpointAddress &= 0xf; 158 if (bEndpointAddress < 8) 159 UICR0 &= ~(1 << bEndpointAddress); 160 else { 161 bEndpointAddress -= 8; 162 UICR1 &= ~(1 << bEndpointAddress); 163 } 164} 165 166static void pio_irq_disable(int bEndpointAddress) 167{ 168 bEndpointAddress &= 0xf; 169 if (bEndpointAddress < 8) 170 UICR0 |= 1 << bEndpointAddress; 171 else { 172 bEndpointAddress -= 8; 173 UICR1 |= 1 << bEndpointAddress; 174 } 175} 176 177/* The UDCCR reg contains mask and interrupt status bits, 178 * so using '|=' isn't safe as it may ack an interrupt. 179 */ 180#define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE) 181 182static inline void udc_set_mask_UDCCR(int mask) 183{ 184 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS); 185} 186 187static inline void udc_clear_mask_UDCCR(int mask) 188{ 189 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS); 190} 191 192static inline void udc_ack_int_UDCCR(int mask) 193{ 194 /* udccr contains the bits we dont want to change */ 195 __u32 udccr = UDCCR & UDCCR_MASK_BITS; 196 197 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS); 198} 199 200/* 201 * endpoint enable/disable 202 * 203 * we need to verify the descriptors used to enable endpoints. since pxa25x 204 * endpoint configurations are fixed, and are pretty much always enabled, 205 * there's not a lot to manage here. 206 * 207 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints, 208 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except 209 * for a single interface (with only the default altsetting) and for gadget 210 * drivers that don't halt endpoints (not reset by set_interface). that also 211 * means that if you use ISO, you must violate the USB spec rule that all 212 * iso endpoints must be in non-default altsettings. 213 */ 214static int pxa25x_ep_enable (struct usb_ep *_ep, 215 const struct usb_endpoint_descriptor *desc) 216{ 217 struct pxa25x_ep *ep; 218 struct pxa25x_udc *dev; 219 220 ep = container_of (_ep, struct pxa25x_ep, ep); 221 if (!_ep || !desc || ep->desc || _ep->name == ep0name 222 || desc->bDescriptorType != USB_DT_ENDPOINT 223 || ep->bEndpointAddress != desc->bEndpointAddress 224 || ep->fifo_size < usb_endpoint_maxp (desc)) { 225 DMSG("%s, bad ep or descriptor\n", __func__); 226 return -EINVAL; 227 } 228 229 /* xfer types must match, except that interrupt ~= bulk */ 230 if (ep->bmAttributes != desc->bmAttributes 231 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK 232 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { 233 DMSG("%s, %s type mismatch\n", __func__, _ep->name); 234 return -EINVAL; 235 } 236 237 /* hardware _could_ do smaller, but driver doesn't */ 238 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK 239 && usb_endpoint_maxp (desc) 240 != BULK_FIFO_SIZE) 241 || !desc->wMaxPacketSize) { 242 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name); 243 return -ERANGE; 244 } 245 246 dev = ep->dev; 247 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { 248 DMSG("%s, bogus device state\n", __func__); 249 return -ESHUTDOWN; 250 } 251 252 ep->desc = desc; 253 ep->stopped = 0; 254 ep->pio_irqs = 0; 255 ep->ep.maxpacket = usb_endpoint_maxp (desc); 256 257 /* flush fifo (mostly for OUT buffers) */ 258 pxa25x_ep_fifo_flush (_ep); 259 260 /* ... reset halt state too, if we could ... */ 261 262 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name); 263 return 0; 264} 265 266static int pxa25x_ep_disable (struct usb_ep *_ep) 267{ 268 struct pxa25x_ep *ep; 269 unsigned long flags; 270 271 ep = container_of (_ep, struct pxa25x_ep, ep); 272 if (!_ep || !ep->desc) { 273 DMSG("%s, %s not enabled\n", __func__, 274 _ep ? ep->ep.name : NULL); 275 return -EINVAL; 276 } 277 local_irq_save(flags); 278 279 nuke (ep, -ESHUTDOWN); 280 281 /* flush fifo (mostly for IN buffers) */ 282 pxa25x_ep_fifo_flush (_ep); 283 284 ep->desc = NULL; 285 ep->ep.desc = NULL; 286 ep->stopped = 1; 287 288 local_irq_restore(flags); 289 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name); 290 return 0; 291} 292 293/*-------------------------------------------------------------------------*/ 294 295/* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers 296 * must still pass correctly initialized endpoints, since other controller 297 * drivers may care about how it's currently set up (dma issues etc). 298 */ 299 300/* 301 * pxa25x_ep_alloc_request - allocate a request data structure 302 */ 303static struct usb_request * 304pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags) 305{ 306 struct pxa25x_request *req; 307 308 req = kzalloc(sizeof(*req), gfp_flags); 309 if (!req) 310 return NULL; 311 312 INIT_LIST_HEAD (&req->queue); 313 return &req->req; 314} 315 316 317/* 318 * pxa25x_ep_free_request - deallocate a request data structure 319 */ 320static void 321pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req) 322{ 323 struct pxa25x_request *req; 324 325 req = container_of (_req, struct pxa25x_request, req); 326 WARN_ON(!list_empty (&req->queue)); 327 kfree(req); 328} 329 330/*-------------------------------------------------------------------------*/ 331 332/* 333 * done - retire a request; caller blocked irqs 334 */ 335static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status) 336{ 337 unsigned stopped = ep->stopped; 338 339 list_del_init(&req->queue); 340 341 if (likely (req->req.status == -EINPROGRESS)) 342 req->req.status = status; 343 else 344 status = req->req.status; 345 346 if (status && status != -ESHUTDOWN) 347 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n", 348 ep->ep.name, &req->req, status, 349 req->req.actual, req->req.length); 350 351 /* don't modify queue heads during completion callback */ 352 ep->stopped = 1; 353 req->req.complete(&ep->ep, &req->req); 354 ep->stopped = stopped; 355} 356 357 358static inline void ep0_idle (struct pxa25x_udc *dev) 359{ 360 dev->ep0state = EP0_IDLE; 361} 362 363static int 364write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max) 365{ 366 u8 *buf; 367 unsigned length, count; 368 369 buf = req->req.buf + req->req.actual; 370 prefetch(buf); 371 372 /* how big will this packet be? */ 373 length = min(req->req.length - req->req.actual, max); 374 req->req.actual += length; 375 376 count = length; 377 while (likely(count--)) 378 *uddr = *buf++; 379 380 return length; 381} 382 383/* 384 * write to an IN endpoint fifo, as many packets as possible. 385 * irqs will use this to write the rest later. 386 * caller guarantees at least one packet buffer is ready (or a zlp). 387 */ 388static int 389write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 390{ 391 unsigned max; 392 393 max = usb_endpoint_maxp(ep->desc); 394 do { 395 unsigned count; 396 int is_last, is_short; 397 398 count = write_packet(ep->reg_uddr, req, max); 399 400 /* last packet is usually short (or a zlp) */ 401 if (unlikely (count != max)) 402 is_last = is_short = 1; 403 else { 404 if (likely(req->req.length != req->req.actual) 405 || req->req.zero) 406 is_last = 0; 407 else 408 is_last = 1; 409 /* interrupt/iso maxpacket may not fill the fifo */ 410 is_short = unlikely (max < ep->fifo_size); 411 } 412 413 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n", 414 ep->ep.name, count, 415 is_last ? "/L" : "", is_short ? "/S" : "", 416 req->req.length - req->req.actual, req); 417 418 /* let loose that packet. maybe try writing another one, 419 * double buffering might work. TSP, TPC, and TFS 420 * bit values are the same for all normal IN endpoints. 421 */ 422 *ep->reg_udccs = UDCCS_BI_TPC; 423 if (is_short) 424 *ep->reg_udccs = UDCCS_BI_TSP; 425 426 /* requests complete when all IN data is in the FIFO */ 427 if (is_last) { 428 done (ep, req, 0); 429 if (list_empty(&ep->queue)) 430 pio_irq_disable (ep->bEndpointAddress); 431 return 1; 432 } 433 434 // TODO experiment: how robust can fifo mode tweaking be? 435 // double buffering is off in the default fifo mode, which 436 // prevents TFS from being set here. 437 438 } while (*ep->reg_udccs & UDCCS_BI_TFS); 439 return 0; 440} 441 442/* caller asserts req->pending (ep0 irq status nyet cleared); starts 443 * ep0 data stage. these chips want very simple state transitions. 444 */ 445static inline 446void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag) 447{ 448 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR; 449 USIR0 = USIR0_IR0; 450 dev->req_pending = 0; 451 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n", 452 __func__, tag, UDCCS0, flags); 453} 454 455static int 456write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 457{ 458 unsigned count; 459 int is_short; 460 461 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE); 462 ep->dev->stats.write.bytes += count; 463 464 /* last packet "must be" short (or a zlp) */ 465 is_short = (count != EP0_FIFO_SIZE); 466 467 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count, 468 req->req.length - req->req.actual, req); 469 470 if (unlikely (is_short)) { 471 if (ep->dev->req_pending) 472 ep0start(ep->dev, UDCCS0_IPR, "short IN"); 473 else 474 UDCCS0 = UDCCS0_IPR; 475 476 count = req->req.length; 477 done (ep, req, 0); 478 ep0_idle(ep->dev); 479#ifndef CONFIG_ARCH_IXP4XX 480#if 1 481 /* This seems to get rid of lost status irqs in some cases: 482 * host responds quickly, or next request involves config 483 * change automagic, or should have been hidden, or ... 484 * 485 * FIXME get rid of all udelays possible... 486 */ 487 if (count >= EP0_FIFO_SIZE) { 488 count = 100; 489 do { 490 if ((UDCCS0 & UDCCS0_OPR) != 0) { 491 /* clear OPR, generate ack */ 492 UDCCS0 = UDCCS0_OPR; 493 break; 494 } 495 count--; 496 udelay(1); 497 } while (count); 498 } 499#endif 500#endif 501 } else if (ep->dev->req_pending) 502 ep0start(ep->dev, 0, "IN"); 503 return is_short; 504} 505 506 507/* 508 * read_fifo - unload packet(s) from the fifo we use for usb OUT 509 * transfers and put them into the request. caller should have made 510 * sure there's at least one packet ready. 511 * 512 * returns true if the request completed because of short packet or the 513 * request buffer having filled (and maybe overran till end-of-packet). 514 */ 515static int 516read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 517{ 518 for (;;) { 519 u32 udccs; 520 u8 *buf; 521 unsigned bufferspace, count, is_short; 522 523 /* make sure there's a packet in the FIFO. 524 * UDCCS_{BO,IO}_RPC are all the same bit value. 525 * UDCCS_{BO,IO}_RNE are all the same bit value. 526 */ 527 udccs = *ep->reg_udccs; 528 if (unlikely ((udccs & UDCCS_BO_RPC) == 0)) 529 break; 530 buf = req->req.buf + req->req.actual; 531 prefetchw(buf); 532 bufferspace = req->req.length - req->req.actual; 533 534 /* read all bytes from this packet */ 535 if (likely (udccs & UDCCS_BO_RNE)) { 536 count = 1 + (0x0ff & *ep->reg_ubcr); 537 req->req.actual += min (count, bufferspace); 538 } else /* zlp */ 539 count = 0; 540 is_short = (count < ep->ep.maxpacket); 541 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n", 542 ep->ep.name, udccs, count, 543 is_short ? "/S" : "", 544 req, req->req.actual, req->req.length); 545 while (likely (count-- != 0)) { 546 u8 byte = (u8) *ep->reg_uddr; 547 548 if (unlikely (bufferspace == 0)) { 549 /* this happens when the driver's buffer 550 * is smaller than what the host sent. 551 * discard the extra data. 552 */ 553 if (req->req.status != -EOVERFLOW) 554 DMSG("%s overflow %d\n", 555 ep->ep.name, count); 556 req->req.status = -EOVERFLOW; 557 } else { 558 *buf++ = byte; 559 bufferspace--; 560 } 561 } 562 *ep->reg_udccs = UDCCS_BO_RPC; 563 /* RPC/RSP/RNE could now reflect the other packet buffer */ 564 565 /* iso is one request per packet */ 566 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { 567 if (udccs & UDCCS_IO_ROF) 568 req->req.status = -EHOSTUNREACH; 569 /* more like "is_done" */ 570 is_short = 1; 571 } 572 573 /* completion */ 574 if (is_short || req->req.actual == req->req.length) { 575 done (ep, req, 0); 576 if (list_empty(&ep->queue)) 577 pio_irq_disable (ep->bEndpointAddress); 578 return 1; 579 } 580 581 /* finished that packet. the next one may be waiting... */ 582 } 583 return 0; 584} 585 586/* 587 * special ep0 version of the above. no UBCR0 or double buffering; status 588 * handshaking is magic. most device protocols don't need control-OUT. 589 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other 590 * protocols do use them. 591 */ 592static int 593read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 594{ 595 u8 *buf, byte; 596 unsigned bufferspace; 597 598 buf = req->req.buf + req->req.actual; 599 bufferspace = req->req.length - req->req.actual; 600 601 while (UDCCS0 & UDCCS0_RNE) { 602 byte = (u8) UDDR0; 603 604 if (unlikely (bufferspace == 0)) { 605 /* this happens when the driver's buffer 606 * is smaller than what the host sent. 607 * discard the extra data. 608 */ 609 if (req->req.status != -EOVERFLOW) 610 DMSG("%s overflow\n", ep->ep.name); 611 req->req.status = -EOVERFLOW; 612 } else { 613 *buf++ = byte; 614 req->req.actual++; 615 bufferspace--; 616 } 617 } 618 619 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR; 620 621 /* completion */ 622 if (req->req.actual >= req->req.length) 623 return 1; 624 625 /* finished that packet. the next one may be waiting... */ 626 return 0; 627} 628 629/*-------------------------------------------------------------------------*/ 630 631static int 632pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) 633{ 634 struct pxa25x_request *req; 635 struct pxa25x_ep *ep; 636 struct pxa25x_udc *dev; 637 unsigned long flags; 638 639 req = container_of(_req, struct pxa25x_request, req); 640 if (unlikely (!_req || !_req->complete || !_req->buf 641 || !list_empty(&req->queue))) { 642 DMSG("%s, bad params\n", __func__); 643 return -EINVAL; 644 } 645 646 ep = container_of(_ep, struct pxa25x_ep, ep); 647 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) { 648 DMSG("%s, bad ep\n", __func__); 649 return -EINVAL; 650 } 651 652 dev = ep->dev; 653 if (unlikely (!dev->driver 654 || dev->gadget.speed == USB_SPEED_UNKNOWN)) { 655 DMSG("%s, bogus device state\n", __func__); 656 return -ESHUTDOWN; 657 } 658 659 /* iso is always one packet per request, that's the only way 660 * we can report per-packet status. that also helps with dma. 661 */ 662 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC 663 && req->req.length > usb_endpoint_maxp (ep->desc))) 664 return -EMSGSIZE; 665 666 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n", 667 _ep->name, _req, _req->length, _req->buf); 668 669 local_irq_save(flags); 670 671 _req->status = -EINPROGRESS; 672 _req->actual = 0; 673 674 /* kickstart this i/o queue? */ 675 if (list_empty(&ep->queue) && !ep->stopped) { 676 if (ep->desc == NULL/* ep0 */) { 677 unsigned length = _req->length; 678 679 switch (dev->ep0state) { 680 case EP0_IN_DATA_PHASE: 681 dev->stats.write.ops++; 682 if (write_ep0_fifo(ep, req)) 683 req = NULL; 684 break; 685 686 case EP0_OUT_DATA_PHASE: 687 dev->stats.read.ops++; 688 /* messy ... */ 689 if (dev->req_config) { 690 DBG(DBG_VERBOSE, "ep0 config ack%s\n", 691 dev->has_cfr ? "" : " raced"); 692 if (dev->has_cfr) 693 UDCCFR = UDCCFR_AREN|UDCCFR_ACM 694 |UDCCFR_MB1; 695 done(ep, req, 0); 696 dev->ep0state = EP0_END_XFER; 697 local_irq_restore (flags); 698 return 0; 699 } 700 if (dev->req_pending) 701 ep0start(dev, UDCCS0_IPR, "OUT"); 702 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0 703 && read_ep0_fifo(ep, req))) { 704 ep0_idle(dev); 705 done(ep, req, 0); 706 req = NULL; 707 } 708 break; 709 710 default: 711 DMSG("ep0 i/o, odd state %d\n", dev->ep0state); 712 local_irq_restore (flags); 713 return -EL2HLT; 714 } 715 /* can the FIFO can satisfy the request immediately? */ 716 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { 717 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0 718 && write_fifo(ep, req)) 719 req = NULL; 720 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0 721 && read_fifo(ep, req)) { 722 req = NULL; 723 } 724 725 if (likely (req && ep->desc)) 726 pio_irq_enable(ep->bEndpointAddress); 727 } 728 729 /* pio or dma irq handler advances the queue. */ 730 if (likely(req != NULL)) 731 list_add_tail(&req->queue, &ep->queue); 732 local_irq_restore(flags); 733 734 return 0; 735} 736 737 738/* 739 * nuke - dequeue ALL requests 740 */ 741static void nuke(struct pxa25x_ep *ep, int status) 742{ 743 struct pxa25x_request *req; 744 745 /* called with irqs blocked */ 746 while (!list_empty(&ep->queue)) { 747 req = list_entry(ep->queue.next, 748 struct pxa25x_request, 749 queue); 750 done(ep, req, status); 751 } 752 if (ep->desc) 753 pio_irq_disable (ep->bEndpointAddress); 754} 755 756 757/* dequeue JUST ONE request */ 758static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 759{ 760 struct pxa25x_ep *ep; 761 struct pxa25x_request *req; 762 unsigned long flags; 763 764 ep = container_of(_ep, struct pxa25x_ep, ep); 765 if (!_ep || ep->ep.name == ep0name) 766 return -EINVAL; 767 768 local_irq_save(flags); 769 770 /* make sure it's actually queued on this endpoint */ 771 list_for_each_entry (req, &ep->queue, queue) { 772 if (&req->req == _req) 773 break; 774 } 775 if (&req->req != _req) { 776 local_irq_restore(flags); 777 return -EINVAL; 778 } 779 780 done(ep, req, -ECONNRESET); 781 782 local_irq_restore(flags); 783 return 0; 784} 785 786/*-------------------------------------------------------------------------*/ 787 788static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value) 789{ 790 struct pxa25x_ep *ep; 791 unsigned long flags; 792 793 ep = container_of(_ep, struct pxa25x_ep, ep); 794 if (unlikely (!_ep 795 || (!ep->desc && ep->ep.name != ep0name)) 796 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { 797 DMSG("%s, bad ep\n", __func__); 798 return -EINVAL; 799 } 800 if (value == 0) { 801 /* this path (reset toggle+halt) is needed to implement 802 * SET_INTERFACE on normal hardware. but it can't be 803 * done from software on the PXA UDC, and the hardware 804 * forgets to do it as part of SET_INTERFACE automagic. 805 */ 806 DMSG("only host can clear %s halt\n", _ep->name); 807 return -EROFS; 808 } 809 810 local_irq_save(flags); 811 812 if ((ep->bEndpointAddress & USB_DIR_IN) != 0 813 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0 814 || !list_empty(&ep->queue))) { 815 local_irq_restore(flags); 816 return -EAGAIN; 817 } 818 819 /* FST bit is the same for control, bulk in, bulk out, interrupt in */ 820 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF; 821 822 /* ep0 needs special care */ 823 if (!ep->desc) { 824 start_watchdog(ep->dev); 825 ep->dev->req_pending = 0; 826 ep->dev->ep0state = EP0_STALL; 827 828 /* and bulk/intr endpoints like dropping stalls too */ 829 } else { 830 unsigned i; 831 for (i = 0; i < 1000; i += 20) { 832 if (*ep->reg_udccs & UDCCS_BI_SST) 833 break; 834 udelay(20); 835 } 836 } 837 local_irq_restore(flags); 838 839 DBG(DBG_VERBOSE, "%s halt\n", _ep->name); 840 return 0; 841} 842 843static int pxa25x_ep_fifo_status(struct usb_ep *_ep) 844{ 845 struct pxa25x_ep *ep; 846 847 ep = container_of(_ep, struct pxa25x_ep, ep); 848 if (!_ep) { 849 DMSG("%s, bad ep\n", __func__); 850 return -ENODEV; 851 } 852 /* pxa can't report unclaimed bytes from IN fifos */ 853 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) 854 return -EOPNOTSUPP; 855 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN 856 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0) 857 return 0; 858 else 859 return (*ep->reg_ubcr & 0xfff) + 1; 860} 861 862static void pxa25x_ep_fifo_flush(struct usb_ep *_ep) 863{ 864 struct pxa25x_ep *ep; 865 866 ep = container_of(_ep, struct pxa25x_ep, ep); 867 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) { 868 DMSG("%s, bad ep\n", __func__); 869 return; 870 } 871 872 /* toggle and halt bits stay unchanged */ 873 874 /* for OUT, just read and discard the FIFO contents. */ 875 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) { 876 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0) 877 (void) *ep->reg_uddr; 878 return; 879 } 880 881 /* most IN status is the same, but ISO can't stall */ 882 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR 883 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC 884 ? 0 : UDCCS_BI_SST); 885} 886 887 888static struct usb_ep_ops pxa25x_ep_ops = { 889 .enable = pxa25x_ep_enable, 890 .disable = pxa25x_ep_disable, 891 892 .alloc_request = pxa25x_ep_alloc_request, 893 .free_request = pxa25x_ep_free_request, 894 895 .queue = pxa25x_ep_queue, 896 .dequeue = pxa25x_ep_dequeue, 897 898 .set_halt = pxa25x_ep_set_halt, 899 .fifo_status = pxa25x_ep_fifo_status, 900 .fifo_flush = pxa25x_ep_fifo_flush, 901}; 902 903 904/* --------------------------------------------------------------------------- 905 * device-scoped parts of the api to the usb controller hardware 906 * --------------------------------------------------------------------------- 907 */ 908 909static int pxa25x_udc_get_frame(struct usb_gadget *_gadget) 910{ 911 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff); 912} 913 914static int pxa25x_udc_wakeup(struct usb_gadget *_gadget) 915{ 916 /* host may not have enabled remote wakeup */ 917 if ((UDCCS0 & UDCCS0_DRWF) == 0) 918 return -EHOSTUNREACH; 919 udc_set_mask_UDCCR(UDCCR_RSM); 920 return 0; 921} 922 923static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *); 924static void udc_enable (struct pxa25x_udc *); 925static void udc_disable(struct pxa25x_udc *); 926 927/* We disable the UDC -- and its 48 MHz clock -- whenever it's not 928 * in active use. 929 */ 930static int pullup(struct pxa25x_udc *udc) 931{ 932 int is_active = udc->vbus && udc->pullup && !udc->suspended; 933 DMSG("%s\n", is_active ? "active" : "inactive"); 934 if (is_active) { 935 if (!udc->active) { 936 udc->active = 1; 937 /* Enable clock for USB device */ 938 clk_enable(udc->clk); 939 udc_enable(udc); 940 } 941 } else { 942 if (udc->active) { 943 if (udc->gadget.speed != USB_SPEED_UNKNOWN) { 944 DMSG("disconnect %s\n", udc->driver 945 ? udc->driver->driver.name 946 : "(no driver)"); 947 stop_activity(udc, udc->driver); 948 } 949 udc_disable(udc); 950 /* Disable clock for USB device */ 951 clk_disable(udc->clk); 952 udc->active = 0; 953 } 954 955 } 956 return 0; 957} 958 959/* VBUS reporting logically comes from a transceiver */ 960static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 961{ 962 struct pxa25x_udc *udc; 963 964 udc = container_of(_gadget, struct pxa25x_udc, gadget); 965 udc->vbus = is_active; 966 DMSG("vbus %s\n", is_active ? "supplied" : "inactive"); 967 pullup(udc); 968 return 0; 969} 970 971/* drivers may have software control over D+ pullup */ 972static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active) 973{ 974 struct pxa25x_udc *udc; 975 976 udc = container_of(_gadget, struct pxa25x_udc, gadget); 977 978 /* not all boards support pullup control */ 979 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command) 980 return -EOPNOTSUPP; 981 982 udc->pullup = (is_active != 0); 983 pullup(udc); 984 return 0; 985} 986 987/* boards may consume current from VBUS, up to 100-500mA based on config. 988 * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs 989 * violate USB specs. 990 */ 991static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA) 992{ 993 struct pxa25x_udc *udc; 994 995 udc = container_of(_gadget, struct pxa25x_udc, gadget); 996 997 if (udc->transceiver) 998 return usb_phy_set_power(udc->transceiver, mA); 999 return -EOPNOTSUPP; 1000} 1001 1002static int pxa25x_start(struct usb_gadget_driver *driver, 1003 int (*bind)(struct usb_gadget *)); 1004static int pxa25x_stop(struct usb_gadget_driver *driver); 1005 1006static const struct usb_gadget_ops pxa25x_udc_ops = { 1007 .get_frame = pxa25x_udc_get_frame, 1008 .wakeup = pxa25x_udc_wakeup, 1009 .vbus_session = pxa25x_udc_vbus_session, 1010 .pullup = pxa25x_udc_pullup, 1011 .vbus_draw = pxa25x_udc_vbus_draw, 1012 .start = pxa25x_start, 1013 .stop = pxa25x_stop, 1014}; 1015 1016/*-------------------------------------------------------------------------*/ 1017 1018#ifdef CONFIG_USB_GADGET_DEBUG_FS 1019 1020static int 1021udc_seq_show(struct seq_file *m, void *_d) 1022{ 1023 struct pxa25x_udc *dev = m->private; 1024 unsigned long flags; 1025 int i; 1026 u32 tmp; 1027 1028 local_irq_save(flags); 1029 1030 /* basic device status */ 1031 seq_printf(m, DRIVER_DESC "\n" 1032 "%s version: %s\nGadget driver: %s\nHost %s\n\n", 1033 driver_name, DRIVER_VERSION SIZE_STR "(pio)", 1034 dev->driver ? dev->driver->driver.name : "(none)", 1035 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected"); 1036 1037 /* registers for device and ep0 */ 1038 seq_printf(m, 1039 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", 1040 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL); 1041 1042 tmp = UDCCR; 1043 seq_printf(m, 1044 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp, 1045 (tmp & UDCCR_REM) ? " rem" : "", 1046 (tmp & UDCCR_RSTIR) ? " rstir" : "", 1047 (tmp & UDCCR_SRM) ? " srm" : "", 1048 (tmp & UDCCR_SUSIR) ? " susir" : "", 1049 (tmp & UDCCR_RESIR) ? " resir" : "", 1050 (tmp & UDCCR_RSM) ? " rsm" : "", 1051 (tmp & UDCCR_UDA) ? " uda" : "", 1052 (tmp & UDCCR_UDE) ? " ude" : ""); 1053 1054 tmp = UDCCS0; 1055 seq_printf(m, 1056 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp, 1057 (tmp & UDCCS0_SA) ? " sa" : "", 1058 (tmp & UDCCS0_RNE) ? " rne" : "", 1059 (tmp & UDCCS0_FST) ? " fst" : "", 1060 (tmp & UDCCS0_SST) ? " sst" : "", 1061 (tmp & UDCCS0_DRWF) ? " dwrf" : "", 1062 (tmp & UDCCS0_FTF) ? " ftf" : "", 1063 (tmp & UDCCS0_IPR) ? " ipr" : "", 1064 (tmp & UDCCS0_OPR) ? " opr" : ""); 1065 1066 if (dev->has_cfr) { 1067 tmp = UDCCFR; 1068 seq_printf(m, 1069 "udccfr %02X =%s%s\n", tmp, 1070 (tmp & UDCCFR_AREN) ? " aren" : "", 1071 (tmp & UDCCFR_ACM) ? " acm" : ""); 1072 } 1073 1074 if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver) 1075 goto done; 1076 1077 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n", 1078 dev->stats.write.bytes, dev->stats.write.ops, 1079 dev->stats.read.bytes, dev->stats.read.ops, 1080 dev->stats.irqs); 1081 1082 /* dump endpoint queues */ 1083 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1084 struct pxa25x_ep *ep = &dev->ep [i]; 1085 struct pxa25x_request *req; 1086 1087 if (i != 0) { 1088 const struct usb_endpoint_descriptor *desc; 1089 1090 desc = ep->desc; 1091 if (!desc) 1092 continue; 1093 tmp = *dev->ep [i].reg_udccs; 1094 seq_printf(m, 1095 "%s max %d %s udccs %02x irqs %lu\n", 1096 ep->ep.name, usb_endpoint_maxp(desc), 1097 "pio", tmp, ep->pio_irqs); 1098 /* TODO translate all five groups of udccs bits! */ 1099 1100 } else /* ep0 should only have one transfer queued */ 1101 seq_printf(m, "ep0 max 16 pio irqs %lu\n", 1102 ep->pio_irqs); 1103 1104 if (list_empty(&ep->queue)) { 1105 seq_printf(m, "\t(nothing queued)\n"); 1106 continue; 1107 } 1108 list_for_each_entry(req, &ep->queue, queue) { 1109 seq_printf(m, 1110 "\treq %p len %d/%d buf %p\n", 1111 &req->req, req->req.actual, 1112 req->req.length, req->req.buf); 1113 } 1114 } 1115 1116done: 1117 local_irq_restore(flags); 1118 return 0; 1119} 1120 1121static int 1122udc_debugfs_open(struct inode *inode, struct file *file) 1123{ 1124 return single_open(file, udc_seq_show, inode->i_private); 1125} 1126 1127static const struct file_operations debug_fops = { 1128 .open = udc_debugfs_open, 1129 .read = seq_read, 1130 .llseek = seq_lseek, 1131 .release = single_release, 1132 .owner = THIS_MODULE, 1133}; 1134 1135#define create_debug_files(dev) \ 1136 do { \ 1137 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \ 1138 S_IRUGO, NULL, dev, &debug_fops); \ 1139 } while (0) 1140#define remove_debug_files(dev) \ 1141 do { \ 1142 if (dev->debugfs_udc) \ 1143 debugfs_remove(dev->debugfs_udc); \ 1144 } while (0) 1145 1146#else /* !CONFIG_USB_GADGET_DEBUG_FILES */ 1147 1148#define create_debug_files(dev) do {} while (0) 1149#define remove_debug_files(dev) do {} while (0) 1150 1151#endif /* CONFIG_USB_GADGET_DEBUG_FILES */ 1152 1153/*-------------------------------------------------------------------------*/ 1154 1155/* 1156 * udc_disable - disable USB device controller 1157 */ 1158static void udc_disable(struct pxa25x_udc *dev) 1159{ 1160 /* block all irqs */ 1161 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM); 1162 UICR0 = UICR1 = 0xff; 1163 UFNRH = UFNRH_SIM; 1164 1165 /* if hardware supports it, disconnect from usb */ 1166 pullup_off(); 1167 1168 udc_clear_mask_UDCCR(UDCCR_UDE); 1169 1170 ep0_idle (dev); 1171 dev->gadget.speed = USB_SPEED_UNKNOWN; 1172} 1173 1174 1175/* 1176 * udc_reinit - initialize software state 1177 */ 1178static void udc_reinit(struct pxa25x_udc *dev) 1179{ 1180 u32 i; 1181 1182 /* device/ep0 records init */ 1183 INIT_LIST_HEAD (&dev->gadget.ep_list); 1184 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list); 1185 dev->ep0state = EP0_IDLE; 1186 1187 /* basic endpoint records init */ 1188 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1189 struct pxa25x_ep *ep = &dev->ep[i]; 1190 1191 if (i != 0) 1192 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list); 1193 1194 ep->desc = NULL; 1195 ep->ep.desc = NULL; 1196 ep->stopped = 0; 1197 INIT_LIST_HEAD (&ep->queue); 1198 ep->pio_irqs = 0; 1199 } 1200 1201 /* the rest was statically initialized, and is read-only */ 1202} 1203 1204/* until it's enabled, this UDC should be completely invisible 1205 * to any USB host. 1206 */ 1207static void udc_enable (struct pxa25x_udc *dev) 1208{ 1209 udc_clear_mask_UDCCR(UDCCR_UDE); 1210 1211 /* try to clear these bits before we enable the udc */ 1212 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR); 1213 1214 ep0_idle(dev); 1215 dev->gadget.speed = USB_SPEED_UNKNOWN; 1216 dev->stats.irqs = 0; 1217 1218 /* 1219 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual: 1220 * - enable UDC 1221 * - if RESET is already in progress, ack interrupt 1222 * - unmask reset interrupt 1223 */ 1224 udc_set_mask_UDCCR(UDCCR_UDE); 1225 if (!(UDCCR & UDCCR_UDA)) 1226 udc_ack_int_UDCCR(UDCCR_RSTIR); 1227 1228 if (dev->has_cfr /* UDC_RES2 is defined */) { 1229 /* pxa255 (a0+) can avoid a set_config race that could 1230 * prevent gadget drivers from configuring correctly 1231 */ 1232 UDCCFR = UDCCFR_ACM | UDCCFR_MB1; 1233 } else { 1234 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1) 1235 * which could result in missing packets and interrupts. 1236 * supposedly one bit per endpoint, controlling whether it 1237 * double buffers or not; ACM/AREN bits fit into the holes. 1238 * zero bits (like USIR0_IRx) disable double buffering. 1239 */ 1240 UDC_RES1 = 0x00; 1241 UDC_RES2 = 0x00; 1242 } 1243 1244 /* enable suspend/resume and reset irqs */ 1245 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM); 1246 1247 /* enable ep0 irqs */ 1248 UICR0 &= ~UICR0_IM0; 1249 1250 /* if hardware supports it, pullup D+ and wait for reset */ 1251 pullup_on(); 1252} 1253 1254 1255/* when a driver is successfully registered, it will receive 1256 * control requests including set_configuration(), which enables 1257 * non-control requests. then usb traffic follows until a 1258 * disconnect is reported. then a host may connect again, or 1259 * the driver might get unbound. 1260 */ 1261static int pxa25x_start(struct usb_gadget_driver *driver, 1262 int (*bind)(struct usb_gadget *)) 1263{ 1264 struct pxa25x_udc *dev = the_controller; 1265 int retval; 1266 1267 if (!driver 1268 || driver->max_speed < USB_SPEED_FULL 1269 || !bind 1270 || !driver->disconnect 1271 || !driver->setup) 1272 return -EINVAL; 1273 if (!dev) 1274 return -ENODEV; 1275 if (dev->driver) 1276 return -EBUSY; 1277 1278 /* first hook up the driver ... */ 1279 dev->driver = driver; 1280 dev->gadget.dev.driver = &driver->driver; 1281 dev->pullup = 1; 1282 1283 retval = device_add (&dev->gadget.dev); 1284 if (retval) { 1285fail: 1286 dev->driver = NULL; 1287 dev->gadget.dev.driver = NULL; 1288 return retval; 1289 } 1290 retval = bind(&dev->gadget); 1291 if (retval) { 1292 DMSG("bind to driver %s --> error %d\n", 1293 driver->driver.name, retval); 1294 device_del (&dev->gadget.dev); 1295 goto fail; 1296 } 1297 1298 /* ... then enable host detection and ep0; and we're ready 1299 * for set_configuration as well as eventual disconnect. 1300 */ 1301 DMSG("registered gadget driver '%s'\n", driver->driver.name); 1302 1303 /* connect to bus through transceiver */ 1304 if (dev->transceiver) { 1305 retval = otg_set_peripheral(dev->transceiver->otg, 1306 &dev->gadget); 1307 if (retval) { 1308 DMSG("can't bind to transceiver\n"); 1309 if (driver->unbind) 1310 driver->unbind(&dev->gadget); 1311 goto bind_fail; 1312 } 1313 } 1314 1315 pullup(dev); 1316 dump_state(dev); 1317 return 0; 1318bind_fail: 1319 return retval; 1320} 1321 1322static void 1323stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver) 1324{ 1325 int i; 1326 1327 /* don't disconnect drivers more than once */ 1328 if (dev->gadget.speed == USB_SPEED_UNKNOWN) 1329 driver = NULL; 1330 dev->gadget.speed = USB_SPEED_UNKNOWN; 1331 1332 /* prevent new request submissions, kill any outstanding requests */ 1333 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1334 struct pxa25x_ep *ep = &dev->ep[i]; 1335 1336 ep->stopped = 1; 1337 nuke(ep, -ESHUTDOWN); 1338 } 1339 del_timer_sync(&dev->timer); 1340 1341 /* report disconnect; the driver is already quiesced */ 1342 if (driver) 1343 driver->disconnect(&dev->gadget); 1344 1345 /* re-init driver-visible data structures */ 1346 udc_reinit(dev); 1347} 1348 1349static int pxa25x_stop(struct usb_gadget_driver *driver) 1350{ 1351 struct pxa25x_udc *dev = the_controller; 1352 1353 if (!dev) 1354 return -ENODEV; 1355 if (!driver || driver != dev->driver || !driver->unbind) 1356 return -EINVAL; 1357 1358 local_irq_disable(); 1359 dev->pullup = 0; 1360 pullup(dev); 1361 stop_activity(dev, driver); 1362 local_irq_enable(); 1363 1364 if (dev->transceiver) 1365 (void) otg_set_peripheral(dev->transceiver->otg, NULL); 1366 1367 driver->unbind(&dev->gadget); 1368 dev->gadget.dev.driver = NULL; 1369 dev->driver = NULL; 1370 1371 device_del (&dev->gadget.dev); 1372 1373 DMSG("unregistered gadget driver '%s'\n", driver->driver.name); 1374 dump_state(dev); 1375 return 0; 1376} 1377 1378/*-------------------------------------------------------------------------*/ 1379 1380#ifdef CONFIG_ARCH_LUBBOCK 1381 1382/* Lubbock has separate connect and disconnect irqs. More typical designs 1383 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup. 1384 */ 1385 1386static irqreturn_t 1387lubbock_vbus_irq(int irq, void *_dev) 1388{ 1389 struct pxa25x_udc *dev = _dev; 1390 int vbus; 1391 1392 dev->stats.irqs++; 1393 switch (irq) { 1394 case LUBBOCK_USB_IRQ: 1395 vbus = 1; 1396 disable_irq(LUBBOCK_USB_IRQ); 1397 enable_irq(LUBBOCK_USB_DISC_IRQ); 1398 break; 1399 case LUBBOCK_USB_DISC_IRQ: 1400 vbus = 0; 1401 disable_irq(LUBBOCK_USB_DISC_IRQ); 1402 enable_irq(LUBBOCK_USB_IRQ); 1403 break; 1404 default: 1405 return IRQ_NONE; 1406 } 1407 1408 pxa25x_udc_vbus_session(&dev->gadget, vbus); 1409 return IRQ_HANDLED; 1410} 1411 1412#endif 1413 1414 1415/*-------------------------------------------------------------------------*/ 1416 1417static inline void clear_ep_state (struct pxa25x_udc *dev) 1418{ 1419 unsigned i; 1420 1421 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint 1422 * fifos, and pending transactions mustn't be continued in any case. 1423 */ 1424 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) 1425 nuke(&dev->ep[i], -ECONNABORTED); 1426} 1427 1428static void udc_watchdog(unsigned long _dev) 1429{ 1430 struct pxa25x_udc *dev = (void *)_dev; 1431 1432 local_irq_disable(); 1433 if (dev->ep0state == EP0_STALL 1434 && (UDCCS0 & UDCCS0_FST) == 0 1435 && (UDCCS0 & UDCCS0_SST) == 0) { 1436 UDCCS0 = UDCCS0_FST|UDCCS0_FTF; 1437 DBG(DBG_VERBOSE, "ep0 re-stall\n"); 1438 start_watchdog(dev); 1439 } 1440 local_irq_enable(); 1441} 1442 1443static void handle_ep0 (struct pxa25x_udc *dev) 1444{ 1445 u32 udccs0 = UDCCS0; 1446 struct pxa25x_ep *ep = &dev->ep [0]; 1447 struct pxa25x_request *req; 1448 union { 1449 struct usb_ctrlrequest r; 1450 u8 raw [8]; 1451 u32 word [2]; 1452 } u; 1453 1454 if (list_empty(&ep->queue)) 1455 req = NULL; 1456 else 1457 req = list_entry(ep->queue.next, struct pxa25x_request, queue); 1458 1459 /* clear stall status */ 1460 if (udccs0 & UDCCS0_SST) { 1461 nuke(ep, -EPIPE); 1462 UDCCS0 = UDCCS0_SST; 1463 del_timer(&dev->timer); 1464 ep0_idle(dev); 1465 } 1466 1467 /* previous request unfinished? non-error iff back-to-back ... */ 1468 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) { 1469 nuke(ep, 0); 1470 del_timer(&dev->timer); 1471 ep0_idle(dev); 1472 } 1473 1474 switch (dev->ep0state) { 1475 case EP0_IDLE: 1476 /* late-breaking status? */ 1477 udccs0 = UDCCS0; 1478 1479 /* start control request? */ 1480 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE)) 1481 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) { 1482 int i; 1483 1484 nuke (ep, -EPROTO); 1485 1486 /* read SETUP packet */ 1487 for (i = 0; i < 8; i++) { 1488 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) { 1489bad_setup: 1490 DMSG("SETUP %d!\n", i); 1491 goto stall; 1492 } 1493 u.raw [i] = (u8) UDDR0; 1494 } 1495 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0)) 1496 goto bad_setup; 1497 1498got_setup: 1499 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n", 1500 u.r.bRequestType, u.r.bRequest, 1501 le16_to_cpu(u.r.wValue), 1502 le16_to_cpu(u.r.wIndex), 1503 le16_to_cpu(u.r.wLength)); 1504 1505 /* cope with automagic for some standard requests. */ 1506 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK) 1507 == USB_TYPE_STANDARD; 1508 dev->req_config = 0; 1509 dev->req_pending = 1; 1510 switch (u.r.bRequest) { 1511 /* hardware restricts gadget drivers here! */ 1512 case USB_REQ_SET_CONFIGURATION: 1513 if (u.r.bRequestType == USB_RECIP_DEVICE) { 1514 /* reflect hardware's automagic 1515 * up to the gadget driver. 1516 */ 1517config_change: 1518 dev->req_config = 1; 1519 clear_ep_state(dev); 1520 /* if !has_cfr, there's no synch 1521 * else use AREN (later) not SA|OPR 1522 * USIR0_IR0 acts edge sensitive 1523 */ 1524 } 1525 break; 1526 /* ... and here, even more ... */ 1527 case USB_REQ_SET_INTERFACE: 1528 if (u.r.bRequestType == USB_RECIP_INTERFACE) { 1529 /* udc hardware is broken by design: 1530 * - altsetting may only be zero; 1531 * - hw resets all interfaces' eps; 1532 * - ep reset doesn't include halt(?). 1533 */ 1534 DMSG("broken set_interface (%d/%d)\n", 1535 le16_to_cpu(u.r.wIndex), 1536 le16_to_cpu(u.r.wValue)); 1537 goto config_change; 1538 } 1539 break; 1540 /* hardware was supposed to hide this */ 1541 case USB_REQ_SET_ADDRESS: 1542 if (u.r.bRequestType == USB_RECIP_DEVICE) { 1543 ep0start(dev, 0, "address"); 1544 return; 1545 } 1546 break; 1547 } 1548 1549 if (u.r.bRequestType & USB_DIR_IN) 1550 dev->ep0state = EP0_IN_DATA_PHASE; 1551 else 1552 dev->ep0state = EP0_OUT_DATA_PHASE; 1553 1554 i = dev->driver->setup(&dev->gadget, &u.r); 1555 if (i < 0) { 1556 /* hardware automagic preventing STALL... */ 1557 if (dev->req_config) { 1558 /* hardware sometimes neglects to tell 1559 * tell us about config change events, 1560 * so later ones may fail... 1561 */ 1562 WARNING("config change %02x fail %d?\n", 1563 u.r.bRequest, i); 1564 return; 1565 /* TODO experiment: if has_cfr, 1566 * hardware didn't ACK; maybe we 1567 * could actually STALL! 1568 */ 1569 } 1570 DBG(DBG_VERBOSE, "protocol STALL, " 1571 "%02x err %d\n", UDCCS0, i); 1572stall: 1573 /* the watchdog timer helps deal with cases 1574 * where udc seems to clear FST wrongly, and 1575 * then NAKs instead of STALLing. 1576 */ 1577 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall"); 1578 start_watchdog(dev); 1579 dev->ep0state = EP0_STALL; 1580 1581 /* deferred i/o == no response yet */ 1582 } else if (dev->req_pending) { 1583 if (likely(dev->ep0state == EP0_IN_DATA_PHASE 1584 || dev->req_std || u.r.wLength)) 1585 ep0start(dev, 0, "defer"); 1586 else 1587 ep0start(dev, UDCCS0_IPR, "defer/IPR"); 1588 } 1589 1590 /* expect at least one data or status stage irq */ 1591 return; 1592 1593 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA)) 1594 == (UDCCS0_OPR|UDCCS0_SA))) { 1595 unsigned i; 1596 1597 /* pxa210/250 erratum 131 for B0/B1 says RNE lies. 1598 * still observed on a pxa255 a0. 1599 */ 1600 DBG(DBG_VERBOSE, "e131\n"); 1601 nuke(ep, -EPROTO); 1602 1603 /* read SETUP data, but don't trust it too much */ 1604 for (i = 0; i < 8; i++) 1605 u.raw [i] = (u8) UDDR0; 1606 if ((u.r.bRequestType & USB_RECIP_MASK) 1607 > USB_RECIP_OTHER) 1608 goto stall; 1609 if (u.word [0] == 0 && u.word [1] == 0) 1610 goto stall; 1611 goto got_setup; 1612 } else { 1613 /* some random early IRQ: 1614 * - we acked FST 1615 * - IPR cleared 1616 * - OPR got set, without SA (likely status stage) 1617 */ 1618 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR); 1619 } 1620 break; 1621 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ 1622 if (udccs0 & UDCCS0_OPR) { 1623 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF; 1624 DBG(DBG_VERBOSE, "ep0in premature status\n"); 1625 if (req) 1626 done(ep, req, 0); 1627 ep0_idle(dev); 1628 } else /* irq was IPR clearing */ { 1629 if (req) { 1630 /* this IN packet might finish the request */ 1631 (void) write_ep0_fifo(ep, req); 1632 } /* else IN token before response was written */ 1633 } 1634 break; 1635 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ 1636 if (udccs0 & UDCCS0_OPR) { 1637 if (req) { 1638 /* this OUT packet might finish the request */ 1639 if (read_ep0_fifo(ep, req)) 1640 done(ep, req, 0); 1641 /* else more OUT packets expected */ 1642 } /* else OUT token before read was issued */ 1643 } else /* irq was IPR clearing */ { 1644 DBG(DBG_VERBOSE, "ep0out premature status\n"); 1645 if (req) 1646 done(ep, req, 0); 1647 ep0_idle(dev); 1648 } 1649 break; 1650 case EP0_END_XFER: 1651 if (req) 1652 done(ep, req, 0); 1653 /* ack control-IN status (maybe in-zlp was skipped) 1654 * also appears after some config change events. 1655 */ 1656 if (udccs0 & UDCCS0_OPR) 1657 UDCCS0 = UDCCS0_OPR; 1658 ep0_idle(dev); 1659 break; 1660 case EP0_STALL: 1661 UDCCS0 = UDCCS0_FST; 1662 break; 1663 } 1664 USIR0 = USIR0_IR0; 1665} 1666 1667static void handle_ep(struct pxa25x_ep *ep) 1668{ 1669 struct pxa25x_request *req; 1670 int is_in = ep->bEndpointAddress & USB_DIR_IN; 1671 int completed; 1672 u32 udccs, tmp; 1673 1674 do { 1675 completed = 0; 1676 if (likely (!list_empty(&ep->queue))) 1677 req = list_entry(ep->queue.next, 1678 struct pxa25x_request, queue); 1679 else 1680 req = NULL; 1681 1682 // TODO check FST handling 1683 1684 udccs = *ep->reg_udccs; 1685 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */ 1686 tmp = UDCCS_BI_TUR; 1687 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) 1688 tmp |= UDCCS_BI_SST; 1689 tmp &= udccs; 1690 if (likely (tmp)) 1691 *ep->reg_udccs = tmp; 1692 if (req && likely ((udccs & UDCCS_BI_TFS) != 0)) 1693 completed = write_fifo(ep, req); 1694 1695 } else { /* irq from RPC (or for ISO, ROF) */ 1696 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) 1697 tmp = UDCCS_BO_SST | UDCCS_BO_DME; 1698 else 1699 tmp = UDCCS_IO_ROF | UDCCS_IO_DME; 1700 tmp &= udccs; 1701 if (likely(tmp)) 1702 *ep->reg_udccs = tmp; 1703 1704 /* fifos can hold packets, ready for reading... */ 1705 if (likely(req)) { 1706 completed = read_fifo(ep, req); 1707 } else 1708 pio_irq_disable (ep->bEndpointAddress); 1709 } 1710 ep->pio_irqs++; 1711 } while (completed); 1712} 1713 1714/* 1715 * pxa25x_udc_irq - interrupt handler 1716 * 1717 * avoid delays in ep0 processing. the control handshaking isn't always 1718 * under software control (pxa250c0 and the pxa255 are better), and delays 1719 * could cause usb protocol errors. 1720 */ 1721static irqreturn_t 1722pxa25x_udc_irq(int irq, void *_dev) 1723{ 1724 struct pxa25x_udc *dev = _dev; 1725 int handled; 1726 1727 dev->stats.irqs++; 1728 do { 1729 u32 udccr = UDCCR; 1730 1731 handled = 0; 1732 1733 /* SUSpend Interrupt Request */ 1734 if (unlikely(udccr & UDCCR_SUSIR)) { 1735 udc_ack_int_UDCCR(UDCCR_SUSIR); 1736 handled = 1; 1737 DBG(DBG_VERBOSE, "USB suspend\n"); 1738 1739 if (dev->gadget.speed != USB_SPEED_UNKNOWN 1740 && dev->driver 1741 && dev->driver->suspend) 1742 dev->driver->suspend(&dev->gadget); 1743 ep0_idle (dev); 1744 } 1745 1746 /* RESume Interrupt Request */ 1747 if (unlikely(udccr & UDCCR_RESIR)) { 1748 udc_ack_int_UDCCR(UDCCR_RESIR); 1749 handled = 1; 1750 DBG(DBG_VERBOSE, "USB resume\n"); 1751 1752 if (dev->gadget.speed != USB_SPEED_UNKNOWN 1753 && dev->driver 1754 && dev->driver->resume) 1755 dev->driver->resume(&dev->gadget); 1756 } 1757 1758 /* ReSeT Interrupt Request - USB reset */ 1759 if (unlikely(udccr & UDCCR_RSTIR)) { 1760 udc_ack_int_UDCCR(UDCCR_RSTIR); 1761 handled = 1; 1762 1763 if ((UDCCR & UDCCR_UDA) == 0) { 1764 DBG(DBG_VERBOSE, "USB reset start\n"); 1765 1766 /* reset driver and endpoints, 1767 * in case that's not yet done 1768 */ 1769 stop_activity (dev, dev->driver); 1770 1771 } else { 1772 DBG(DBG_VERBOSE, "USB reset end\n"); 1773 dev->gadget.speed = USB_SPEED_FULL; 1774 memset(&dev->stats, 0, sizeof dev->stats); 1775 /* driver and endpoints are still reset */ 1776 } 1777 1778 } else { 1779 u32 usir0 = USIR0 & ~UICR0; 1780 u32 usir1 = USIR1 & ~UICR1; 1781 int i; 1782 1783 if (unlikely (!usir0 && !usir1)) 1784 continue; 1785 1786 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0); 1787 1788 /* control traffic */ 1789 if (usir0 & USIR0_IR0) { 1790 dev->ep[0].pio_irqs++; 1791 handle_ep0(dev); 1792 handled = 1; 1793 } 1794 1795 /* endpoint data transfers */ 1796 for (i = 0; i < 8; i++) { 1797 u32 tmp = 1 << i; 1798 1799 if (i && (usir0 & tmp)) { 1800 handle_ep(&dev->ep[i]); 1801 USIR0 |= tmp; 1802 handled = 1; 1803 } 1804#ifndef CONFIG_USB_PXA25X_SMALL 1805 if (usir1 & tmp) { 1806 handle_ep(&dev->ep[i+8]); 1807 USIR1 |= tmp; 1808 handled = 1; 1809 } 1810#endif 1811 } 1812 } 1813 1814 /* we could also ask for 1 msec SOF (SIR) interrupts */ 1815 1816 } while (handled); 1817 return IRQ_HANDLED; 1818} 1819 1820/*-------------------------------------------------------------------------*/ 1821 1822static void nop_release (struct device *dev) 1823{ 1824 DMSG("%s %s\n", __func__, dev_name(dev)); 1825} 1826 1827/* this uses load-time allocation and initialization (instead of 1828 * doing it at run-time) to save code, eliminate fault paths, and 1829 * be more obviously correct. 1830 */ 1831static struct pxa25x_udc memory = { 1832 .gadget = { 1833 .ops = &pxa25x_udc_ops, 1834 .ep0 = &memory.ep[0].ep, 1835 .name = driver_name, 1836 .dev = { 1837 .init_name = "gadget", 1838 .release = nop_release, 1839 }, 1840 }, 1841 1842 /* control endpoint */ 1843 .ep[0] = { 1844 .ep = { 1845 .name = ep0name, 1846 .ops = &pxa25x_ep_ops, 1847 .maxpacket = EP0_FIFO_SIZE, 1848 }, 1849 .dev = &memory, 1850 .reg_udccs = &UDCCS0, 1851 .reg_uddr = &UDDR0, 1852 }, 1853 1854 /* first group of endpoints */ 1855 .ep[1] = { 1856 .ep = { 1857 .name = "ep1in-bulk", 1858 .ops = &pxa25x_ep_ops, 1859 .maxpacket = BULK_FIFO_SIZE, 1860 }, 1861 .dev = &memory, 1862 .fifo_size = BULK_FIFO_SIZE, 1863 .bEndpointAddress = USB_DIR_IN | 1, 1864 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1865 .reg_udccs = &UDCCS1, 1866 .reg_uddr = &UDDR1, 1867 }, 1868 .ep[2] = { 1869 .ep = { 1870 .name = "ep2out-bulk", 1871 .ops = &pxa25x_ep_ops, 1872 .maxpacket = BULK_FIFO_SIZE, 1873 }, 1874 .dev = &memory, 1875 .fifo_size = BULK_FIFO_SIZE, 1876 .bEndpointAddress = 2, 1877 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1878 .reg_udccs = &UDCCS2, 1879 .reg_ubcr = &UBCR2, 1880 .reg_uddr = &UDDR2, 1881 }, 1882#ifndef CONFIG_USB_PXA25X_SMALL 1883 .ep[3] = { 1884 .ep = { 1885 .name = "ep3in-iso", 1886 .ops = &pxa25x_ep_ops, 1887 .maxpacket = ISO_FIFO_SIZE, 1888 }, 1889 .dev = &memory, 1890 .fifo_size = ISO_FIFO_SIZE, 1891 .bEndpointAddress = USB_DIR_IN | 3, 1892 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1893 .reg_udccs = &UDCCS3, 1894 .reg_uddr = &UDDR3, 1895 }, 1896 .ep[4] = { 1897 .ep = { 1898 .name = "ep4out-iso", 1899 .ops = &pxa25x_ep_ops, 1900 .maxpacket = ISO_FIFO_SIZE, 1901 }, 1902 .dev = &memory, 1903 .fifo_size = ISO_FIFO_SIZE, 1904 .bEndpointAddress = 4, 1905 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1906 .reg_udccs = &UDCCS4, 1907 .reg_ubcr = &UBCR4, 1908 .reg_uddr = &UDDR4, 1909 }, 1910 .ep[5] = { 1911 .ep = { 1912 .name = "ep5in-int", 1913 .ops = &pxa25x_ep_ops, 1914 .maxpacket = INT_FIFO_SIZE, 1915 }, 1916 .dev = &memory, 1917 .fifo_size = INT_FIFO_SIZE, 1918 .bEndpointAddress = USB_DIR_IN | 5, 1919 .bmAttributes = USB_ENDPOINT_XFER_INT, 1920 .reg_udccs = &UDCCS5, 1921 .reg_uddr = &UDDR5, 1922 }, 1923 1924 /* second group of endpoints */ 1925 .ep[6] = { 1926 .ep = { 1927 .name = "ep6in-bulk", 1928 .ops = &pxa25x_ep_ops, 1929 .maxpacket = BULK_FIFO_SIZE, 1930 }, 1931 .dev = &memory, 1932 .fifo_size = BULK_FIFO_SIZE, 1933 .bEndpointAddress = USB_DIR_IN | 6, 1934 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1935 .reg_udccs = &UDCCS6, 1936 .reg_uddr = &UDDR6, 1937 }, 1938 .ep[7] = { 1939 .ep = { 1940 .name = "ep7out-bulk", 1941 .ops = &pxa25x_ep_ops, 1942 .maxpacket = BULK_FIFO_SIZE, 1943 }, 1944 .dev = &memory, 1945 .fifo_size = BULK_FIFO_SIZE, 1946 .bEndpointAddress = 7, 1947 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1948 .reg_udccs = &UDCCS7, 1949 .reg_ubcr = &UBCR7, 1950 .reg_uddr = &UDDR7, 1951 }, 1952 .ep[8] = { 1953 .ep = { 1954 .name = "ep8in-iso", 1955 .ops = &pxa25x_ep_ops, 1956 .maxpacket = ISO_FIFO_SIZE, 1957 }, 1958 .dev = &memory, 1959 .fifo_size = ISO_FIFO_SIZE, 1960 .bEndpointAddress = USB_DIR_IN | 8, 1961 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1962 .reg_udccs = &UDCCS8, 1963 .reg_uddr = &UDDR8, 1964 }, 1965 .ep[9] = { 1966 .ep = { 1967 .name = "ep9out-iso", 1968 .ops = &pxa25x_ep_ops, 1969 .maxpacket = ISO_FIFO_SIZE, 1970 }, 1971 .dev = &memory, 1972 .fifo_size = ISO_FIFO_SIZE, 1973 .bEndpointAddress = 9, 1974 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1975 .reg_udccs = &UDCCS9, 1976 .reg_ubcr = &UBCR9, 1977 .reg_uddr = &UDDR9, 1978 }, 1979 .ep[10] = { 1980 .ep = { 1981 .name = "ep10in-int", 1982 .ops = &pxa25x_ep_ops, 1983 .maxpacket = INT_FIFO_SIZE, 1984 }, 1985 .dev = &memory, 1986 .fifo_size = INT_FIFO_SIZE, 1987 .bEndpointAddress = USB_DIR_IN | 10, 1988 .bmAttributes = USB_ENDPOINT_XFER_INT, 1989 .reg_udccs = &UDCCS10, 1990 .reg_uddr = &UDDR10, 1991 }, 1992 1993 /* third group of endpoints */ 1994 .ep[11] = { 1995 .ep = { 1996 .name = "ep11in-bulk", 1997 .ops = &pxa25x_ep_ops, 1998 .maxpacket = BULK_FIFO_SIZE, 1999 }, 2000 .dev = &memory, 2001 .fifo_size = BULK_FIFO_SIZE, 2002 .bEndpointAddress = USB_DIR_IN | 11, 2003 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2004 .reg_udccs = &UDCCS11, 2005 .reg_uddr = &UDDR11, 2006 }, 2007 .ep[12] = { 2008 .ep = { 2009 .name = "ep12out-bulk", 2010 .ops = &pxa25x_ep_ops, 2011 .maxpacket = BULK_FIFO_SIZE, 2012 }, 2013 .dev = &memory, 2014 .fifo_size = BULK_FIFO_SIZE, 2015 .bEndpointAddress = 12, 2016 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2017 .reg_udccs = &UDCCS12, 2018 .reg_ubcr = &UBCR12, 2019 .reg_uddr = &UDDR12, 2020 }, 2021 .ep[13] = { 2022 .ep = { 2023 .name = "ep13in-iso", 2024 .ops = &pxa25x_ep_ops, 2025 .maxpacket = ISO_FIFO_SIZE, 2026 }, 2027 .dev = &memory, 2028 .fifo_size = ISO_FIFO_SIZE, 2029 .bEndpointAddress = USB_DIR_IN | 13, 2030 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2031 .reg_udccs = &UDCCS13, 2032 .reg_uddr = &UDDR13, 2033 }, 2034 .ep[14] = { 2035 .ep = { 2036 .name = "ep14out-iso", 2037 .ops = &pxa25x_ep_ops, 2038 .maxpacket = ISO_FIFO_SIZE, 2039 }, 2040 .dev = &memory, 2041 .fifo_size = ISO_FIFO_SIZE, 2042 .bEndpointAddress = 14, 2043 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2044 .reg_udccs = &UDCCS14, 2045 .reg_ubcr = &UBCR14, 2046 .reg_uddr = &UDDR14, 2047 }, 2048 .ep[15] = { 2049 .ep = { 2050 .name = "ep15in-int", 2051 .ops = &pxa25x_ep_ops, 2052 .maxpacket = INT_FIFO_SIZE, 2053 }, 2054 .dev = &memory, 2055 .fifo_size = INT_FIFO_SIZE, 2056 .bEndpointAddress = USB_DIR_IN | 15, 2057 .bmAttributes = USB_ENDPOINT_XFER_INT, 2058 .reg_udccs = &UDCCS15, 2059 .reg_uddr = &UDDR15, 2060 }, 2061#endif /* !CONFIG_USB_PXA25X_SMALL */ 2062}; 2063 2064#define CP15R0_VENDOR_MASK 0xffffe000 2065 2066#if defined(CONFIG_ARCH_PXA) 2067#define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */ 2068 2069#elif defined(CONFIG_ARCH_IXP4XX) 2070#define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */ 2071 2072#endif 2073 2074#define CP15R0_PROD_MASK 0x000003f0 2075#define PXA25x 0x00000100 /* and PXA26x */ 2076#define PXA210 0x00000120 2077 2078#define CP15R0_REV_MASK 0x0000000f 2079 2080#define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK) 2081 2082#define PXA255_A0 0x00000106 /* or PXA260_B1 */ 2083#define PXA250_C0 0x00000105 /* or PXA26x_B0 */ 2084#define PXA250_B2 0x00000104 2085#define PXA250_B1 0x00000103 /* or PXA260_A0 */ 2086#define PXA250_B0 0x00000102 2087#define PXA250_A1 0x00000101 2088#define PXA250_A0 0x00000100 2089 2090#define PXA210_C0 0x00000125 2091#define PXA210_B2 0x00000124 2092#define PXA210_B1 0x00000123 2093#define PXA210_B0 0x00000122 2094#define IXP425_A0 0x000001c1 2095#define IXP425_B0 0x000001f1 2096#define IXP465_AD 0x00000200 2097 2098/* 2099 * probe - binds to the platform device 2100 */ 2101static int __init pxa25x_udc_probe(struct platform_device *pdev) 2102{ 2103 struct pxa25x_udc *dev = &memory; 2104 int retval, irq; 2105 u32 chiprev; 2106 2107 /* insist on Intel/ARM/XScale */ 2108 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev)); 2109 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) { 2110 pr_err("%s: not XScale!\n", driver_name); 2111 return -ENODEV; 2112 } 2113 2114 /* trigger chiprev-specific logic */ 2115 switch (chiprev & CP15R0_PRODREV_MASK) { 2116#if defined(CONFIG_ARCH_PXA) 2117 case PXA255_A0: 2118 dev->has_cfr = 1; 2119 break; 2120 case PXA250_A0: 2121 case PXA250_A1: 2122 /* A0/A1 "not released"; ep 13, 15 unusable */ 2123 /* fall through */ 2124 case PXA250_B2: case PXA210_B2: 2125 case PXA250_B1: case PXA210_B1: 2126 case PXA250_B0: case PXA210_B0: 2127 /* OUT-DMA is broken ... */ 2128 /* fall through */ 2129 case PXA250_C0: case PXA210_C0: 2130 break; 2131#elif defined(CONFIG_ARCH_IXP4XX) 2132 case IXP425_A0: 2133 case IXP425_B0: 2134 case IXP465_AD: 2135 dev->has_cfr = 1; 2136 break; 2137#endif 2138 default: 2139 pr_err("%s: unrecognized processor: %08x\n", 2140 driver_name, chiprev); 2141 /* iop3xx, ixp4xx, ... */ 2142 return -ENODEV; 2143 } 2144 2145 irq = platform_get_irq(pdev, 0); 2146 if (irq < 0) 2147 return -ENODEV; 2148 2149 dev->clk = clk_get(&pdev->dev, NULL); 2150 if (IS_ERR(dev->clk)) { 2151 retval = PTR_ERR(dev->clk); 2152 goto err_clk; 2153 } 2154 2155 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq, 2156 dev->has_cfr ? "" : " (!cfr)", 2157 SIZE_STR "(pio)" 2158 ); 2159 2160 /* other non-static parts of init */ 2161 dev->dev = &pdev->dev; 2162 dev->mach = pdev->dev.platform_data; 2163 2164 dev->transceiver = usb_get_transceiver(); 2165 2166 if (gpio_is_valid(dev->mach->gpio_pullup)) { 2167 if ((retval = gpio_request(dev->mach->gpio_pullup, 2168 "pca25x_udc GPIO PULLUP"))) { 2169 dev_dbg(&pdev->dev, 2170 "can't get pullup gpio %d, err: %d\n", 2171 dev->mach->gpio_pullup, retval); 2172 goto err_gpio_pullup; 2173 } 2174 gpio_direction_output(dev->mach->gpio_pullup, 0); 2175 } 2176 2177 init_timer(&dev->timer); 2178 dev->timer.function = udc_watchdog; 2179 dev->timer.data = (unsigned long) dev; 2180 2181 device_initialize(&dev->gadget.dev); 2182 dev->gadget.dev.parent = &pdev->dev; 2183 dev->gadget.dev.dma_mask = pdev->dev.dma_mask; 2184 2185 the_controller = dev; 2186 platform_set_drvdata(pdev, dev); 2187 2188 udc_disable(dev); 2189 udc_reinit(dev); 2190 2191 dev->vbus = 0; 2192 2193 /* irq setup after old hardware state is cleaned up */ 2194 retval = request_irq(irq, pxa25x_udc_irq, 2195 0, driver_name, dev); 2196 if (retval != 0) { 2197 pr_err("%s: can't get irq %d, err %d\n", 2198 driver_name, irq, retval); 2199 goto err_irq1; 2200 } 2201 dev->got_irq = 1; 2202 2203#ifdef CONFIG_ARCH_LUBBOCK 2204 if (machine_is_lubbock()) { 2205 retval = request_irq(LUBBOCK_USB_DISC_IRQ, 2206 lubbock_vbus_irq, 2207 IRQF_SAMPLE_RANDOM, 2208 driver_name, dev); 2209 if (retval != 0) { 2210 pr_err("%s: can't get irq %i, err %d\n", 2211 driver_name, LUBBOCK_USB_DISC_IRQ, retval); 2212 goto err_irq_lub; 2213 } 2214 retval = request_irq(LUBBOCK_USB_IRQ, 2215 lubbock_vbus_irq, 2216 IRQF_SAMPLE_RANDOM, 2217 driver_name, dev); 2218 if (retval != 0) { 2219 pr_err("%s: can't get irq %i, err %d\n", 2220 driver_name, LUBBOCK_USB_IRQ, retval); 2221 goto lubbock_fail0; 2222 } 2223 } else 2224#endif 2225 create_debug_files(dev); 2226 2227 retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget); 2228 if (!retval) 2229 return retval; 2230 2231 remove_debug_files(dev); 2232#ifdef CONFIG_ARCH_LUBBOCK 2233lubbock_fail0: 2234 free_irq(LUBBOCK_USB_DISC_IRQ, dev); 2235 err_irq_lub: 2236 free_irq(irq, dev); 2237#endif 2238 err_irq1: 2239 if (gpio_is_valid(dev->mach->gpio_pullup)) 2240 gpio_free(dev->mach->gpio_pullup); 2241 err_gpio_pullup: 2242 if (dev->transceiver) { 2243 usb_put_transceiver(dev->transceiver); 2244 dev->transceiver = NULL; 2245 } 2246 clk_put(dev->clk); 2247 err_clk: 2248 return retval; 2249} 2250 2251static void pxa25x_udc_shutdown(struct platform_device *_dev) 2252{ 2253 pullup_off(); 2254} 2255 2256static int __exit pxa25x_udc_remove(struct platform_device *pdev) 2257{ 2258 struct pxa25x_udc *dev = platform_get_drvdata(pdev); 2259 2260 usb_del_gadget_udc(&dev->gadget); 2261 if (dev->driver) 2262 return -EBUSY; 2263 2264 dev->pullup = 0; 2265 pullup(dev); 2266 2267 remove_debug_files(dev); 2268 2269 if (dev->got_irq) { 2270 free_irq(platform_get_irq(pdev, 0), dev); 2271 dev->got_irq = 0; 2272 } 2273#ifdef CONFIG_ARCH_LUBBOCK 2274 if (machine_is_lubbock()) { 2275 free_irq(LUBBOCK_USB_DISC_IRQ, dev); 2276 free_irq(LUBBOCK_USB_IRQ, dev); 2277 } 2278#endif 2279 if (gpio_is_valid(dev->mach->gpio_pullup)) 2280 gpio_free(dev->mach->gpio_pullup); 2281 2282 clk_put(dev->clk); 2283 2284 if (dev->transceiver) { 2285 usb_put_transceiver(dev->transceiver); 2286 dev->transceiver = NULL; 2287 } 2288 2289 platform_set_drvdata(pdev, NULL); 2290 the_controller = NULL; 2291 return 0; 2292} 2293 2294/*-------------------------------------------------------------------------*/ 2295 2296#ifdef CONFIG_PM 2297 2298/* USB suspend (controlled by the host) and system suspend (controlled 2299 * by the PXA) don't necessarily work well together. If USB is active, 2300 * the 48 MHz clock is required; so the system can't enter 33 MHz idle 2301 * mode, or any deeper PM saving state. 2302 * 2303 * For now, we punt and forcibly disconnect from the USB host when PXA 2304 * enters any suspend state. While we're disconnected, we always disable 2305 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states. 2306 * Boards without software pullup control shouldn't use those states. 2307 * VBUS IRQs should probably be ignored so that the PXA device just acts 2308 * "dead" to USB hosts until system resume. 2309 */ 2310static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state) 2311{ 2312 struct pxa25x_udc *udc = platform_get_drvdata(dev); 2313 unsigned long flags; 2314 2315 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command) 2316 WARNING("USB host won't detect disconnect!\n"); 2317 udc->suspended = 1; 2318 2319 local_irq_save(flags); 2320 pullup(udc); 2321 local_irq_restore(flags); 2322 2323 return 0; 2324} 2325 2326static int pxa25x_udc_resume(struct platform_device *dev) 2327{ 2328 struct pxa25x_udc *udc = platform_get_drvdata(dev); 2329 unsigned long flags; 2330 2331 udc->suspended = 0; 2332 local_irq_save(flags); 2333 pullup(udc); 2334 local_irq_restore(flags); 2335 2336 return 0; 2337} 2338 2339#else 2340#define pxa25x_udc_suspend NULL 2341#define pxa25x_udc_resume NULL 2342#endif 2343 2344/*-------------------------------------------------------------------------*/ 2345 2346static struct platform_driver udc_driver = { 2347 .shutdown = pxa25x_udc_shutdown, 2348 .remove = __exit_p(pxa25x_udc_remove), 2349 .suspend = pxa25x_udc_suspend, 2350 .resume = pxa25x_udc_resume, 2351 .driver = { 2352 .owner = THIS_MODULE, 2353 .name = "pxa25x-udc", 2354 }, 2355}; 2356 2357static int __init udc_init(void) 2358{ 2359 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION); 2360 return platform_driver_probe(&udc_driver, pxa25x_udc_probe); 2361} 2362module_init(udc_init); 2363 2364static void __exit udc_exit(void) 2365{ 2366 platform_driver_unregister(&udc_driver); 2367} 2368module_exit(udc_exit); 2369 2370MODULE_DESCRIPTION(DRIVER_DESC); 2371MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); 2372MODULE_LICENSE("GPL"); 2373MODULE_ALIAS("platform:pxa25x-udc"); 2374