pxa25x_udc.c revision 8fb105f5cc7f31ff37755945378a668f4c21590e
1/* 2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers 3 * 4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) 5 * Copyright (C) 2003 Robert Schwebel, Pengutronix 6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix 7 * Copyright (C) 2003 David Brownell 8 * Copyright (C) 2003 Joshua Wise 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 26/* #define VERBOSE_DEBUG */ 27 28#include <linux/device.h> 29#include <linux/module.h> 30#include <linux/kernel.h> 31#include <linux/ioport.h> 32#include <linux/types.h> 33#include <linux/errno.h> 34#include <linux/delay.h> 35#include <linux/slab.h> 36#include <linux/init.h> 37#include <linux/timer.h> 38#include <linux/list.h> 39#include <linux/interrupt.h> 40#include <linux/mm.h> 41#include <linux/platform_device.h> 42#include <linux/dma-mapping.h> 43#include <linux/irq.h> 44#include <linux/clk.h> 45#include <linux/err.h> 46#include <linux/seq_file.h> 47#include <linux/debugfs.h> 48#include <linux/io.h> 49 50#include <asm/byteorder.h> 51#include <asm/dma.h> 52#include <asm/gpio.h> 53#include <asm/system.h> 54#include <asm/mach-types.h> 55#include <asm/unaligned.h> 56 57#include <linux/usb/ch9.h> 58#include <linux/usb/gadget.h> 59 60/* 61 * This driver is PXA25x only. Grab the right register definitions. 62 */ 63#ifdef CONFIG_ARCH_PXA 64#include <asm/arch/pxa25x-udc.h> 65#endif 66 67#include <asm/mach/udc_pxa2xx.h> 68 69 70/* 71 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x 72 * series processors. The UDC for the IXP 4xx series is very similar. 73 * There are fifteen endpoints, in addition to ep0. 74 * 75 * Such controller drivers work with a gadget driver. The gadget driver 76 * returns descriptors, implements configuration and data protocols used 77 * by the host to interact with this device, and allocates endpoints to 78 * the different protocol interfaces. The controller driver virtualizes 79 * usb hardware so that the gadget drivers will be more portable. 80 * 81 * This UDC hardware wants to implement a bit too much USB protocol, so 82 * it constrains the sorts of USB configuration change events that work. 83 * The errata for these chips are misleading; some "fixed" bugs from 84 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there. 85 * 86 * Note that the UDC hardware supports DMA (except on IXP) but that's 87 * not used here. IN-DMA (to host) is simple enough, when the data is 88 * suitably aligned (16 bytes) ... the network stack doesn't do that, 89 * other software can. OUT-DMA is buggy in most chip versions, as well 90 * as poorly designed (data toggle not automatic). So this driver won't 91 * bother using DMA. (Mostly-working IN-DMA support was available in 92 * kernels before 2.6.23, but was never enabled or well tested.) 93 */ 94 95#define DRIVER_VERSION "30-June-2007" 96#define DRIVER_DESC "PXA 25x USB Device Controller driver" 97 98 99static const char driver_name [] = "pxa25x_udc"; 100 101static const char ep0name [] = "ep0"; 102 103 104#ifdef CONFIG_ARCH_IXP4XX 105 106/* cpu-specific register addresses are compiled in to this code */ 107#ifdef CONFIG_ARCH_PXA 108#error "Can't configure both IXP and PXA" 109#endif 110 111/* IXP doesn't yet support <linux/clk.h> */ 112#define clk_get(dev,name) NULL 113#define clk_enable(clk) do { } while (0) 114#define clk_disable(clk) do { } while (0) 115#define clk_put(clk) do { } while (0) 116 117#endif 118 119#include "pxa25x_udc.h" 120 121 122#ifdef CONFIG_USB_PXA25X_SMALL 123#define SIZE_STR " (small)" 124#else 125#define SIZE_STR "" 126#endif 127 128/* --------------------------------------------------------------------------- 129 * endpoint related parts of the api to the usb controller hardware, 130 * used by gadget driver; and the inner talker-to-hardware core. 131 * --------------------------------------------------------------------------- 132 */ 133 134static void pxa25x_ep_fifo_flush (struct usb_ep *ep); 135static void nuke (struct pxa25x_ep *, int status); 136 137/* one GPIO should be used to detect VBUS from the host */ 138static int is_vbus_present(void) 139{ 140 struct pxa2xx_udc_mach_info *mach = the_controller->mach; 141 142 if (mach->gpio_vbus) { 143 int value = gpio_get_value(mach->gpio_vbus); 144 return mach->gpio_vbus_inverted ? !value : value; 145 } 146 if (mach->udc_is_connected) 147 return mach->udc_is_connected(); 148 return 1; 149} 150 151/* one GPIO should control a D+ pullup, so host sees this device (or not) */ 152static void pullup_off(void) 153{ 154 struct pxa2xx_udc_mach_info *mach = the_controller->mach; 155 int off_level = mach->gpio_pullup_inverted; 156 157 if (mach->gpio_pullup) 158 gpio_set_value(mach->gpio_pullup, off_level); 159 else if (mach->udc_command) 160 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT); 161} 162 163static void pullup_on(void) 164{ 165 struct pxa2xx_udc_mach_info *mach = the_controller->mach; 166 int on_level = !mach->gpio_pullup_inverted; 167 168 if (mach->gpio_pullup) 169 gpio_set_value(mach->gpio_pullup, on_level); 170 else if (mach->udc_command) 171 mach->udc_command(PXA2XX_UDC_CMD_CONNECT); 172} 173 174static void pio_irq_enable(int bEndpointAddress) 175{ 176 bEndpointAddress &= 0xf; 177 if (bEndpointAddress < 8) 178 UICR0 &= ~(1 << bEndpointAddress); 179 else { 180 bEndpointAddress -= 8; 181 UICR1 &= ~(1 << bEndpointAddress); 182 } 183} 184 185static void pio_irq_disable(int bEndpointAddress) 186{ 187 bEndpointAddress &= 0xf; 188 if (bEndpointAddress < 8) 189 UICR0 |= 1 << bEndpointAddress; 190 else { 191 bEndpointAddress -= 8; 192 UICR1 |= 1 << bEndpointAddress; 193 } 194} 195 196/* The UDCCR reg contains mask and interrupt status bits, 197 * so using '|=' isn't safe as it may ack an interrupt. 198 */ 199#define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE) 200 201static inline void udc_set_mask_UDCCR(int mask) 202{ 203 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS); 204} 205 206static inline void udc_clear_mask_UDCCR(int mask) 207{ 208 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS); 209} 210 211static inline void udc_ack_int_UDCCR(int mask) 212{ 213 /* udccr contains the bits we dont want to change */ 214 __u32 udccr = UDCCR & UDCCR_MASK_BITS; 215 216 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS); 217} 218 219/* 220 * endpoint enable/disable 221 * 222 * we need to verify the descriptors used to enable endpoints. since pxa25x 223 * endpoint configurations are fixed, and are pretty much always enabled, 224 * there's not a lot to manage here. 225 * 226 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints, 227 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except 228 * for a single interface (with only the default altsetting) and for gadget 229 * drivers that don't halt endpoints (not reset by set_interface). that also 230 * means that if you use ISO, you must violate the USB spec rule that all 231 * iso endpoints must be in non-default altsettings. 232 */ 233static int pxa25x_ep_enable (struct usb_ep *_ep, 234 const struct usb_endpoint_descriptor *desc) 235{ 236 struct pxa25x_ep *ep; 237 struct pxa25x_udc *dev; 238 239 ep = container_of (_ep, struct pxa25x_ep, ep); 240 if (!_ep || !desc || ep->desc || _ep->name == ep0name 241 || desc->bDescriptorType != USB_DT_ENDPOINT 242 || ep->bEndpointAddress != desc->bEndpointAddress 243 || ep->fifo_size < le16_to_cpu 244 (desc->wMaxPacketSize)) { 245 DMSG("%s, bad ep or descriptor\n", __func__); 246 return -EINVAL; 247 } 248 249 /* xfer types must match, except that interrupt ~= bulk */ 250 if (ep->bmAttributes != desc->bmAttributes 251 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK 252 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { 253 DMSG("%s, %s type mismatch\n", __func__, _ep->name); 254 return -EINVAL; 255 } 256 257 /* hardware _could_ do smaller, but driver doesn't */ 258 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK 259 && le16_to_cpu (desc->wMaxPacketSize) 260 != BULK_FIFO_SIZE) 261 || !desc->wMaxPacketSize) { 262 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name); 263 return -ERANGE; 264 } 265 266 dev = ep->dev; 267 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { 268 DMSG("%s, bogus device state\n", __func__); 269 return -ESHUTDOWN; 270 } 271 272 ep->desc = desc; 273 ep->stopped = 0; 274 ep->pio_irqs = 0; 275 ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize); 276 277 /* flush fifo (mostly for OUT buffers) */ 278 pxa25x_ep_fifo_flush (_ep); 279 280 /* ... reset halt state too, if we could ... */ 281 282 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name); 283 return 0; 284} 285 286static int pxa25x_ep_disable (struct usb_ep *_ep) 287{ 288 struct pxa25x_ep *ep; 289 unsigned long flags; 290 291 ep = container_of (_ep, struct pxa25x_ep, ep); 292 if (!_ep || !ep->desc) { 293 DMSG("%s, %s not enabled\n", __func__, 294 _ep ? ep->ep.name : NULL); 295 return -EINVAL; 296 } 297 local_irq_save(flags); 298 299 nuke (ep, -ESHUTDOWN); 300 301 /* flush fifo (mostly for IN buffers) */ 302 pxa25x_ep_fifo_flush (_ep); 303 304 ep->desc = NULL; 305 ep->stopped = 1; 306 307 local_irq_restore(flags); 308 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name); 309 return 0; 310} 311 312/*-------------------------------------------------------------------------*/ 313 314/* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers 315 * must still pass correctly initialized endpoints, since other controller 316 * drivers may care about how it's currently set up (dma issues etc). 317 */ 318 319/* 320 * pxa25x_ep_alloc_request - allocate a request data structure 321 */ 322static struct usb_request * 323pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags) 324{ 325 struct pxa25x_request *req; 326 327 req = kzalloc(sizeof(*req), gfp_flags); 328 if (!req) 329 return NULL; 330 331 INIT_LIST_HEAD (&req->queue); 332 return &req->req; 333} 334 335 336/* 337 * pxa25x_ep_free_request - deallocate a request data structure 338 */ 339static void 340pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req) 341{ 342 struct pxa25x_request *req; 343 344 req = container_of (_req, struct pxa25x_request, req); 345 WARN_ON (!list_empty (&req->queue)); 346 kfree(req); 347} 348 349/*-------------------------------------------------------------------------*/ 350 351/* 352 * done - retire a request; caller blocked irqs 353 */ 354static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status) 355{ 356 unsigned stopped = ep->stopped; 357 358 list_del_init(&req->queue); 359 360 if (likely (req->req.status == -EINPROGRESS)) 361 req->req.status = status; 362 else 363 status = req->req.status; 364 365 if (status && status != -ESHUTDOWN) 366 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n", 367 ep->ep.name, &req->req, status, 368 req->req.actual, req->req.length); 369 370 /* don't modify queue heads during completion callback */ 371 ep->stopped = 1; 372 req->req.complete(&ep->ep, &req->req); 373 ep->stopped = stopped; 374} 375 376 377static inline void ep0_idle (struct pxa25x_udc *dev) 378{ 379 dev->ep0state = EP0_IDLE; 380} 381 382static int 383write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max) 384{ 385 u8 *buf; 386 unsigned length, count; 387 388 buf = req->req.buf + req->req.actual; 389 prefetch(buf); 390 391 /* how big will this packet be? */ 392 length = min(req->req.length - req->req.actual, max); 393 req->req.actual += length; 394 395 count = length; 396 while (likely(count--)) 397 *uddr = *buf++; 398 399 return length; 400} 401 402/* 403 * write to an IN endpoint fifo, as many packets as possible. 404 * irqs will use this to write the rest later. 405 * caller guarantees at least one packet buffer is ready (or a zlp). 406 */ 407static int 408write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 409{ 410 unsigned max; 411 412 max = le16_to_cpu(ep->desc->wMaxPacketSize); 413 do { 414 unsigned count; 415 int is_last, is_short; 416 417 count = write_packet(ep->reg_uddr, req, max); 418 419 /* last packet is usually short (or a zlp) */ 420 if (unlikely (count != max)) 421 is_last = is_short = 1; 422 else { 423 if (likely(req->req.length != req->req.actual) 424 || req->req.zero) 425 is_last = 0; 426 else 427 is_last = 1; 428 /* interrupt/iso maxpacket may not fill the fifo */ 429 is_short = unlikely (max < ep->fifo_size); 430 } 431 432 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n", 433 ep->ep.name, count, 434 is_last ? "/L" : "", is_short ? "/S" : "", 435 req->req.length - req->req.actual, req); 436 437 /* let loose that packet. maybe try writing another one, 438 * double buffering might work. TSP, TPC, and TFS 439 * bit values are the same for all normal IN endpoints. 440 */ 441 *ep->reg_udccs = UDCCS_BI_TPC; 442 if (is_short) 443 *ep->reg_udccs = UDCCS_BI_TSP; 444 445 /* requests complete when all IN data is in the FIFO */ 446 if (is_last) { 447 done (ep, req, 0); 448 if (list_empty(&ep->queue)) 449 pio_irq_disable (ep->bEndpointAddress); 450 return 1; 451 } 452 453 // TODO experiment: how robust can fifo mode tweaking be? 454 // double buffering is off in the default fifo mode, which 455 // prevents TFS from being set here. 456 457 } while (*ep->reg_udccs & UDCCS_BI_TFS); 458 return 0; 459} 460 461/* caller asserts req->pending (ep0 irq status nyet cleared); starts 462 * ep0 data stage. these chips want very simple state transitions. 463 */ 464static inline 465void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag) 466{ 467 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR; 468 USIR0 = USIR0_IR0; 469 dev->req_pending = 0; 470 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n", 471 __func__, tag, UDCCS0, flags); 472} 473 474static int 475write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 476{ 477 unsigned count; 478 int is_short; 479 480 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE); 481 ep->dev->stats.write.bytes += count; 482 483 /* last packet "must be" short (or a zlp) */ 484 is_short = (count != EP0_FIFO_SIZE); 485 486 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count, 487 req->req.length - req->req.actual, req); 488 489 if (unlikely (is_short)) { 490 if (ep->dev->req_pending) 491 ep0start(ep->dev, UDCCS0_IPR, "short IN"); 492 else 493 UDCCS0 = UDCCS0_IPR; 494 495 count = req->req.length; 496 done (ep, req, 0); 497 ep0_idle(ep->dev); 498#ifndef CONFIG_ARCH_IXP4XX 499#if 1 500 /* This seems to get rid of lost status irqs in some cases: 501 * host responds quickly, or next request involves config 502 * change automagic, or should have been hidden, or ... 503 * 504 * FIXME get rid of all udelays possible... 505 */ 506 if (count >= EP0_FIFO_SIZE) { 507 count = 100; 508 do { 509 if ((UDCCS0 & UDCCS0_OPR) != 0) { 510 /* clear OPR, generate ack */ 511 UDCCS0 = UDCCS0_OPR; 512 break; 513 } 514 count--; 515 udelay(1); 516 } while (count); 517 } 518#endif 519#endif 520 } else if (ep->dev->req_pending) 521 ep0start(ep->dev, 0, "IN"); 522 return is_short; 523} 524 525 526/* 527 * read_fifo - unload packet(s) from the fifo we use for usb OUT 528 * transfers and put them into the request. caller should have made 529 * sure there's at least one packet ready. 530 * 531 * returns true if the request completed because of short packet or the 532 * request buffer having filled (and maybe overran till end-of-packet). 533 */ 534static int 535read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 536{ 537 for (;;) { 538 u32 udccs; 539 u8 *buf; 540 unsigned bufferspace, count, is_short; 541 542 /* make sure there's a packet in the FIFO. 543 * UDCCS_{BO,IO}_RPC are all the same bit value. 544 * UDCCS_{BO,IO}_RNE are all the same bit value. 545 */ 546 udccs = *ep->reg_udccs; 547 if (unlikely ((udccs & UDCCS_BO_RPC) == 0)) 548 break; 549 buf = req->req.buf + req->req.actual; 550 prefetchw(buf); 551 bufferspace = req->req.length - req->req.actual; 552 553 /* read all bytes from this packet */ 554 if (likely (udccs & UDCCS_BO_RNE)) { 555 count = 1 + (0x0ff & *ep->reg_ubcr); 556 req->req.actual += min (count, bufferspace); 557 } else /* zlp */ 558 count = 0; 559 is_short = (count < ep->ep.maxpacket); 560 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n", 561 ep->ep.name, udccs, count, 562 is_short ? "/S" : "", 563 req, req->req.actual, req->req.length); 564 while (likely (count-- != 0)) { 565 u8 byte = (u8) *ep->reg_uddr; 566 567 if (unlikely (bufferspace == 0)) { 568 /* this happens when the driver's buffer 569 * is smaller than what the host sent. 570 * discard the extra data. 571 */ 572 if (req->req.status != -EOVERFLOW) 573 DMSG("%s overflow %d\n", 574 ep->ep.name, count); 575 req->req.status = -EOVERFLOW; 576 } else { 577 *buf++ = byte; 578 bufferspace--; 579 } 580 } 581 *ep->reg_udccs = UDCCS_BO_RPC; 582 /* RPC/RSP/RNE could now reflect the other packet buffer */ 583 584 /* iso is one request per packet */ 585 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { 586 if (udccs & UDCCS_IO_ROF) 587 req->req.status = -EHOSTUNREACH; 588 /* more like "is_done" */ 589 is_short = 1; 590 } 591 592 /* completion */ 593 if (is_short || req->req.actual == req->req.length) { 594 done (ep, req, 0); 595 if (list_empty(&ep->queue)) 596 pio_irq_disable (ep->bEndpointAddress); 597 return 1; 598 } 599 600 /* finished that packet. the next one may be waiting... */ 601 } 602 return 0; 603} 604 605/* 606 * special ep0 version of the above. no UBCR0 or double buffering; status 607 * handshaking is magic. most device protocols don't need control-OUT. 608 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other 609 * protocols do use them. 610 */ 611static int 612read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 613{ 614 u8 *buf, byte; 615 unsigned bufferspace; 616 617 buf = req->req.buf + req->req.actual; 618 bufferspace = req->req.length - req->req.actual; 619 620 while (UDCCS0 & UDCCS0_RNE) { 621 byte = (u8) UDDR0; 622 623 if (unlikely (bufferspace == 0)) { 624 /* this happens when the driver's buffer 625 * is smaller than what the host sent. 626 * discard the extra data. 627 */ 628 if (req->req.status != -EOVERFLOW) 629 DMSG("%s overflow\n", ep->ep.name); 630 req->req.status = -EOVERFLOW; 631 } else { 632 *buf++ = byte; 633 req->req.actual++; 634 bufferspace--; 635 } 636 } 637 638 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR; 639 640 /* completion */ 641 if (req->req.actual >= req->req.length) 642 return 1; 643 644 /* finished that packet. the next one may be waiting... */ 645 return 0; 646} 647 648/*-------------------------------------------------------------------------*/ 649 650static int 651pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) 652{ 653 struct pxa25x_request *req; 654 struct pxa25x_ep *ep; 655 struct pxa25x_udc *dev; 656 unsigned long flags; 657 658 req = container_of(_req, struct pxa25x_request, req); 659 if (unlikely (!_req || !_req->complete || !_req->buf 660 || !list_empty(&req->queue))) { 661 DMSG("%s, bad params\n", __func__); 662 return -EINVAL; 663 } 664 665 ep = container_of(_ep, struct pxa25x_ep, ep); 666 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) { 667 DMSG("%s, bad ep\n", __func__); 668 return -EINVAL; 669 } 670 671 dev = ep->dev; 672 if (unlikely (!dev->driver 673 || dev->gadget.speed == USB_SPEED_UNKNOWN)) { 674 DMSG("%s, bogus device state\n", __func__); 675 return -ESHUTDOWN; 676 } 677 678 /* iso is always one packet per request, that's the only way 679 * we can report per-packet status. that also helps with dma. 680 */ 681 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC 682 && req->req.length > le16_to_cpu 683 (ep->desc->wMaxPacketSize))) 684 return -EMSGSIZE; 685 686 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n", 687 _ep->name, _req, _req->length, _req->buf); 688 689 local_irq_save(flags); 690 691 _req->status = -EINPROGRESS; 692 _req->actual = 0; 693 694 /* kickstart this i/o queue? */ 695 if (list_empty(&ep->queue) && !ep->stopped) { 696 if (ep->desc == NULL/* ep0 */) { 697 unsigned length = _req->length; 698 699 switch (dev->ep0state) { 700 case EP0_IN_DATA_PHASE: 701 dev->stats.write.ops++; 702 if (write_ep0_fifo(ep, req)) 703 req = NULL; 704 break; 705 706 case EP0_OUT_DATA_PHASE: 707 dev->stats.read.ops++; 708 /* messy ... */ 709 if (dev->req_config) { 710 DBG(DBG_VERBOSE, "ep0 config ack%s\n", 711 dev->has_cfr ? "" : " raced"); 712 if (dev->has_cfr) 713 UDCCFR = UDCCFR_AREN|UDCCFR_ACM 714 |UDCCFR_MB1; 715 done(ep, req, 0); 716 dev->ep0state = EP0_END_XFER; 717 local_irq_restore (flags); 718 return 0; 719 } 720 if (dev->req_pending) 721 ep0start(dev, UDCCS0_IPR, "OUT"); 722 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0 723 && read_ep0_fifo(ep, req))) { 724 ep0_idle(dev); 725 done(ep, req, 0); 726 req = NULL; 727 } 728 break; 729 730 default: 731 DMSG("ep0 i/o, odd state %d\n", dev->ep0state); 732 local_irq_restore (flags); 733 return -EL2HLT; 734 } 735 /* can the FIFO can satisfy the request immediately? */ 736 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { 737 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0 738 && write_fifo(ep, req)) 739 req = NULL; 740 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0 741 && read_fifo(ep, req)) { 742 req = NULL; 743 } 744 745 if (likely (req && ep->desc)) 746 pio_irq_enable(ep->bEndpointAddress); 747 } 748 749 /* pio or dma irq handler advances the queue. */ 750 if (likely(req != NULL)) 751 list_add_tail(&req->queue, &ep->queue); 752 local_irq_restore(flags); 753 754 return 0; 755} 756 757 758/* 759 * nuke - dequeue ALL requests 760 */ 761static void nuke(struct pxa25x_ep *ep, int status) 762{ 763 struct pxa25x_request *req; 764 765 /* called with irqs blocked */ 766 while (!list_empty(&ep->queue)) { 767 req = list_entry(ep->queue.next, 768 struct pxa25x_request, 769 queue); 770 done(ep, req, status); 771 } 772 if (ep->desc) 773 pio_irq_disable (ep->bEndpointAddress); 774} 775 776 777/* dequeue JUST ONE request */ 778static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 779{ 780 struct pxa25x_ep *ep; 781 struct pxa25x_request *req; 782 unsigned long flags; 783 784 ep = container_of(_ep, struct pxa25x_ep, ep); 785 if (!_ep || ep->ep.name == ep0name) 786 return -EINVAL; 787 788 local_irq_save(flags); 789 790 /* make sure it's actually queued on this endpoint */ 791 list_for_each_entry (req, &ep->queue, queue) { 792 if (&req->req == _req) 793 break; 794 } 795 if (&req->req != _req) { 796 local_irq_restore(flags); 797 return -EINVAL; 798 } 799 800 done(ep, req, -ECONNRESET); 801 802 local_irq_restore(flags); 803 return 0; 804} 805 806/*-------------------------------------------------------------------------*/ 807 808static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value) 809{ 810 struct pxa25x_ep *ep; 811 unsigned long flags; 812 813 ep = container_of(_ep, struct pxa25x_ep, ep); 814 if (unlikely (!_ep 815 || (!ep->desc && ep->ep.name != ep0name)) 816 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { 817 DMSG("%s, bad ep\n", __func__); 818 return -EINVAL; 819 } 820 if (value == 0) { 821 /* this path (reset toggle+halt) is needed to implement 822 * SET_INTERFACE on normal hardware. but it can't be 823 * done from software on the PXA UDC, and the hardware 824 * forgets to do it as part of SET_INTERFACE automagic. 825 */ 826 DMSG("only host can clear %s halt\n", _ep->name); 827 return -EROFS; 828 } 829 830 local_irq_save(flags); 831 832 if ((ep->bEndpointAddress & USB_DIR_IN) != 0 833 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0 834 || !list_empty(&ep->queue))) { 835 local_irq_restore(flags); 836 return -EAGAIN; 837 } 838 839 /* FST bit is the same for control, bulk in, bulk out, interrupt in */ 840 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF; 841 842 /* ep0 needs special care */ 843 if (!ep->desc) { 844 start_watchdog(ep->dev); 845 ep->dev->req_pending = 0; 846 ep->dev->ep0state = EP0_STALL; 847 848 /* and bulk/intr endpoints like dropping stalls too */ 849 } else { 850 unsigned i; 851 for (i = 0; i < 1000; i += 20) { 852 if (*ep->reg_udccs & UDCCS_BI_SST) 853 break; 854 udelay(20); 855 } 856 } 857 local_irq_restore(flags); 858 859 DBG(DBG_VERBOSE, "%s halt\n", _ep->name); 860 return 0; 861} 862 863static int pxa25x_ep_fifo_status(struct usb_ep *_ep) 864{ 865 struct pxa25x_ep *ep; 866 867 ep = container_of(_ep, struct pxa25x_ep, ep); 868 if (!_ep) { 869 DMSG("%s, bad ep\n", __func__); 870 return -ENODEV; 871 } 872 /* pxa can't report unclaimed bytes from IN fifos */ 873 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) 874 return -EOPNOTSUPP; 875 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN 876 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0) 877 return 0; 878 else 879 return (*ep->reg_ubcr & 0xfff) + 1; 880} 881 882static void pxa25x_ep_fifo_flush(struct usb_ep *_ep) 883{ 884 struct pxa25x_ep *ep; 885 886 ep = container_of(_ep, struct pxa25x_ep, ep); 887 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) { 888 DMSG("%s, bad ep\n", __func__); 889 return; 890 } 891 892 /* toggle and halt bits stay unchanged */ 893 894 /* for OUT, just read and discard the FIFO contents. */ 895 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) { 896 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0) 897 (void) *ep->reg_uddr; 898 return; 899 } 900 901 /* most IN status is the same, but ISO can't stall */ 902 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR 903 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) 904 ? 0 : UDCCS_BI_SST; 905} 906 907 908static struct usb_ep_ops pxa25x_ep_ops = { 909 .enable = pxa25x_ep_enable, 910 .disable = pxa25x_ep_disable, 911 912 .alloc_request = pxa25x_ep_alloc_request, 913 .free_request = pxa25x_ep_free_request, 914 915 .queue = pxa25x_ep_queue, 916 .dequeue = pxa25x_ep_dequeue, 917 918 .set_halt = pxa25x_ep_set_halt, 919 .fifo_status = pxa25x_ep_fifo_status, 920 .fifo_flush = pxa25x_ep_fifo_flush, 921}; 922 923 924/* --------------------------------------------------------------------------- 925 * device-scoped parts of the api to the usb controller hardware 926 * --------------------------------------------------------------------------- 927 */ 928 929static int pxa25x_udc_get_frame(struct usb_gadget *_gadget) 930{ 931 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff); 932} 933 934static int pxa25x_udc_wakeup(struct usb_gadget *_gadget) 935{ 936 /* host may not have enabled remote wakeup */ 937 if ((UDCCS0 & UDCCS0_DRWF) == 0) 938 return -EHOSTUNREACH; 939 udc_set_mask_UDCCR(UDCCR_RSM); 940 return 0; 941} 942 943static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *); 944static void udc_enable (struct pxa25x_udc *); 945static void udc_disable(struct pxa25x_udc *); 946 947/* We disable the UDC -- and its 48 MHz clock -- whenever it's not 948 * in active use. 949 */ 950static int pullup(struct pxa25x_udc *udc) 951{ 952 int is_active = udc->vbus && udc->pullup && !udc->suspended; 953 DMSG("%s\n", is_active ? "active" : "inactive"); 954 if (is_active) { 955 if (!udc->active) { 956 udc->active = 1; 957 /* Enable clock for USB device */ 958 clk_enable(udc->clk); 959 udc_enable(udc); 960 } 961 } else { 962 if (udc->active) { 963 if (udc->gadget.speed != USB_SPEED_UNKNOWN) { 964 DMSG("disconnect %s\n", udc->driver 965 ? udc->driver->driver.name 966 : "(no driver)"); 967 stop_activity(udc, udc->driver); 968 } 969 udc_disable(udc); 970 /* Disable clock for USB device */ 971 clk_disable(udc->clk); 972 udc->active = 0; 973 } 974 975 } 976 return 0; 977} 978 979/* VBUS reporting logically comes from a transceiver */ 980static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 981{ 982 struct pxa25x_udc *udc; 983 984 udc = container_of(_gadget, struct pxa25x_udc, gadget); 985 udc->vbus = (is_active != 0); 986 DMSG("vbus %s\n", is_active ? "supplied" : "inactive"); 987 pullup(udc); 988 return 0; 989} 990 991/* drivers may have software control over D+ pullup */ 992static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active) 993{ 994 struct pxa25x_udc *udc; 995 996 udc = container_of(_gadget, struct pxa25x_udc, gadget); 997 998 /* not all boards support pullup control */ 999 if (!udc->mach->gpio_pullup && !udc->mach->udc_command) 1000 return -EOPNOTSUPP; 1001 1002 udc->pullup = (is_active != 0); 1003 pullup(udc); 1004 return 0; 1005} 1006 1007static const struct usb_gadget_ops pxa25x_udc_ops = { 1008 .get_frame = pxa25x_udc_get_frame, 1009 .wakeup = pxa25x_udc_wakeup, 1010 .vbus_session = pxa25x_udc_vbus_session, 1011 .pullup = pxa25x_udc_pullup, 1012 1013 // .vbus_draw ... boards may consume current from VBUS, up to 1014 // 100-500mA based on config. the 500uA suspend ceiling means 1015 // that exclusively vbus-powered PXA designs violate USB specs. 1016}; 1017 1018/*-------------------------------------------------------------------------*/ 1019 1020#ifdef CONFIG_USB_GADGET_DEBUG_FS 1021 1022static int 1023udc_seq_show(struct seq_file *m, void *_d) 1024{ 1025 struct pxa25x_udc *dev = m->private; 1026 unsigned long flags; 1027 int i; 1028 u32 tmp; 1029 1030 local_irq_save(flags); 1031 1032 /* basic device status */ 1033 seq_printf(m, DRIVER_DESC "\n" 1034 "%s version: %s\nGadget driver: %s\nHost %s\n\n", 1035 driver_name, DRIVER_VERSION SIZE_STR "(pio)", 1036 dev->driver ? dev->driver->driver.name : "(none)", 1037 is_vbus_present() ? "full speed" : "disconnected"); 1038 1039 /* registers for device and ep0 */ 1040 seq_printf(m, 1041 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", 1042 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL); 1043 1044 tmp = UDCCR; 1045 seq_printf(m, 1046 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp, 1047 (tmp & UDCCR_REM) ? " rem" : "", 1048 (tmp & UDCCR_RSTIR) ? " rstir" : "", 1049 (tmp & UDCCR_SRM) ? " srm" : "", 1050 (tmp & UDCCR_SUSIR) ? " susir" : "", 1051 (tmp & UDCCR_RESIR) ? " resir" : "", 1052 (tmp & UDCCR_RSM) ? " rsm" : "", 1053 (tmp & UDCCR_UDA) ? " uda" : "", 1054 (tmp & UDCCR_UDE) ? " ude" : ""); 1055 1056 tmp = UDCCS0; 1057 seq_printf(m, 1058 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp, 1059 (tmp & UDCCS0_SA) ? " sa" : "", 1060 (tmp & UDCCS0_RNE) ? " rne" : "", 1061 (tmp & UDCCS0_FST) ? " fst" : "", 1062 (tmp & UDCCS0_SST) ? " sst" : "", 1063 (tmp & UDCCS0_DRWF) ? " dwrf" : "", 1064 (tmp & UDCCS0_FTF) ? " ftf" : "", 1065 (tmp & UDCCS0_IPR) ? " ipr" : "", 1066 (tmp & UDCCS0_OPR) ? " opr" : ""); 1067 1068 if (dev->has_cfr) { 1069 tmp = UDCCFR; 1070 seq_printf(m, 1071 "udccfr %02X =%s%s\n", tmp, 1072 (tmp & UDCCFR_AREN) ? " aren" : "", 1073 (tmp & UDCCFR_ACM) ? " acm" : ""); 1074 } 1075 1076 if (!is_vbus_present() || !dev->driver) 1077 goto done; 1078 1079 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n", 1080 dev->stats.write.bytes, dev->stats.write.ops, 1081 dev->stats.read.bytes, dev->stats.read.ops, 1082 dev->stats.irqs); 1083 1084 /* dump endpoint queues */ 1085 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1086 struct pxa25x_ep *ep = &dev->ep [i]; 1087 struct pxa25x_request *req; 1088 1089 if (i != 0) { 1090 const struct usb_endpoint_descriptor *desc; 1091 1092 desc = ep->desc; 1093 if (!desc) 1094 continue; 1095 tmp = *dev->ep [i].reg_udccs; 1096 seq_printf(m, 1097 "%s max %d %s udccs %02x irqs %lu\n", 1098 ep->ep.name, le16_to_cpu(desc->wMaxPacketSize), 1099 "pio", tmp, ep->pio_irqs); 1100 /* TODO translate all five groups of udccs bits! */ 1101 1102 } else /* ep0 should only have one transfer queued */ 1103 seq_printf(m, "ep0 max 16 pio irqs %lu\n", 1104 ep->pio_irqs); 1105 1106 if (list_empty(&ep->queue)) { 1107 seq_printf(m, "\t(nothing queued)\n"); 1108 continue; 1109 } 1110 list_for_each_entry(req, &ep->queue, queue) { 1111 seq_printf(m, 1112 "\treq %p len %d/%d buf %p\n", 1113 &req->req, req->req.actual, 1114 req->req.length, req->req.buf); 1115 } 1116 } 1117 1118done: 1119 local_irq_restore(flags); 1120 return 0; 1121} 1122 1123static int 1124udc_debugfs_open(struct inode *inode, struct file *file) 1125{ 1126 return single_open(file, udc_seq_show, inode->i_private); 1127} 1128 1129static const struct file_operations debug_fops = { 1130 .open = udc_debugfs_open, 1131 .read = seq_read, 1132 .llseek = seq_lseek, 1133 .release = single_release, 1134 .owner = THIS_MODULE, 1135}; 1136 1137#define create_debug_files(dev) \ 1138 do { \ 1139 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \ 1140 S_IRUGO, NULL, dev, &debug_fops); \ 1141 } while (0) 1142#define remove_debug_files(dev) \ 1143 do { \ 1144 if (dev->debugfs_udc) \ 1145 debugfs_remove(dev->debugfs_udc); \ 1146 } while (0) 1147 1148#else /* !CONFIG_USB_GADGET_DEBUG_FILES */ 1149 1150#define create_debug_files(dev) do {} while (0) 1151#define remove_debug_files(dev) do {} while (0) 1152 1153#endif /* CONFIG_USB_GADGET_DEBUG_FILES */ 1154 1155/*-------------------------------------------------------------------------*/ 1156 1157/* 1158 * udc_disable - disable USB device controller 1159 */ 1160static void udc_disable(struct pxa25x_udc *dev) 1161{ 1162 /* block all irqs */ 1163 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM); 1164 UICR0 = UICR1 = 0xff; 1165 UFNRH = UFNRH_SIM; 1166 1167 /* if hardware supports it, disconnect from usb */ 1168 pullup_off(); 1169 1170 udc_clear_mask_UDCCR(UDCCR_UDE); 1171 1172 ep0_idle (dev); 1173 dev->gadget.speed = USB_SPEED_UNKNOWN; 1174} 1175 1176 1177/* 1178 * udc_reinit - initialize software state 1179 */ 1180static void udc_reinit(struct pxa25x_udc *dev) 1181{ 1182 u32 i; 1183 1184 /* device/ep0 records init */ 1185 INIT_LIST_HEAD (&dev->gadget.ep_list); 1186 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list); 1187 dev->ep0state = EP0_IDLE; 1188 1189 /* basic endpoint records init */ 1190 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1191 struct pxa25x_ep *ep = &dev->ep[i]; 1192 1193 if (i != 0) 1194 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list); 1195 1196 ep->desc = NULL; 1197 ep->stopped = 0; 1198 INIT_LIST_HEAD (&ep->queue); 1199 ep->pio_irqs = 0; 1200 } 1201 1202 /* the rest was statically initialized, and is read-only */ 1203} 1204 1205/* until it's enabled, this UDC should be completely invisible 1206 * to any USB host. 1207 */ 1208static void udc_enable (struct pxa25x_udc *dev) 1209{ 1210 udc_clear_mask_UDCCR(UDCCR_UDE); 1211 1212 /* try to clear these bits before we enable the udc */ 1213 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR); 1214 1215 ep0_idle(dev); 1216 dev->gadget.speed = USB_SPEED_UNKNOWN; 1217 dev->stats.irqs = 0; 1218 1219 /* 1220 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual: 1221 * - enable UDC 1222 * - if RESET is already in progress, ack interrupt 1223 * - unmask reset interrupt 1224 */ 1225 udc_set_mask_UDCCR(UDCCR_UDE); 1226 if (!(UDCCR & UDCCR_UDA)) 1227 udc_ack_int_UDCCR(UDCCR_RSTIR); 1228 1229 if (dev->has_cfr /* UDC_RES2 is defined */) { 1230 /* pxa255 (a0+) can avoid a set_config race that could 1231 * prevent gadget drivers from configuring correctly 1232 */ 1233 UDCCFR = UDCCFR_ACM | UDCCFR_MB1; 1234 } else { 1235 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1) 1236 * which could result in missing packets and interrupts. 1237 * supposedly one bit per endpoint, controlling whether it 1238 * double buffers or not; ACM/AREN bits fit into the holes. 1239 * zero bits (like USIR0_IRx) disable double buffering. 1240 */ 1241 UDC_RES1 = 0x00; 1242 UDC_RES2 = 0x00; 1243 } 1244 1245 /* enable suspend/resume and reset irqs */ 1246 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM); 1247 1248 /* enable ep0 irqs */ 1249 UICR0 &= ~UICR0_IM0; 1250 1251 /* if hardware supports it, pullup D+ and wait for reset */ 1252 pullup_on(); 1253} 1254 1255 1256/* when a driver is successfully registered, it will receive 1257 * control requests including set_configuration(), which enables 1258 * non-control requests. then usb traffic follows until a 1259 * disconnect is reported. then a host may connect again, or 1260 * the driver might get unbound. 1261 */ 1262int usb_gadget_register_driver(struct usb_gadget_driver *driver) 1263{ 1264 struct pxa25x_udc *dev = the_controller; 1265 int retval; 1266 1267 if (!driver 1268 || driver->speed < USB_SPEED_FULL 1269 || !driver->bind 1270 || !driver->disconnect 1271 || !driver->setup) 1272 return -EINVAL; 1273 if (!dev) 1274 return -ENODEV; 1275 if (dev->driver) 1276 return -EBUSY; 1277 1278 /* first hook up the driver ... */ 1279 dev->driver = driver; 1280 dev->gadget.dev.driver = &driver->driver; 1281 dev->pullup = 1; 1282 1283 retval = device_add (&dev->gadget.dev); 1284 if (retval) { 1285fail: 1286 dev->driver = NULL; 1287 dev->gadget.dev.driver = NULL; 1288 return retval; 1289 } 1290 retval = driver->bind(&dev->gadget); 1291 if (retval) { 1292 DMSG("bind to driver %s --> error %d\n", 1293 driver->driver.name, retval); 1294 device_del (&dev->gadget.dev); 1295 goto fail; 1296 } 1297 1298 /* ... then enable host detection and ep0; and we're ready 1299 * for set_configuration as well as eventual disconnect. 1300 */ 1301 DMSG("registered gadget driver '%s'\n", driver->driver.name); 1302 pullup(dev); 1303 dump_state(dev); 1304 return 0; 1305} 1306EXPORT_SYMBOL(usb_gadget_register_driver); 1307 1308static void 1309stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver) 1310{ 1311 int i; 1312 1313 /* don't disconnect drivers more than once */ 1314 if (dev->gadget.speed == USB_SPEED_UNKNOWN) 1315 driver = NULL; 1316 dev->gadget.speed = USB_SPEED_UNKNOWN; 1317 1318 /* prevent new request submissions, kill any outstanding requests */ 1319 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1320 struct pxa25x_ep *ep = &dev->ep[i]; 1321 1322 ep->stopped = 1; 1323 nuke(ep, -ESHUTDOWN); 1324 } 1325 del_timer_sync(&dev->timer); 1326 1327 /* report disconnect; the driver is already quiesced */ 1328 if (driver) 1329 driver->disconnect(&dev->gadget); 1330 1331 /* re-init driver-visible data structures */ 1332 udc_reinit(dev); 1333} 1334 1335int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 1336{ 1337 struct pxa25x_udc *dev = the_controller; 1338 1339 if (!dev) 1340 return -ENODEV; 1341 if (!driver || driver != dev->driver || !driver->unbind) 1342 return -EINVAL; 1343 1344 local_irq_disable(); 1345 dev->pullup = 0; 1346 pullup(dev); 1347 stop_activity(dev, driver); 1348 local_irq_enable(); 1349 1350 driver->unbind(&dev->gadget); 1351 dev->gadget.dev.driver = NULL; 1352 dev->driver = NULL; 1353 1354 device_del (&dev->gadget.dev); 1355 1356 DMSG("unregistered gadget driver '%s'\n", driver->driver.name); 1357 dump_state(dev); 1358 return 0; 1359} 1360EXPORT_SYMBOL(usb_gadget_unregister_driver); 1361 1362 1363/*-------------------------------------------------------------------------*/ 1364 1365#ifdef CONFIG_ARCH_LUBBOCK 1366 1367/* Lubbock has separate connect and disconnect irqs. More typical designs 1368 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup. 1369 */ 1370 1371static irqreturn_t 1372lubbock_vbus_irq(int irq, void *_dev) 1373{ 1374 struct pxa25x_udc *dev = _dev; 1375 int vbus; 1376 1377 dev->stats.irqs++; 1378 switch (irq) { 1379 case LUBBOCK_USB_IRQ: 1380 vbus = 1; 1381 disable_irq(LUBBOCK_USB_IRQ); 1382 enable_irq(LUBBOCK_USB_DISC_IRQ); 1383 break; 1384 case LUBBOCK_USB_DISC_IRQ: 1385 vbus = 0; 1386 disable_irq(LUBBOCK_USB_DISC_IRQ); 1387 enable_irq(LUBBOCK_USB_IRQ); 1388 break; 1389 default: 1390 return IRQ_NONE; 1391 } 1392 1393 pxa25x_udc_vbus_session(&dev->gadget, vbus); 1394 return IRQ_HANDLED; 1395} 1396 1397#endif 1398 1399static irqreturn_t udc_vbus_irq(int irq, void *_dev) 1400{ 1401 struct pxa25x_udc *dev = _dev; 1402 int vbus = gpio_get_value(dev->mach->gpio_vbus); 1403 1404 if (dev->mach->gpio_vbus_inverted) 1405 vbus = !vbus; 1406 1407 pxa25x_udc_vbus_session(&dev->gadget, vbus); 1408 return IRQ_HANDLED; 1409} 1410 1411 1412/*-------------------------------------------------------------------------*/ 1413 1414static inline void clear_ep_state (struct pxa25x_udc *dev) 1415{ 1416 unsigned i; 1417 1418 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint 1419 * fifos, and pending transactions mustn't be continued in any case. 1420 */ 1421 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) 1422 nuke(&dev->ep[i], -ECONNABORTED); 1423} 1424 1425static void udc_watchdog(unsigned long _dev) 1426{ 1427 struct pxa25x_udc *dev = (void *)_dev; 1428 1429 local_irq_disable(); 1430 if (dev->ep0state == EP0_STALL 1431 && (UDCCS0 & UDCCS0_FST) == 0 1432 && (UDCCS0 & UDCCS0_SST) == 0) { 1433 UDCCS0 = UDCCS0_FST|UDCCS0_FTF; 1434 DBG(DBG_VERBOSE, "ep0 re-stall\n"); 1435 start_watchdog(dev); 1436 } 1437 local_irq_enable(); 1438} 1439 1440static void handle_ep0 (struct pxa25x_udc *dev) 1441{ 1442 u32 udccs0 = UDCCS0; 1443 struct pxa25x_ep *ep = &dev->ep [0]; 1444 struct pxa25x_request *req; 1445 union { 1446 struct usb_ctrlrequest r; 1447 u8 raw [8]; 1448 u32 word [2]; 1449 } u; 1450 1451 if (list_empty(&ep->queue)) 1452 req = NULL; 1453 else 1454 req = list_entry(ep->queue.next, struct pxa25x_request, queue); 1455 1456 /* clear stall status */ 1457 if (udccs0 & UDCCS0_SST) { 1458 nuke(ep, -EPIPE); 1459 UDCCS0 = UDCCS0_SST; 1460 del_timer(&dev->timer); 1461 ep0_idle(dev); 1462 } 1463 1464 /* previous request unfinished? non-error iff back-to-back ... */ 1465 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) { 1466 nuke(ep, 0); 1467 del_timer(&dev->timer); 1468 ep0_idle(dev); 1469 } 1470 1471 switch (dev->ep0state) { 1472 case EP0_IDLE: 1473 /* late-breaking status? */ 1474 udccs0 = UDCCS0; 1475 1476 /* start control request? */ 1477 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE)) 1478 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) { 1479 int i; 1480 1481 nuke (ep, -EPROTO); 1482 1483 /* read SETUP packet */ 1484 for (i = 0; i < 8; i++) { 1485 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) { 1486bad_setup: 1487 DMSG("SETUP %d!\n", i); 1488 goto stall; 1489 } 1490 u.raw [i] = (u8) UDDR0; 1491 } 1492 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0)) 1493 goto bad_setup; 1494 1495got_setup: 1496 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n", 1497 u.r.bRequestType, u.r.bRequest, 1498 le16_to_cpu(u.r.wValue), 1499 le16_to_cpu(u.r.wIndex), 1500 le16_to_cpu(u.r.wLength)); 1501 1502 /* cope with automagic for some standard requests. */ 1503 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK) 1504 == USB_TYPE_STANDARD; 1505 dev->req_config = 0; 1506 dev->req_pending = 1; 1507 switch (u.r.bRequest) { 1508 /* hardware restricts gadget drivers here! */ 1509 case USB_REQ_SET_CONFIGURATION: 1510 if (u.r.bRequestType == USB_RECIP_DEVICE) { 1511 /* reflect hardware's automagic 1512 * up to the gadget driver. 1513 */ 1514config_change: 1515 dev->req_config = 1; 1516 clear_ep_state(dev); 1517 /* if !has_cfr, there's no synch 1518 * else use AREN (later) not SA|OPR 1519 * USIR0_IR0 acts edge sensitive 1520 */ 1521 } 1522 break; 1523 /* ... and here, even more ... */ 1524 case USB_REQ_SET_INTERFACE: 1525 if (u.r.bRequestType == USB_RECIP_INTERFACE) { 1526 /* udc hardware is broken by design: 1527 * - altsetting may only be zero; 1528 * - hw resets all interfaces' eps; 1529 * - ep reset doesn't include halt(?). 1530 */ 1531 DMSG("broken set_interface (%d/%d)\n", 1532 le16_to_cpu(u.r.wIndex), 1533 le16_to_cpu(u.r.wValue)); 1534 goto config_change; 1535 } 1536 break; 1537 /* hardware was supposed to hide this */ 1538 case USB_REQ_SET_ADDRESS: 1539 if (u.r.bRequestType == USB_RECIP_DEVICE) { 1540 ep0start(dev, 0, "address"); 1541 return; 1542 } 1543 break; 1544 } 1545 1546 if (u.r.bRequestType & USB_DIR_IN) 1547 dev->ep0state = EP0_IN_DATA_PHASE; 1548 else 1549 dev->ep0state = EP0_OUT_DATA_PHASE; 1550 1551 i = dev->driver->setup(&dev->gadget, &u.r); 1552 if (i < 0) { 1553 /* hardware automagic preventing STALL... */ 1554 if (dev->req_config) { 1555 /* hardware sometimes neglects to tell 1556 * tell us about config change events, 1557 * so later ones may fail... 1558 */ 1559 WARN("config change %02x fail %d?\n", 1560 u.r.bRequest, i); 1561 return; 1562 /* TODO experiment: if has_cfr, 1563 * hardware didn't ACK; maybe we 1564 * could actually STALL! 1565 */ 1566 } 1567 DBG(DBG_VERBOSE, "protocol STALL, " 1568 "%02x err %d\n", UDCCS0, i); 1569stall: 1570 /* the watchdog timer helps deal with cases 1571 * where udc seems to clear FST wrongly, and 1572 * then NAKs instead of STALLing. 1573 */ 1574 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall"); 1575 start_watchdog(dev); 1576 dev->ep0state = EP0_STALL; 1577 1578 /* deferred i/o == no response yet */ 1579 } else if (dev->req_pending) { 1580 if (likely(dev->ep0state == EP0_IN_DATA_PHASE 1581 || dev->req_std || u.r.wLength)) 1582 ep0start(dev, 0, "defer"); 1583 else 1584 ep0start(dev, UDCCS0_IPR, "defer/IPR"); 1585 } 1586 1587 /* expect at least one data or status stage irq */ 1588 return; 1589 1590 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA)) 1591 == (UDCCS0_OPR|UDCCS0_SA))) { 1592 unsigned i; 1593 1594 /* pxa210/250 erratum 131 for B0/B1 says RNE lies. 1595 * still observed on a pxa255 a0. 1596 */ 1597 DBG(DBG_VERBOSE, "e131\n"); 1598 nuke(ep, -EPROTO); 1599 1600 /* read SETUP data, but don't trust it too much */ 1601 for (i = 0; i < 8; i++) 1602 u.raw [i] = (u8) UDDR0; 1603 if ((u.r.bRequestType & USB_RECIP_MASK) 1604 > USB_RECIP_OTHER) 1605 goto stall; 1606 if (u.word [0] == 0 && u.word [1] == 0) 1607 goto stall; 1608 goto got_setup; 1609 } else { 1610 /* some random early IRQ: 1611 * - we acked FST 1612 * - IPR cleared 1613 * - OPR got set, without SA (likely status stage) 1614 */ 1615 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR); 1616 } 1617 break; 1618 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ 1619 if (udccs0 & UDCCS0_OPR) { 1620 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF; 1621 DBG(DBG_VERBOSE, "ep0in premature status\n"); 1622 if (req) 1623 done(ep, req, 0); 1624 ep0_idle(dev); 1625 } else /* irq was IPR clearing */ { 1626 if (req) { 1627 /* this IN packet might finish the request */ 1628 (void) write_ep0_fifo(ep, req); 1629 } /* else IN token before response was written */ 1630 } 1631 break; 1632 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ 1633 if (udccs0 & UDCCS0_OPR) { 1634 if (req) { 1635 /* this OUT packet might finish the request */ 1636 if (read_ep0_fifo(ep, req)) 1637 done(ep, req, 0); 1638 /* else more OUT packets expected */ 1639 } /* else OUT token before read was issued */ 1640 } else /* irq was IPR clearing */ { 1641 DBG(DBG_VERBOSE, "ep0out premature status\n"); 1642 if (req) 1643 done(ep, req, 0); 1644 ep0_idle(dev); 1645 } 1646 break; 1647 case EP0_END_XFER: 1648 if (req) 1649 done(ep, req, 0); 1650 /* ack control-IN status (maybe in-zlp was skipped) 1651 * also appears after some config change events. 1652 */ 1653 if (udccs0 & UDCCS0_OPR) 1654 UDCCS0 = UDCCS0_OPR; 1655 ep0_idle(dev); 1656 break; 1657 case EP0_STALL: 1658 UDCCS0 = UDCCS0_FST; 1659 break; 1660 } 1661 USIR0 = USIR0_IR0; 1662} 1663 1664static void handle_ep(struct pxa25x_ep *ep) 1665{ 1666 struct pxa25x_request *req; 1667 int is_in = ep->bEndpointAddress & USB_DIR_IN; 1668 int completed; 1669 u32 udccs, tmp; 1670 1671 do { 1672 completed = 0; 1673 if (likely (!list_empty(&ep->queue))) 1674 req = list_entry(ep->queue.next, 1675 struct pxa25x_request, queue); 1676 else 1677 req = NULL; 1678 1679 // TODO check FST handling 1680 1681 udccs = *ep->reg_udccs; 1682 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */ 1683 tmp = UDCCS_BI_TUR; 1684 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) 1685 tmp |= UDCCS_BI_SST; 1686 tmp &= udccs; 1687 if (likely (tmp)) 1688 *ep->reg_udccs = tmp; 1689 if (req && likely ((udccs & UDCCS_BI_TFS) != 0)) 1690 completed = write_fifo(ep, req); 1691 1692 } else { /* irq from RPC (or for ISO, ROF) */ 1693 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) 1694 tmp = UDCCS_BO_SST | UDCCS_BO_DME; 1695 else 1696 tmp = UDCCS_IO_ROF | UDCCS_IO_DME; 1697 tmp &= udccs; 1698 if (likely(tmp)) 1699 *ep->reg_udccs = tmp; 1700 1701 /* fifos can hold packets, ready for reading... */ 1702 if (likely(req)) { 1703 completed = read_fifo(ep, req); 1704 } else 1705 pio_irq_disable (ep->bEndpointAddress); 1706 } 1707 ep->pio_irqs++; 1708 } while (completed); 1709} 1710 1711/* 1712 * pxa25x_udc_irq - interrupt handler 1713 * 1714 * avoid delays in ep0 processing. the control handshaking isn't always 1715 * under software control (pxa250c0 and the pxa255 are better), and delays 1716 * could cause usb protocol errors. 1717 */ 1718static irqreturn_t 1719pxa25x_udc_irq(int irq, void *_dev) 1720{ 1721 struct pxa25x_udc *dev = _dev; 1722 int handled; 1723 1724 dev->stats.irqs++; 1725 do { 1726 u32 udccr = UDCCR; 1727 1728 handled = 0; 1729 1730 /* SUSpend Interrupt Request */ 1731 if (unlikely(udccr & UDCCR_SUSIR)) { 1732 udc_ack_int_UDCCR(UDCCR_SUSIR); 1733 handled = 1; 1734 DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present() 1735 ? "" : "+disconnect"); 1736 1737 if (!is_vbus_present()) 1738 stop_activity(dev, dev->driver); 1739 else if (dev->gadget.speed != USB_SPEED_UNKNOWN 1740 && dev->driver 1741 && dev->driver->suspend) 1742 dev->driver->suspend(&dev->gadget); 1743 ep0_idle (dev); 1744 } 1745 1746 /* RESume Interrupt Request */ 1747 if (unlikely(udccr & UDCCR_RESIR)) { 1748 udc_ack_int_UDCCR(UDCCR_RESIR); 1749 handled = 1; 1750 DBG(DBG_VERBOSE, "USB resume\n"); 1751 1752 if (dev->gadget.speed != USB_SPEED_UNKNOWN 1753 && dev->driver 1754 && dev->driver->resume 1755 && is_vbus_present()) 1756 dev->driver->resume(&dev->gadget); 1757 } 1758 1759 /* ReSeT Interrupt Request - USB reset */ 1760 if (unlikely(udccr & UDCCR_RSTIR)) { 1761 udc_ack_int_UDCCR(UDCCR_RSTIR); 1762 handled = 1; 1763 1764 if ((UDCCR & UDCCR_UDA) == 0) { 1765 DBG(DBG_VERBOSE, "USB reset start\n"); 1766 1767 /* reset driver and endpoints, 1768 * in case that's not yet done 1769 */ 1770 stop_activity (dev, dev->driver); 1771 1772 } else { 1773 DBG(DBG_VERBOSE, "USB reset end\n"); 1774 dev->gadget.speed = USB_SPEED_FULL; 1775 memset(&dev->stats, 0, sizeof dev->stats); 1776 /* driver and endpoints are still reset */ 1777 } 1778 1779 } else { 1780 u32 usir0 = USIR0 & ~UICR0; 1781 u32 usir1 = USIR1 & ~UICR1; 1782 int i; 1783 1784 if (unlikely (!usir0 && !usir1)) 1785 continue; 1786 1787 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0); 1788 1789 /* control traffic */ 1790 if (usir0 & USIR0_IR0) { 1791 dev->ep[0].pio_irqs++; 1792 handle_ep0(dev); 1793 handled = 1; 1794 } 1795 1796 /* endpoint data transfers */ 1797 for (i = 0; i < 8; i++) { 1798 u32 tmp = 1 << i; 1799 1800 if (i && (usir0 & tmp)) { 1801 handle_ep(&dev->ep[i]); 1802 USIR0 |= tmp; 1803 handled = 1; 1804 } 1805 if (usir1 & tmp) { 1806 handle_ep(&dev->ep[i+8]); 1807 USIR1 |= tmp; 1808 handled = 1; 1809 } 1810 } 1811 } 1812 1813 /* we could also ask for 1 msec SOF (SIR) interrupts */ 1814 1815 } while (handled); 1816 return IRQ_HANDLED; 1817} 1818 1819/*-------------------------------------------------------------------------*/ 1820 1821static void nop_release (struct device *dev) 1822{ 1823 DMSG("%s %s\n", __func__, dev->bus_id); 1824} 1825 1826/* this uses load-time allocation and initialization (instead of 1827 * doing it at run-time) to save code, eliminate fault paths, and 1828 * be more obviously correct. 1829 */ 1830static struct pxa25x_udc memory = { 1831 .gadget = { 1832 .ops = &pxa25x_udc_ops, 1833 .ep0 = &memory.ep[0].ep, 1834 .name = driver_name, 1835 .dev = { 1836 .bus_id = "gadget", 1837 .release = nop_release, 1838 }, 1839 }, 1840 1841 /* control endpoint */ 1842 .ep[0] = { 1843 .ep = { 1844 .name = ep0name, 1845 .ops = &pxa25x_ep_ops, 1846 .maxpacket = EP0_FIFO_SIZE, 1847 }, 1848 .dev = &memory, 1849 .reg_udccs = &UDCCS0, 1850 .reg_uddr = &UDDR0, 1851 }, 1852 1853 /* first group of endpoints */ 1854 .ep[1] = { 1855 .ep = { 1856 .name = "ep1in-bulk", 1857 .ops = &pxa25x_ep_ops, 1858 .maxpacket = BULK_FIFO_SIZE, 1859 }, 1860 .dev = &memory, 1861 .fifo_size = BULK_FIFO_SIZE, 1862 .bEndpointAddress = USB_DIR_IN | 1, 1863 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1864 .reg_udccs = &UDCCS1, 1865 .reg_uddr = &UDDR1, 1866 }, 1867 .ep[2] = { 1868 .ep = { 1869 .name = "ep2out-bulk", 1870 .ops = &pxa25x_ep_ops, 1871 .maxpacket = BULK_FIFO_SIZE, 1872 }, 1873 .dev = &memory, 1874 .fifo_size = BULK_FIFO_SIZE, 1875 .bEndpointAddress = 2, 1876 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1877 .reg_udccs = &UDCCS2, 1878 .reg_ubcr = &UBCR2, 1879 .reg_uddr = &UDDR2, 1880 }, 1881#ifndef CONFIG_USB_PXA25X_SMALL 1882 .ep[3] = { 1883 .ep = { 1884 .name = "ep3in-iso", 1885 .ops = &pxa25x_ep_ops, 1886 .maxpacket = ISO_FIFO_SIZE, 1887 }, 1888 .dev = &memory, 1889 .fifo_size = ISO_FIFO_SIZE, 1890 .bEndpointAddress = USB_DIR_IN | 3, 1891 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1892 .reg_udccs = &UDCCS3, 1893 .reg_uddr = &UDDR3, 1894 }, 1895 .ep[4] = { 1896 .ep = { 1897 .name = "ep4out-iso", 1898 .ops = &pxa25x_ep_ops, 1899 .maxpacket = ISO_FIFO_SIZE, 1900 }, 1901 .dev = &memory, 1902 .fifo_size = ISO_FIFO_SIZE, 1903 .bEndpointAddress = 4, 1904 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1905 .reg_udccs = &UDCCS4, 1906 .reg_ubcr = &UBCR4, 1907 .reg_uddr = &UDDR4, 1908 }, 1909 .ep[5] = { 1910 .ep = { 1911 .name = "ep5in-int", 1912 .ops = &pxa25x_ep_ops, 1913 .maxpacket = INT_FIFO_SIZE, 1914 }, 1915 .dev = &memory, 1916 .fifo_size = INT_FIFO_SIZE, 1917 .bEndpointAddress = USB_DIR_IN | 5, 1918 .bmAttributes = USB_ENDPOINT_XFER_INT, 1919 .reg_udccs = &UDCCS5, 1920 .reg_uddr = &UDDR5, 1921 }, 1922 1923 /* second group of endpoints */ 1924 .ep[6] = { 1925 .ep = { 1926 .name = "ep6in-bulk", 1927 .ops = &pxa25x_ep_ops, 1928 .maxpacket = BULK_FIFO_SIZE, 1929 }, 1930 .dev = &memory, 1931 .fifo_size = BULK_FIFO_SIZE, 1932 .bEndpointAddress = USB_DIR_IN | 6, 1933 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1934 .reg_udccs = &UDCCS6, 1935 .reg_uddr = &UDDR6, 1936 }, 1937 .ep[7] = { 1938 .ep = { 1939 .name = "ep7out-bulk", 1940 .ops = &pxa25x_ep_ops, 1941 .maxpacket = BULK_FIFO_SIZE, 1942 }, 1943 .dev = &memory, 1944 .fifo_size = BULK_FIFO_SIZE, 1945 .bEndpointAddress = 7, 1946 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1947 .reg_udccs = &UDCCS7, 1948 .reg_ubcr = &UBCR7, 1949 .reg_uddr = &UDDR7, 1950 }, 1951 .ep[8] = { 1952 .ep = { 1953 .name = "ep8in-iso", 1954 .ops = &pxa25x_ep_ops, 1955 .maxpacket = ISO_FIFO_SIZE, 1956 }, 1957 .dev = &memory, 1958 .fifo_size = ISO_FIFO_SIZE, 1959 .bEndpointAddress = USB_DIR_IN | 8, 1960 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1961 .reg_udccs = &UDCCS8, 1962 .reg_uddr = &UDDR8, 1963 }, 1964 .ep[9] = { 1965 .ep = { 1966 .name = "ep9out-iso", 1967 .ops = &pxa25x_ep_ops, 1968 .maxpacket = ISO_FIFO_SIZE, 1969 }, 1970 .dev = &memory, 1971 .fifo_size = ISO_FIFO_SIZE, 1972 .bEndpointAddress = 9, 1973 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1974 .reg_udccs = &UDCCS9, 1975 .reg_ubcr = &UBCR9, 1976 .reg_uddr = &UDDR9, 1977 }, 1978 .ep[10] = { 1979 .ep = { 1980 .name = "ep10in-int", 1981 .ops = &pxa25x_ep_ops, 1982 .maxpacket = INT_FIFO_SIZE, 1983 }, 1984 .dev = &memory, 1985 .fifo_size = INT_FIFO_SIZE, 1986 .bEndpointAddress = USB_DIR_IN | 10, 1987 .bmAttributes = USB_ENDPOINT_XFER_INT, 1988 .reg_udccs = &UDCCS10, 1989 .reg_uddr = &UDDR10, 1990 }, 1991 1992 /* third group of endpoints */ 1993 .ep[11] = { 1994 .ep = { 1995 .name = "ep11in-bulk", 1996 .ops = &pxa25x_ep_ops, 1997 .maxpacket = BULK_FIFO_SIZE, 1998 }, 1999 .dev = &memory, 2000 .fifo_size = BULK_FIFO_SIZE, 2001 .bEndpointAddress = USB_DIR_IN | 11, 2002 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2003 .reg_udccs = &UDCCS11, 2004 .reg_uddr = &UDDR11, 2005 }, 2006 .ep[12] = { 2007 .ep = { 2008 .name = "ep12out-bulk", 2009 .ops = &pxa25x_ep_ops, 2010 .maxpacket = BULK_FIFO_SIZE, 2011 }, 2012 .dev = &memory, 2013 .fifo_size = BULK_FIFO_SIZE, 2014 .bEndpointAddress = 12, 2015 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2016 .reg_udccs = &UDCCS12, 2017 .reg_ubcr = &UBCR12, 2018 .reg_uddr = &UDDR12, 2019 }, 2020 .ep[13] = { 2021 .ep = { 2022 .name = "ep13in-iso", 2023 .ops = &pxa25x_ep_ops, 2024 .maxpacket = ISO_FIFO_SIZE, 2025 }, 2026 .dev = &memory, 2027 .fifo_size = ISO_FIFO_SIZE, 2028 .bEndpointAddress = USB_DIR_IN | 13, 2029 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2030 .reg_udccs = &UDCCS13, 2031 .reg_uddr = &UDDR13, 2032 }, 2033 .ep[14] = { 2034 .ep = { 2035 .name = "ep14out-iso", 2036 .ops = &pxa25x_ep_ops, 2037 .maxpacket = ISO_FIFO_SIZE, 2038 }, 2039 .dev = &memory, 2040 .fifo_size = ISO_FIFO_SIZE, 2041 .bEndpointAddress = 14, 2042 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2043 .reg_udccs = &UDCCS14, 2044 .reg_ubcr = &UBCR14, 2045 .reg_uddr = &UDDR14, 2046 }, 2047 .ep[15] = { 2048 .ep = { 2049 .name = "ep15in-int", 2050 .ops = &pxa25x_ep_ops, 2051 .maxpacket = INT_FIFO_SIZE, 2052 }, 2053 .dev = &memory, 2054 .fifo_size = INT_FIFO_SIZE, 2055 .bEndpointAddress = USB_DIR_IN | 15, 2056 .bmAttributes = USB_ENDPOINT_XFER_INT, 2057 .reg_udccs = &UDCCS15, 2058 .reg_uddr = &UDDR15, 2059 }, 2060#endif /* !CONFIG_USB_PXA25X_SMALL */ 2061}; 2062 2063#define CP15R0_VENDOR_MASK 0xffffe000 2064 2065#if defined(CONFIG_ARCH_PXA) 2066#define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */ 2067 2068#elif defined(CONFIG_ARCH_IXP4XX) 2069#define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */ 2070 2071#endif 2072 2073#define CP15R0_PROD_MASK 0x000003f0 2074#define PXA25x 0x00000100 /* and PXA26x */ 2075#define PXA210 0x00000120 2076 2077#define CP15R0_REV_MASK 0x0000000f 2078 2079#define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK) 2080 2081#define PXA255_A0 0x00000106 /* or PXA260_B1 */ 2082#define PXA250_C0 0x00000105 /* or PXA26x_B0 */ 2083#define PXA250_B2 0x00000104 2084#define PXA250_B1 0x00000103 /* or PXA260_A0 */ 2085#define PXA250_B0 0x00000102 2086#define PXA250_A1 0x00000101 2087#define PXA250_A0 0x00000100 2088 2089#define PXA210_C0 0x00000125 2090#define PXA210_B2 0x00000124 2091#define PXA210_B1 0x00000123 2092#define PXA210_B0 0x00000122 2093#define IXP425_A0 0x000001c1 2094#define IXP425_B0 0x000001f1 2095#define IXP465_AD 0x00000200 2096 2097/* 2098 * probe - binds to the platform device 2099 */ 2100static int __init pxa25x_udc_probe(struct platform_device *pdev) 2101{ 2102 struct pxa25x_udc *dev = &memory; 2103 int retval, vbus_irq, irq; 2104 u32 chiprev; 2105 2106 /* insist on Intel/ARM/XScale */ 2107 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev)); 2108 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) { 2109 pr_err("%s: not XScale!\n", driver_name); 2110 return -ENODEV; 2111 } 2112 2113 /* trigger chiprev-specific logic */ 2114 switch (chiprev & CP15R0_PRODREV_MASK) { 2115#if defined(CONFIG_ARCH_PXA) 2116 case PXA255_A0: 2117 dev->has_cfr = 1; 2118 break; 2119 case PXA250_A0: 2120 case PXA250_A1: 2121 /* A0/A1 "not released"; ep 13, 15 unusable */ 2122 /* fall through */ 2123 case PXA250_B2: case PXA210_B2: 2124 case PXA250_B1: case PXA210_B1: 2125 case PXA250_B0: case PXA210_B0: 2126 /* OUT-DMA is broken ... */ 2127 /* fall through */ 2128 case PXA250_C0: case PXA210_C0: 2129 break; 2130#elif defined(CONFIG_ARCH_IXP4XX) 2131 case IXP425_A0: 2132 case IXP425_B0: 2133 case IXP465_AD: 2134 dev->has_cfr = 1; 2135 break; 2136#endif 2137 default: 2138 pr_err("%s: unrecognized processor: %08x\n", 2139 driver_name, chiprev); 2140 /* iop3xx, ixp4xx, ... */ 2141 return -ENODEV; 2142 } 2143 2144 irq = platform_get_irq(pdev, 0); 2145 if (irq < 0) 2146 return -ENODEV; 2147 2148 dev->clk = clk_get(&pdev->dev, "UDCCLK"); 2149 if (IS_ERR(dev->clk)) { 2150 retval = PTR_ERR(dev->clk); 2151 goto err_clk; 2152 } 2153 2154 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq, 2155 dev->has_cfr ? "" : " (!cfr)", 2156 SIZE_STR "(pio)" 2157 ); 2158 2159 /* other non-static parts of init */ 2160 dev->dev = &pdev->dev; 2161 dev->mach = pdev->dev.platform_data; 2162 2163 if (dev->mach->gpio_vbus) { 2164 if ((retval = gpio_request(dev->mach->gpio_vbus, 2165 "pxa25x_udc GPIO VBUS"))) { 2166 dev_dbg(&pdev->dev, 2167 "can't get vbus gpio %d, err: %d\n", 2168 dev->mach->gpio_vbus, retval); 2169 goto err_gpio_vbus; 2170 } 2171 gpio_direction_input(dev->mach->gpio_vbus); 2172 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus); 2173 } else 2174 vbus_irq = 0; 2175 2176 if (dev->mach->gpio_pullup) { 2177 if ((retval = gpio_request(dev->mach->gpio_pullup, 2178 "pca25x_udc GPIO PULLUP"))) { 2179 dev_dbg(&pdev->dev, 2180 "can't get pullup gpio %d, err: %d\n", 2181 dev->mach->gpio_pullup, retval); 2182 goto err_gpio_pullup; 2183 } 2184 gpio_direction_output(dev->mach->gpio_pullup, 0); 2185 } 2186 2187 init_timer(&dev->timer); 2188 dev->timer.function = udc_watchdog; 2189 dev->timer.data = (unsigned long) dev; 2190 2191 device_initialize(&dev->gadget.dev); 2192 dev->gadget.dev.parent = &pdev->dev; 2193 dev->gadget.dev.dma_mask = pdev->dev.dma_mask; 2194 2195 the_controller = dev; 2196 platform_set_drvdata(pdev, dev); 2197 2198 udc_disable(dev); 2199 udc_reinit(dev); 2200 2201 dev->vbus = is_vbus_present(); 2202 2203 /* irq setup after old hardware state is cleaned up */ 2204 retval = request_irq(irq, pxa25x_udc_irq, 2205 IRQF_DISABLED, driver_name, dev); 2206 if (retval != 0) { 2207 pr_err("%s: can't get irq %d, err %d\n", 2208 driver_name, irq, retval); 2209 goto err_irq1; 2210 } 2211 dev->got_irq = 1; 2212 2213#ifdef CONFIG_ARCH_LUBBOCK 2214 if (machine_is_lubbock()) { 2215 retval = request_irq(LUBBOCK_USB_DISC_IRQ, 2216 lubbock_vbus_irq, 2217 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, 2218 driver_name, dev); 2219 if (retval != 0) { 2220 pr_err("%s: can't get irq %i, err %d\n", 2221 driver_name, LUBBOCK_USB_DISC_IRQ, retval); 2222lubbock_fail0: 2223 goto err_irq_lub; 2224 } 2225 retval = request_irq(LUBBOCK_USB_IRQ, 2226 lubbock_vbus_irq, 2227 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, 2228 driver_name, dev); 2229 if (retval != 0) { 2230 pr_err("%s: can't get irq %i, err %d\n", 2231 driver_name, LUBBOCK_USB_IRQ, retval); 2232 free_irq(LUBBOCK_USB_DISC_IRQ, dev); 2233 goto lubbock_fail0; 2234 } 2235 } else 2236#endif 2237 if (vbus_irq) { 2238 retval = request_irq(vbus_irq, udc_vbus_irq, 2239 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | 2240 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 2241 driver_name, dev); 2242 if (retval != 0) { 2243 pr_err("%s: can't get irq %i, err %d\n", 2244 driver_name, vbus_irq, retval); 2245 goto err_vbus_irq; 2246 } 2247 } 2248 create_debug_files(dev); 2249 2250 return 0; 2251 2252 err_vbus_irq: 2253#ifdef CONFIG_ARCH_LUBBOCK 2254 free_irq(LUBBOCK_USB_DISC_IRQ, dev); 2255 err_irq_lub: 2256#endif 2257 free_irq(irq, dev); 2258 err_irq1: 2259 if (dev->mach->gpio_pullup) 2260 gpio_free(dev->mach->gpio_pullup); 2261 err_gpio_pullup: 2262 if (dev->mach->gpio_vbus) 2263 gpio_free(dev->mach->gpio_vbus); 2264 err_gpio_vbus: 2265 clk_put(dev->clk); 2266 err_clk: 2267 return retval; 2268} 2269 2270static void pxa25x_udc_shutdown(struct platform_device *_dev) 2271{ 2272 pullup_off(); 2273} 2274 2275static int __exit pxa25x_udc_remove(struct platform_device *pdev) 2276{ 2277 struct pxa25x_udc *dev = platform_get_drvdata(pdev); 2278 2279 if (dev->driver) 2280 return -EBUSY; 2281 2282 dev->pullup = 0; 2283 pullup(dev); 2284 2285 remove_debug_files(dev); 2286 2287 if (dev->got_irq) { 2288 free_irq(platform_get_irq(pdev, 0), dev); 2289 dev->got_irq = 0; 2290 } 2291#ifdef CONFIG_ARCH_LUBBOCK 2292 if (machine_is_lubbock()) { 2293 free_irq(LUBBOCK_USB_DISC_IRQ, dev); 2294 free_irq(LUBBOCK_USB_IRQ, dev); 2295 } 2296#endif 2297 if (dev->mach->gpio_vbus) { 2298 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev); 2299 gpio_free(dev->mach->gpio_vbus); 2300 } 2301 if (dev->mach->gpio_pullup) 2302 gpio_free(dev->mach->gpio_pullup); 2303 2304 clk_put(dev->clk); 2305 2306 platform_set_drvdata(pdev, NULL); 2307 the_controller = NULL; 2308 return 0; 2309} 2310 2311/*-------------------------------------------------------------------------*/ 2312 2313#ifdef CONFIG_PM 2314 2315/* USB suspend (controlled by the host) and system suspend (controlled 2316 * by the PXA) don't necessarily work well together. If USB is active, 2317 * the 48 MHz clock is required; so the system can't enter 33 MHz idle 2318 * mode, or any deeper PM saving state. 2319 * 2320 * For now, we punt and forcibly disconnect from the USB host when PXA 2321 * enters any suspend state. While we're disconnected, we always disable 2322 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states. 2323 * Boards without software pullup control shouldn't use those states. 2324 * VBUS IRQs should probably be ignored so that the PXA device just acts 2325 * "dead" to USB hosts until system resume. 2326 */ 2327static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state) 2328{ 2329 struct pxa25x_udc *udc = platform_get_drvdata(dev); 2330 unsigned long flags; 2331 2332 if (!udc->mach->gpio_pullup && !udc->mach->udc_command) 2333 WARN("USB host won't detect disconnect!\n"); 2334 udc->suspended = 1; 2335 2336 local_irq_save(flags); 2337 pullup(udc); 2338 local_irq_restore(flags); 2339 2340 return 0; 2341} 2342 2343static int pxa25x_udc_resume(struct platform_device *dev) 2344{ 2345 struct pxa25x_udc *udc = platform_get_drvdata(dev); 2346 unsigned long flags; 2347 2348 udc->suspended = 0; 2349 local_irq_save(flags); 2350 pullup(udc); 2351 local_irq_restore(flags); 2352 2353 return 0; 2354} 2355 2356#else 2357#define pxa25x_udc_suspend NULL 2358#define pxa25x_udc_resume NULL 2359#endif 2360 2361/*-------------------------------------------------------------------------*/ 2362 2363static struct platform_driver udc_driver = { 2364 .shutdown = pxa25x_udc_shutdown, 2365 .remove = __exit_p(pxa25x_udc_remove), 2366 .suspend = pxa25x_udc_suspend, 2367 .resume = pxa25x_udc_resume, 2368 .driver = { 2369 .owner = THIS_MODULE, 2370 .name = "pxa25x-udc", 2371 }, 2372}; 2373 2374static int __init udc_init(void) 2375{ 2376 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION); 2377 return platform_driver_probe(&udc_driver, pxa25x_udc_probe); 2378} 2379module_init(udc_init); 2380 2381static void __exit udc_exit(void) 2382{ 2383 platform_driver_unregister(&udc_driver); 2384} 2385module_exit(udc_exit); 2386 2387MODULE_DESCRIPTION(DRIVER_DESC); 2388MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); 2389MODULE_LICENSE("GPL"); 2390MODULE_ALIAS("platform:pxa25x-udc"); 2391