1#ifndef _LINUX_SVGA_H
2#define _LINUX_SVGA_H
3
4#include <linux/pci.h>
5#include <video/vga.h>
6
7/* Terminator for register set */
8
9#define VGA_REGSET_END_VAL	0xFF
10#define VGA_REGSET_END		{VGA_REGSET_END_VAL, 0, 0}
11
12struct vga_regset {
13	u8 regnum;
14	u8 lowbit;
15	u8 highbit;
16};
17
18/* ------------------------------------------------------------------------- */
19
20#define SVGA_FORMAT_END_VAL	0xFFFF
21#define SVGA_FORMAT_END		{SVGA_FORMAT_END_VAL, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 0, 0, 0, 0, 0, 0}
22
23struct svga_fb_format {
24	/* var part */
25	u32 bits_per_pixel;
26	struct fb_bitfield red;
27	struct fb_bitfield green;
28	struct fb_bitfield blue;
29	struct fb_bitfield transp;
30	u32 nonstd;
31	/* fix part */
32	u32 type;
33	u32 type_aux;
34	u32 visual;
35	u32 xpanstep;
36	u32 xresstep;
37};
38
39struct svga_timing_regs {
40	const struct vga_regset *h_total_regs;
41	const struct vga_regset *h_display_regs;
42	const struct vga_regset *h_blank_start_regs;
43	const struct vga_regset *h_blank_end_regs;
44	const struct vga_regset *h_sync_start_regs;
45	const struct vga_regset *h_sync_end_regs;
46
47	const struct vga_regset *v_total_regs;
48	const struct vga_regset *v_display_regs;
49	const struct vga_regset *v_blank_start_regs;
50	const struct vga_regset *v_blank_end_regs;
51	const struct vga_regset *v_sync_start_regs;
52	const struct vga_regset *v_sync_end_regs;
53};
54
55struct svga_pll {
56	u16 m_min;
57	u16 m_max;
58	u16 n_min;
59	u16 n_max;
60	u16 r_min;
61	u16 r_max;  /* r_max < 32 */
62	u32 f_vco_min;
63	u32 f_vco_max;
64	u32 f_base;
65};
66
67
68/* Write a value to the attribute register */
69
70static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data)
71{
72	vga_r(regbase, VGA_IS1_RC);
73	vga_w(regbase, VGA_ATT_IW, index);
74	vga_w(regbase, VGA_ATT_W, data);
75}
76
77/* Write a value to a sequence register with a mask */
78
79static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
80{
81	vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask));
82}
83
84/* Write a value to a CRT register with a mask */
85
86static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
87{
88	vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask));
89}
90
91static inline int svga_primary_device(struct pci_dev *dev)
92{
93	u16 flags;
94	pci_read_config_word(dev, PCI_COMMAND, &flags);
95	return (flags & PCI_COMMAND_IO);
96}
97
98
99void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
100void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
101
102void svga_set_default_gfx_regs(void __iomem *regbase);
103void svga_set_default_atc_regs(void __iomem *regbase);
104void svga_set_default_seq_regs(void __iomem *regbase);
105void svga_set_default_crt_regs(void __iomem *regbase);
106void svga_set_textmode_vga_regs(void __iomem *regbase);
107
108void svga_settile(struct fb_info *info, struct fb_tilemap *map);
109void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area);
110void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect);
111void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit);
112void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor);
113int svga_get_tilemax(struct fb_info *info);
114void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps,
115		   struct fb_var_screeninfo *var);
116
117int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node);
118int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node);
119void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node);
120
121int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix);
122
123#endif /* _LINUX_SVGA_H */
124
125