1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef __ASM_ARCH_DMA_H 20#define __ASM_ARCH_DMA_H 21#define OMAP_DMA_BASE (0xfffed800) 22#define OMAP_DMA_GCR (OMAP_DMA_BASE + 0x400) 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define OMAP_DMA_GSCR (OMAP_DMA_BASE + 0x404) 25#define OMAP_DMA_GRST (OMAP_DMA_BASE + 0x408) 26#define OMAP_DMA_HW_ID (OMAP_DMA_BASE + 0x442) 27#define OMAP_DMA_PCH2_ID (OMAP_DMA_BASE + 0x444) 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define OMAP_DMA_PCH0_ID (OMAP_DMA_BASE + 0x446) 30#define OMAP_DMA_PCH1_ID (OMAP_DMA_BASE + 0x448) 31#define OMAP_DMA_PCHG_ID (OMAP_DMA_BASE + 0x44a) 32#define OMAP_DMA_PCHD_ID (OMAP_DMA_BASE + 0x44c) 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define OMAP_DMA_CAPS_0_U (OMAP_DMA_BASE + 0x44e) 35#define OMAP_DMA_CAPS_0_L (OMAP_DMA_BASE + 0x450) 36#define OMAP_DMA_CAPS_1_U (OMAP_DMA_BASE + 0x452) 37#define OMAP_DMA_CAPS_1_L (OMAP_DMA_BASE + 0x454) 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39#define OMAP_DMA_CAPS_2 (OMAP_DMA_BASE + 0x456) 40#define OMAP_DMA_CAPS_3 (OMAP_DMA_BASE + 0x458) 41#define OMAP_DMA_CAPS_4 (OMAP_DMA_BASE + 0x45a) 42#define OMAP_DMA_PCH2_SR (OMAP_DMA_BASE + 0x460) 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44#define OMAP_DMA_PCH0_SR (OMAP_DMA_BASE + 0x480) 45#define OMAP_DMA_PCH1_SR (OMAP_DMA_BASE + 0x482) 46#define OMAP_DMA_PCHD_SR (OMAP_DMA_BASE + 0x4c0) 47#define OMAP24XX_DMA_BASE (L4_24XX_BASE + 0x56000) 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49#define OMAP_DMA4_REVISION (OMAP24XX_DMA_BASE + 0x00) 50#define OMAP_DMA4_GCR_REG (OMAP24XX_DMA_BASE + 0x78) 51#define OMAP_DMA4_IRQSTATUS_L0 (OMAP24XX_DMA_BASE + 0x08) 52#define OMAP_DMA4_IRQSTATUS_L1 (OMAP24XX_DMA_BASE + 0x0c) 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54#define OMAP_DMA4_IRQSTATUS_L2 (OMAP24XX_DMA_BASE + 0x10) 55#define OMAP_DMA4_IRQSTATUS_L3 (OMAP24XX_DMA_BASE + 0x14) 56#define OMAP_DMA4_IRQENABLE_L0 (OMAP24XX_DMA_BASE + 0x18) 57#define OMAP_DMA4_IRQENABLE_L1 (OMAP24XX_DMA_BASE + 0x1c) 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59#define OMAP_DMA4_IRQENABLE_L2 (OMAP24XX_DMA_BASE + 0x20) 60#define OMAP_DMA4_IRQENABLE_L3 (OMAP24XX_DMA_BASE + 0x24) 61#define OMAP_DMA4_SYSSTATUS (OMAP24XX_DMA_BASE + 0x28) 62#define OMAP_DMA4_CAPS_0 (OMAP24XX_DMA_BASE + 0x64) 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64#define OMAP_DMA4_CAPS_2 (OMAP24XX_DMA_BASE + 0x6c) 65#define OMAP_DMA4_CAPS_3 (OMAP24XX_DMA_BASE + 0x70) 66#define OMAP_DMA4_CAPS_4 (OMAP24XX_DMA_BASE + 0x74) 67#define OMAP_LOGICAL_DMA_CH_COUNT 32 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69#define OMAP_DMA_CCR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x80) 70#define OMAP_DMA_CLNK_CTRL_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x84) 71#define OMAP_DMA_CICR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x88) 72#define OMAP_DMA_CSR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x8c) 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define OMAP_DMA_CSDP_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x90) 75#define OMAP_DMA_CEN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x94) 76#define OMAP_DMA_CFN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x98) 77#define OMAP_DMA_CSEI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa4) 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79#define OMAP_DMA_CSFI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa8) 80#define OMAP_DMA_CDEI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xac) 81#define OMAP_DMA_CDFI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb0) 82#define OMAP_DMA_CSAC_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb4) 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84#define OMAP_DMA_CDAC_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb8) 85#define OMAP1_DMA_CSSA_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x08) 86#define OMAP1_DMA_CSSA_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0a) 87#define OMAP1_DMA_CDSA_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0c) 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89#define OMAP1_DMA_CDSA_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0e) 90#define OMAP1_DMA_COLOR_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x20) 91#define OMAP1_DMA_CCR2_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x24) 92#define OMAP1_DMA_COLOR_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x22) 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94#define OMAP1_DMA_LCH_CTRL_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x2a) 95#define OMAP2_DMA_CSSA_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x9c) 96#define OMAP2_DMA_CDSA_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa0) 97#define OMAP2_DMA_CCEN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xbc) 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99#define OMAP2_DMA_CCFN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xc0) 100#define OMAP2_DMA_COLOR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xc4) 101#define OMAP_DMA_NO_DEVICE 0 102#define OMAP_DMA_MCSI1_TX 1 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104#define OMAP_DMA_MCSI1_RX 2 105#define OMAP_DMA_I2C_RX 3 106#define OMAP_DMA_I2C_TX 4 107#define OMAP_DMA_EXT_NDMA_REQ 5 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109#define OMAP_DMA_EXT_NDMA_REQ2 6 110#define OMAP_DMA_UWIRE_TX 7 111#define OMAP_DMA_MCBSP1_TX 8 112#define OMAP_DMA_MCBSP1_RX 9 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114#define OMAP_DMA_MCBSP3_TX 10 115#define OMAP_DMA_MCBSP3_RX 11 116#define OMAP_DMA_UART1_TX 12 117#define OMAP_DMA_UART1_RX 13 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119#define OMAP_DMA_UART2_TX 14 120#define OMAP_DMA_UART2_RX 15 121#define OMAP_DMA_MCBSP2_TX 16 122#define OMAP_DMA_MCBSP2_RX 17 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124#define OMAP_DMA_UART3_TX 18 125#define OMAP_DMA_UART3_RX 19 126#define OMAP_DMA_CAMERA_IF_RX 20 127#define OMAP_DMA_MMC_TX 21 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129#define OMAP_DMA_MMC_RX 22 130#define OMAP_DMA_NAND 23 131#define OMAP_DMA_IRQ_LCD_LINE 24 132#define OMAP_DMA_MEMORY_STICK 25 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134#define OMAP_DMA_USB_W2FC_RX0 26 135#define OMAP_DMA_USB_W2FC_RX1 27 136#define OMAP_DMA_USB_W2FC_RX2 28 137#define OMAP_DMA_USB_W2FC_TX0 29 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139#define OMAP_DMA_USB_W2FC_TX1 30 140#define OMAP_DMA_USB_W2FC_TX2 31 141#define OMAP_DMA_CRYPTO_DES_IN 32 142#define OMAP_DMA_SPI_TX 33 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144#define OMAP_DMA_SPI_RX 34 145#define OMAP_DMA_CRYPTO_HASH 35 146#define OMAP_DMA_CCP_ATTN 36 147#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149#define OMAP_DMA_CMT_APE_TX_CHAN_0 38 150#define OMAP_DMA_CMT_APE_RV_CHAN_0 39 151#define OMAP_DMA_CMT_APE_TX_CHAN_1 40 152#define OMAP_DMA_CMT_APE_RV_CHAN_1 41 153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154#define OMAP_DMA_CMT_APE_TX_CHAN_2 42 155#define OMAP_DMA_CMT_APE_RV_CHAN_2 43 156#define OMAP_DMA_CMT_APE_TX_CHAN_3 44 157#define OMAP_DMA_CMT_APE_RV_CHAN_3 45 158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159#define OMAP_DMA_CMT_APE_TX_CHAN_4 46 160#define OMAP_DMA_CMT_APE_RV_CHAN_4 47 161#define OMAP_DMA_CMT_APE_TX_CHAN_5 48 162#define OMAP_DMA_CMT_APE_RV_CHAN_5 49 163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164#define OMAP_DMA_CMT_APE_TX_CHAN_6 50 165#define OMAP_DMA_CMT_APE_RV_CHAN_6 51 166#define OMAP_DMA_CMT_APE_TX_CHAN_7 52 167#define OMAP_DMA_CMT_APE_RV_CHAN_7 53 168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169#define OMAP_DMA_MMC2_TX 54 170#define OMAP_DMA_MMC2_RX 55 171#define OMAP_DMA_CRYPTO_DES_OUT 56 172#define OMAP24XX_DMA_NO_DEVICE 0 173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174#define OMAP24XX_DMA_XTI_DMA 1 175#define OMAP24XX_DMA_EXT_DMAREQ0 2 176#define OMAP24XX_DMA_EXT_DMAREQ1 3 177#define OMAP24XX_DMA_GPMC 4 178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179#define OMAP24XX_DMA_GFX 5 180#define OMAP24XX_DMA_DSS 6 181#define OMAP24XX_DMA_VLYNQ_TX 7 182#define OMAP24XX_DMA_CWT 8 183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184#define OMAP24XX_DMA_AES_TX 9 185#define OMAP24XX_DMA_AES_RX 10 186#define OMAP24XX_DMA_DES_TX 11 187#define OMAP24XX_DMA_DES_RX 12 188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189#define OMAP24XX_DMA_SHA1MD5_RX 13 190#define OMAP24XX_DMA_EXT_DMAREQ2 14 191#define OMAP24XX_DMA_EXT_DMAREQ3 15 192#define OMAP24XX_DMA_EXT_DMAREQ4 16 193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194#define OMAP24XX_DMA_EAC_AC_RD 17 195#define OMAP24XX_DMA_EAC_AC_WR 18 196#define OMAP24XX_DMA_EAC_MD_UL_RD 19 197#define OMAP24XX_DMA_EAC_MD_UL_WR 20 198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199#define OMAP24XX_DMA_EAC_MD_DL_RD 21 200#define OMAP24XX_DMA_EAC_MD_DL_WR 22 201#define OMAP24XX_DMA_EAC_BT_UL_RD 23 202#define OMAP24XX_DMA_EAC_BT_UL_WR 24 203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204#define OMAP24XX_DMA_EAC_BT_DL_RD 25 205#define OMAP24XX_DMA_EAC_BT_DL_WR 26 206#define OMAP24XX_DMA_I2C1_TX 27 207#define OMAP24XX_DMA_I2C1_RX 28 208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209#define OMAP24XX_DMA_I2C2_TX 29 210#define OMAP24XX_DMA_I2C2_RX 30 211#define OMAP24XX_DMA_MCBSP1_TX 31 212#define OMAP24XX_DMA_MCBSP1_RX 32 213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214#define OMAP24XX_DMA_MCBSP2_TX 33 215#define OMAP24XX_DMA_MCBSP2_RX 34 216#define OMAP24XX_DMA_SPI1_TX0 35 217#define OMAP24XX_DMA_SPI1_RX0 36 218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219#define OMAP24XX_DMA_SPI1_TX1 37 220#define OMAP24XX_DMA_SPI1_RX1 38 221#define OMAP24XX_DMA_SPI1_TX2 39 222#define OMAP24XX_DMA_SPI1_RX2 40 223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224#define OMAP24XX_DMA_SPI1_TX3 41 225#define OMAP24XX_DMA_SPI1_RX3 42 226#define OMAP24XX_DMA_SPI2_TX0 43 227#define OMAP24XX_DMA_SPI2_RX0 44 228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229#define OMAP24XX_DMA_SPI2_TX1 45 230#define OMAP24XX_DMA_SPI2_RX1 46 231#define OMAP24XX_DMA_UART1_TX 49 232#define OMAP24XX_DMA_UART1_RX 50 233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234#define OMAP24XX_DMA_UART2_TX 51 235#define OMAP24XX_DMA_UART2_RX 52 236#define OMAP24XX_DMA_UART3_TX 53 237#define OMAP24XX_DMA_UART3_RX 54 238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239#define OMAP24XX_DMA_USB_W2FC_TX0 55 240#define OMAP24XX_DMA_USB_W2FC_RX0 56 241#define OMAP24XX_DMA_USB_W2FC_TX1 57 242#define OMAP24XX_DMA_USB_W2FC_RX1 58 243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244#define OMAP24XX_DMA_USB_W2FC_TX2 59 245#define OMAP24XX_DMA_USB_W2FC_RX2 60 246#define OMAP24XX_DMA_MMC1_TX 61 247#define OMAP24XX_DMA_MMC1_RX 62 248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249#define OMAP24XX_DMA_MS 63 250#define OMAP24XX_DMA_EXT_DMAREQ5 64 251#define OMAP1510_DMA_LCD_BASE (0xfffedb00) 252#define OMAP1510_DMA_LCD_CTRL (OMAP1510_DMA_LCD_BASE + 0x00) 253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254#define OMAP1510_DMA_LCD_TOP_F1_L (OMAP1510_DMA_LCD_BASE + 0x02) 255#define OMAP1510_DMA_LCD_TOP_F1_U (OMAP1510_DMA_LCD_BASE + 0x04) 256#define OMAP1510_DMA_LCD_BOT_F1_L (OMAP1510_DMA_LCD_BASE + 0x06) 257#define OMAP1510_DMA_LCD_BOT_F1_U (OMAP1510_DMA_LCD_BASE + 0x08) 258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259#define OMAP1610_DMA_LCD_BASE (0xfffee300) 260#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0) 261#define OMAP1610_DMA_LCD_CCR (OMAP1610_DMA_LCD_BASE + 0xc2) 262#define OMAP1610_DMA_LCD_CTRL (OMAP1610_DMA_LCD_BASE + 0xc4) 263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264#define OMAP1610_DMA_LCD_TOP_B1_L (OMAP1610_DMA_LCD_BASE + 0xc8) 265#define OMAP1610_DMA_LCD_TOP_B1_U (OMAP1610_DMA_LCD_BASE + 0xca) 266#define OMAP1610_DMA_LCD_BOT_B1_L (OMAP1610_DMA_LCD_BASE + 0xcc) 267#define OMAP1610_DMA_LCD_BOT_B1_U (OMAP1610_DMA_LCD_BASE + 0xce) 268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269#define OMAP1610_DMA_LCD_TOP_B2_L (OMAP1610_DMA_LCD_BASE + 0xd0) 270#define OMAP1610_DMA_LCD_TOP_B2_U (OMAP1610_DMA_LCD_BASE + 0xd2) 271#define OMAP1610_DMA_LCD_BOT_B2_L (OMAP1610_DMA_LCD_BASE + 0xd4) 272#define OMAP1610_DMA_LCD_BOT_B2_U (OMAP1610_DMA_LCD_BASE + 0xd6) 273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274#define OMAP1610_DMA_LCD_SRC_EI_B1 (OMAP1610_DMA_LCD_BASE + 0xd8) 275#define OMAP1610_DMA_LCD_SRC_FI_B1_L (OMAP1610_DMA_LCD_BASE + 0xda) 276#define OMAP1610_DMA_LCD_SRC_EN_B1 (OMAP1610_DMA_LCD_BASE + 0xe0) 277#define OMAP1610_DMA_LCD_SRC_FN_B1 (OMAP1610_DMA_LCD_BASE + 0xe4) 278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279#define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea) 280#define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4) 281#define OMAP1_DMA_TOUT_IRQ (1 << 0) 282#define OMAP_DMA_DROP_IRQ (1 << 1) 283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284#define OMAP_DMA_HALF_IRQ (1 << 2) 285#define OMAP_DMA_FRAME_IRQ (1 << 3) 286#define OMAP_DMA_LAST_IRQ (1 << 4) 287#define OMAP_DMA_BLOCK_IRQ (1 << 5) 288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289#define OMAP1_DMA_SYNC_IRQ (1 << 6) 290#define OMAP2_DMA_PKT_IRQ (1 << 7) 291#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8) 292#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9) 293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10) 295#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11) 296#define OMAP_DMA_DATA_TYPE_S8 0x00 297#define OMAP_DMA_DATA_TYPE_S16 0x01 298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299#define OMAP_DMA_DATA_TYPE_S32 0x02 300#define OMAP_DMA_SYNC_ELEMENT 0x00 301#define OMAP_DMA_SYNC_FRAME 0x01 302#define OMAP_DMA_SYNC_BLOCK 0x02 303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304#define OMAP_DMA_PORT_EMIFF 0x00 305#define OMAP_DMA_PORT_EMIFS 0x01 306#define OMAP_DMA_PORT_OCP_T1 0x02 307#define OMAP_DMA_PORT_TIPB 0x03 308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309#define OMAP_DMA_PORT_OCP_T2 0x04 310#define OMAP_DMA_PORT_MPUI 0x05 311#define OMAP_DMA_AMODE_CONSTANT 0x00 312#define OMAP_DMA_AMODE_POST_INC 0x01 313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314#define OMAP_DMA_AMODE_SINGLE_IDX 0x02 315#define OMAP_DMA_AMODE_DOUBLE_IDX 0x03 316enum { 317 OMAP_LCD_DMA_B1_TOP, 318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 OMAP_LCD_DMA_B1_BOTTOM, 320 OMAP_LCD_DMA_B2_TOP, 321 OMAP_LCD_DMA_B2_BOTTOM 322}; 323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324enum omap_dma_burst_mode { 325 OMAP_DMA_DATA_BURST_DIS = 0, 326 OMAP_DMA_DATA_BURST_4, 327 OMAP_DMA_DATA_BURST_8, 328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 OMAP_DMA_DATA_BURST_16, 330}; 331enum omap_dma_color_mode { 332 OMAP_DMA_COLOR_DIS = 0, 333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 OMAP_DMA_CONSTANT_FILL, 335 OMAP_DMA_TRANSPARENT_COPY 336}; 337enum omap_dma_write_mode { 338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 OMAP_DMA_WRITE_NON_POSTED = 0, 340 OMAP_DMA_WRITE_POSTED, 341 OMAP_DMA_WRITE_LAST_NON_POSTED 342}; 343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344struct omap_dma_channel_params { 345 int data_type; 346 int elem_count; 347 int frame_count; 348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 int src_port; 350 int src_amode; 351 unsigned long src_start; 352 int src_ei; 353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 int src_fi; 355 int dst_port; 356 int dst_amode; 357 unsigned long dst_start; 358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 int dst_ei; 360 int dst_fi; 361 int trigger; 362 int sync_mode; 363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 int src_or_dst_synch; 365 int ie; 366}; 367#endif 368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369