1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ****************************************************************************
11 ****************************************************************************/
12#ifndef __ONENAND_REG_H
13#define __ONENAND_REG_H
14
15#define ONENAND_MEMORY_MAP(x) ((x) << 1)
16
17#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000)
18#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200)
19#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010)
20
21#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000)
22#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001)
23#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002)
24#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003)
25#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004)
26#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005)
27#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006)
28
29#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100)
30#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101)
31#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102)
32#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103)
33#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104)
34#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105)
35#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106)
36#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107)
37
38#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200)
39#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220)
40#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221)
41#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222)
42#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240)
43#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241)
44#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C)
45#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D)
46#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E)
47
48#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00)
49#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01)
50#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02)
51#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03)
52#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04)
53#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05)
54#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06)
55#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07)
56#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08)
57
58#define ONENAND_DEVICE_DENSITY_SHIFT (4)
59#define ONENAND_DEVICE_IS_DDP (1 << 3)
60#define ONENAND_DEVICE_IS_DEMUX (1 << 2)
61#define ONENAND_DEVICE_VCC_MASK (0x3)
62
63#define ONENAND_DEVICE_DENSITY_512Mb (0x002)
64
65#define ONENAND_VERSION_PROCESS_SHIFT (8)
66
67#define ONENAND_DDP_SHIFT (15)
68
69#define ONENAND_FPA_MASK (0x3f)
70#define ONENAND_FPA_SHIFT (2)
71#define ONENAND_FSA_MASK (0x03)
72
73#define ONENAND_BSA_MASK (0x03)
74#define ONENAND_BSA_SHIFT (8)
75#define ONENAND_BSA_BOOTRAM (0 << 2)
76#define ONENAND_BSA_DATARAM0 (2 << 2)
77#define ONENAND_BSA_DATARAM1 (3 << 2)
78#define ONENAND_BSC_MASK (0x03)
79
80#define ONENAND_CMD_READ (0x00)
81#define ONENAND_CMD_READOOB (0x13)
82#define ONENAND_CMD_PROG (0x80)
83#define ONENAND_CMD_PROGOOB (0x1A)
84#define ONENAND_CMD_UNLOCK (0x23)
85#define ONENAND_CMD_LOCK (0x2A)
86#define ONENAND_CMD_LOCK_TIGHT (0x2C)
87#define ONENAND_CMD_ERASE (0x94)
88#define ONENAND_CMD_RESET (0xF0)
89#define ONENAND_CMD_OTP_ACCESS (0x65)
90#define ONENAND_CMD_READID (0x90)
91
92#define ONENAND_CMD_BUFFERRAM (0x1978)
93
94#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15)
95#define ONENAND_SYS_CFG1_BRL_7 (7 << 12)
96#define ONENAND_SYS_CFG1_BRL_6 (6 << 12)
97#define ONENAND_SYS_CFG1_BRL_5 (5 << 12)
98#define ONENAND_SYS_CFG1_BRL_4 (4 << 12)
99#define ONENAND_SYS_CFG1_BRL_3 (3 << 12)
100#define ONENAND_SYS_CFG1_BRL_10 (2 << 12)
101#define ONENAND_SYS_CFG1_BRL_9 (1 << 12)
102#define ONENAND_SYS_CFG1_BRL_8 (0 << 12)
103#define ONENAND_SYS_CFG1_BRL_SHIFT (12)
104#define ONENAND_SYS_CFG1_BL_32 (4 << 9)
105#define ONENAND_SYS_CFG1_BL_16 (3 << 9)
106#define ONENAND_SYS_CFG1_BL_8 (2 << 9)
107#define ONENAND_SYS_CFG1_BL_4 (1 << 9)
108#define ONENAND_SYS_CFG1_BL_CONT (0 << 9)
109#define ONENAND_SYS_CFG1_BL_SHIFT (9)
110#define ONENAND_SYS_CFG1_NO_ECC (1 << 8)
111#define ONENAND_SYS_CFG1_RDY (1 << 7)
112#define ONENAND_SYS_CFG1_INT (1 << 6)
113#define ONENAND_SYS_CFG1_IOBE (1 << 5)
114#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4)
115
116#define ONENAND_CTRL_ONGO (1 << 15)
117#define ONENAND_CTRL_LOCK (1 << 14)
118#define ONENAND_CTRL_LOAD (1 << 13)
119#define ONENAND_CTRL_PROGRAM (1 << 12)
120#define ONENAND_CTRL_ERASE (1 << 11)
121#define ONENAND_CTRL_ERROR (1 << 10)
122#define ONENAND_CTRL_RSTB (1 << 7)
123#define ONENAND_CTRL_OTP_L (1 << 6)
124#define ONENAND_CTRL_OTP_BL (1 << 5)
125
126#define ONENAND_INT_MASTER (1 << 15)
127#define ONENAND_INT_READ (1 << 7)
128#define ONENAND_INT_WRITE (1 << 6)
129#define ONENAND_INT_ERASE (1 << 5)
130#define ONENAND_INT_RESET (1 << 4)
131#define ONENAND_INT_CLEAR (0 << 0)
132
133#define ONENAND_WP_US (1 << 2)
134#define ONENAND_WP_LS (1 << 1)
135#define ONENAND_WP_LTS (1 << 0)
136
137#define ONENAND_ECC_1BIT (1 << 0)
138#define ONENAND_ECC_2BIT (1 << 1)
139#define ONENAND_ECC_2BIT_ALL (0xAAAA)
140
141#define ONENAND_OTP_LOCK_OFFSET (14)
142
143#endif
144