1//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares the Sparc specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef SPARCTARGETMACHINE_H 15#define SPARCTARGETMACHINE_H 16 17#include "SparcInstrInfo.h" 18#include "SparcISelLowering.h" 19#include "SparcFrameLowering.h" 20#include "SparcSelectionDAGInfo.h" 21#include "SparcSubtarget.h" 22#include "llvm/Target/TargetMachine.h" 23#include "llvm/Target/TargetData.h" 24#include "llvm/Target/TargetFrameLowering.h" 25 26namespace llvm { 27 28class SparcTargetMachine : public LLVMTargetMachine { 29 SparcSubtarget Subtarget; 30 const TargetData DataLayout; // Calculates type size & alignment 31 SparcInstrInfo InstrInfo; 32 SparcTargetLowering TLInfo; 33 SparcSelectionDAGInfo TSInfo; 34 SparcFrameLowering FrameLowering; 35public: 36 SparcTargetMachine(const Target &T, StringRef TT, 37 StringRef CPU, StringRef FS, const TargetOptions &Options, 38 Reloc::Model RM, CodeModel::Model CM, 39 CodeGenOpt::Level OL, bool is64bit); 40 41 virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; } 42 virtual const TargetFrameLowering *getFrameLowering() const { 43 return &FrameLowering; 44 } 45 virtual const SparcSubtarget *getSubtargetImpl() const{ return &Subtarget; } 46 virtual const SparcRegisterInfo *getRegisterInfo() const { 47 return &InstrInfo.getRegisterInfo(); 48 } 49 virtual const SparcTargetLowering* getTargetLowering() const { 50 return &TLInfo; 51 } 52 virtual const SparcSelectionDAGInfo* getSelectionDAGInfo() const { 53 return &TSInfo; 54 } 55 virtual const TargetData *getTargetData() const { return &DataLayout; } 56 57 // Pass Pipeline Configuration 58 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 59}; 60 61/// SparcV8TargetMachine - Sparc 32-bit target machine 62/// 63class SparcV8TargetMachine : public SparcTargetMachine { 64 virtual void anchor(); 65public: 66 SparcV8TargetMachine(const Target &T, StringRef TT, 67 StringRef CPU, StringRef FS, 68 const TargetOptions &Options, 69 Reloc::Model RM, CodeModel::Model CM, 70 CodeGenOpt::Level OL); 71}; 72 73/// SparcV9TargetMachine - Sparc 64-bit target machine 74/// 75class SparcV9TargetMachine : public SparcTargetMachine { 76 virtual void anchor(); 77public: 78 SparcV9TargetMachine(const Target &T, StringRef TT, 79 StringRef CPU, StringRef FS, 80 const TargetOptions &Options, 81 Reloc::Model RM, CodeModel::Model CM, 82 CodeGenOpt::Level OL); 83}; 84 85} // end namespace llvm 86 87#endif 88