| e8deca83c157999062b4894163fd6b5023c5cf91 |
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07-Oct-2011 |
Andrew Trick <atrick@apple.com> |
PostRA scheduler fix. Clear stale loop dependencies.
Fixes <rdar://problem/10235725>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 4563bbaba7fad4403acf0236cbd75805c68f2a90 |
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07-Oct-2011 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141356 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| e29e8e100ea38be1771e5f010a5511cbb990d515 |
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02-Jun-2011 |
Devang Patel <dpatel@apple.com> |
Update DBG_VALUEs while breaking anti dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132487 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| cf4cc84738abc5f63a05b0956e756c66c519ded5 |
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02-Jun-2011 |
Devang Patel <dpatel@apple.com> |
During post RA scheduling, do not try to chase reg defs. to preserve DBG_VALUEs. This approach has several downsides, for example, it does not work when dbg value is a constant integer, it does not work if reg is defined more than once, it places end of debug value range markers in the wrong place. It even causes misleading incorrect debug info when duplicate DBG_VALUE instructions point to same reg def.
Instead, use simpler approach and let DBG_VALUE follow its predecessor instruction. After live debug value analysis pass, all DBG_VALUE instruction are placed at the right place. Thanks Jakob for the hint!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132483 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| ec6906ba47d6d32cc817e85eddb87b320d6ae18c |
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23-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Properly model the latency of register defs which are 1) function returns or
2) live-outs.
Previously the post-RA schedulers completely ignore these dependencies since
returns, branches, etc. are all scheduling barriers. This patch model the
latencies between instructions being scheduled and the barriers. It also
handle calls by marking their register uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 3ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1 |
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10-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| f28dd8861190df4926cdc66201a39a6af950d564 |
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24-Jul-2010 |
Bob Wilson <bob.wilson@apple.com> |
Change ScheduleDAGInstrs::Defs and ::Uses to be variable-size vectors
instead of fixed size arrays, so that increasing FirstVirtualRegister to 16K
won't cause a compile time performance regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109330 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 2f2b25451b8fd6ab0625e78df9e5c710eba2d87f |
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29-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
When processing loops for scheduling latencies (used for live outs on loop
back-edges), make sure not to include dbg_value instructions in the count.
Closing in on the end of rdar://7797940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107119 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 16d8f8bd919b72866e687d99f3aa94a140137c59 |
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11-May-2010 |
Duncan Sands <baldrick@free.fr> |
I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103495 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| af1d8ca44a18f304f207e209b3bdb94b590f86ff |
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01-May-2010 |
Dan Gohman <gohman@apple.com> |
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| bfdf7f38523bd38ae0538861a2bfd8bdc46e5c33 |
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10-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Progress towards shepherding debug info through SelectionDAG.
No functional effect yet. This is still evolving and should
not be viewed as final.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 38bdfc69cbe370ce5f623df4449afa32cda97422 |
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18-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Spill slots cannot alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84432 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 7fa50ede618f96821a8e5d8e8a5dd374097b2bde |
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12-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Remove a redundant member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83857 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| a70dca156fa76d452f54829b5c5f962ddfd94ef2 |
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10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Factor out LiveIntervalAnalysis' code to determine whether an instruction
is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.
This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| fb2e752e4175920d0531f2afc93a23d0cdf4db14 |
|
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| dc4bdcdef1c8dd1a28b82deb08df039e5c0ffc5a |
|
19-Aug-2009 |
David Goodwin <david_goodwin@apple.com> |
Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79425 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 47ac0f0c7c39289f5970688154e385be22b7f293 |
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11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
When scheduling a block in parts, keep track of the overall
instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.
Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64288 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 9e64bbb322417c09f27afdf08e3946287c9df5aa |
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11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Factor out more code for computing register live-range informationfor
scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.
In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
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| 6dc75fe5279e2c12bda13dcc4a1a13908de8596f |
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06-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Move ScheduleDAGInstrs.h to be a private header. Front-ends
that used this header to select a scheduling policy should
use SchedulerRegistry.h instead (llvm-gcc and clang were
updated a while ago).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/ScheduleDAGInstrs.h
|