| 5d637d7e93c1f6058c16b41b8ac7dd36c61b4a5c |
|
05-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
Fix function name per coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163187 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2cc97def7434345e399e4f5f3f2001d6d7a93c6f |
|
03-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, add
the NumMCOperands argument to the GetMCInstOperandNum() function that is set
to the number of MCOperands this asm operand mapped to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 038f3e31276f8cc86d91d0e4513e1a3ddb8509ba |
|
03-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Add an interface to the GetMCInstOperandNum() function in the
MCTargetAsmParser class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c4d2560a2010456f4eea0007eb71829d5668e7dd |
|
03-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
Removed unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163104 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3a86e1396230748f17a521915bc802939a787eac |
|
03-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Expose the Kind and Opcode variables from the
MatchInstructionImpl() function.
These values are used by the ConvertToMCInst() function to index into the
ConversionTable. The values are also needed to call the GetMCInstOperandNum()
function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163101 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 756d2cc2f7f6745603fdc0ec1ed4476d06385845 |
|
01-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
Remove an unused argument. The MCInst opcode is set in the ConvertToMCInst()
function nowadays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163030 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 429af6fa4124d8b6dd310069e0a44dcacb35fc8a |
|
31-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
Add a comment to explain what's really going on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163005 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5d04a560a875eef5cc7ae2bfadaf7d46ea8a60c5 |
|
31-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
The ConvertToMCInst() function can't fail, so remove the now dead Match_ConversionFail enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163002 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 359956dc1be35df4f8179eb14cea617c3ef10dd7 |
|
31-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
With the fix in r162954/162955 every cvt function returns true. Thus, have
the ConvertToMCInst() return void, rather then a bool. Update all the cvt
functions as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fafa283e65bca1473eace94057077129a76dbdcc |
|
31-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
Fix for r162954. Return the Error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162955 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 64b3444cbf7f5976502ff4cf6fc89aed4986b59c |
|
31-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
Move a check to the validateInstruction() function where it more properly belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162954 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1122fc40c16785d510025daeb6c72a075f7e2e5b |
|
31-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| df1c637ac4b6f6587c037be55cafed665c732d8f |
|
10-Aug-2012 |
Eric Christopher <echristo@apple.com> |
Remove getARMRegisterNumbering and replace with calls into
the register info for getEncodingValue. This builds on the
small patch of yesterday to set HWEncoding in the register
file.
One (deprecated) use was turned into a hard number to avoid
needing register info in the old JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fd652df8b36a9d3e6b09ae2b9f7bcb07e88fdfaa |
|
02-Aug-2012 |
Jiangning Liu <jiangning.liu@arm.com> |
Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset index issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c1b7ca5ba28ded2d83ae534c8e072c2538d43295 |
|
02-Aug-2012 |
Jiangning Liu <jiangning.liu@arm.com> |
Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161161 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1fb27eccf5b7eabde9678d84411eb1df8a693683 |
|
02-Aug-2012 |
Jiangning Liu <jiangning.liu@arm.com> |
Fix #13241, a bug around shift immediate operand for ARM instruction ADR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 874b863f2ab9158db6f7f1b773b77e6334e31c41 |
|
09-Jul-2012 |
Richard Barton <richard.barton@arm.com> |
Some formatting to keep Clang happy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159948 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8ed97ef5f6980c689a5770ec30488601201e17c3 |
|
09-Jul-2012 |
Richard Barton <richard.barton@arm.com> |
Prevent ARM assembler from losing a right shift by #32 applied to a register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159937 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c985e6ece66cf2046f0113da9eb2dec331a6b09f |
|
09-Jul-2012 |
Richard Barton <richard.barton@arm.com> |
Spelling!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2b6652fb10d7005e41010b0e0800afe16ae18a34 |
|
09-Jul-2012 |
Richard Barton <richard.barton@arm.com> |
Teach the assembler to use the narrow thumb encodings of various three-register dp instructions where permissable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159935 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4acefe192f02849bcb2fd620a9f507c00d39a686 |
|
27-Jun-2012 |
Richard Barton <richard.barton@arm.com> |
Teach assembler to handle capitalised operation values for DSB instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159259 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b69182095ce19c07a7207ab546f61bffc5111d8e |
|
27-Jun-2012 |
Richard Barton <richard.barton@arm.com> |
Prevent ARM Assembler crashing on unrecognised assembly format for DSB instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159257 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 70c9bf3c1a77b5707c92a7cfe74104c320480391 |
|
23-Jun-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM: Add a better diagnostic for some out of range immediates.
As an example of how the custom DiagnosticType can be used to provide
better operand-mismatch diagnostics, add a custom diagnostic for
the imm0_15 operand class used for several system instructions.
Update the tests to expect the improved diagnostic.
rdar://8987109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159051 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f49a4092bcf679d1634a8023efc593e98a3e5663 |
|
16-Jun-2012 |
Kevin Enderby <enderby@apple.com> |
Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,
iaspr, espr and xpsr which also needed to have 0b10 in their mask encoding bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a1c7367a5bed459acc88e3ea2a482b4b5dac942a |
|
14-Jun-2012 |
Richard Barton <richard.barton@arm.com> |
Replace assertion failure for badly formatted CPS instrution with error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158445 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d9b0b025612992a0b724eeca8bdf10b1d7a5c355 |
|
02-Jun-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix typos found by http://github.com/lyda/misspell-check
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 032f441afcdd70eb6bda477d32e8c372443b4e6f |
|
24-May-2012 |
Craig Topper <craig.topper@gmail.com> |
Mark a static array as const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157368 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0fd4f3c8de07e9cfe2a86093ccada82d64f38bfe |
|
18-May-2012 |
Kevin Enderby <enderby@apple.com> |
Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing
the 0b10 mask encoding bits. Make MSR APSR writes without a _<bits> qualifier
an alias for MSR APSR_nzcvq even though ARM as deprecated it use. Also add
support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions. Some FIXMEs in
the code for better error checking when versions shouldn't be used.
rdar://11457025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157019 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ca3cd419a52c1dedee133d79772ef97f30e5d20b |
|
11-May-2012 |
Silviu Baranga <silviu.baranga@arm.com> |
Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156608 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a9cc08f24f61e2663a131d7ac16c329b75162e7b |
|
28-Apr-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM: Thumb add(sp plus register) asm constraints.
Make sure when parsing the Thumb1 sp+register ADD instruction that
the source and destination operands match. In thumb2, just use the
wide encoding if they don't. In Thumb1, issue a diagnostic.
rdar://11219154
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 04a09a461beb4ec629fe53e601b7665547ac35c3 |
|
27-Apr-2012 |
Richard Barton <richard.barton@arm.com> |
Fix ARM assembly parsing for upper case condition codes on IT instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155720 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4d2f077df1b46a126b5595d983f233ec896b757e |
|
27-Apr-2012 |
Richard Barton <richard.barton@arm.com> |
Refactor IT handling not to store the bottom bit of the condition code in the mask operand in the MCInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b56e4115ed33dae56108ed4ce88ee3a0e0392bfc |
|
25-Apr-2012 |
Richard Barton <richard.barton@arm.com> |
Unify internal representation of ARM instructions with a register right-shifted by #32. These are stored as shifts by #0 in the MCInst and correctly marshalled when transforming from or to assembly representation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155565 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8030e1a0df630ec6ed1cd5ec673f6472558a4dbe |
|
25-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Add ifdef around getSubtargetFeatureName in tablegen output file so that only targets that want the function get it. This prevents other targets from getting an unused function warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 14ce6fac242228dacc5c08040e544141a96880e5 |
|
25-Apr-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM: improved assembler diagnostics for missing CPU features.
When an instruction match is found, but the subtarget features it
requires are not available (missing floating point unit, or thumb vs arm
mode, for example), issue a diagnostic that identifies what the feature
mismatch is.
rdar://11257547
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155499 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b8768dc32df0bf3edfa2777cdef57bb066e54344 |
|
16-Apr-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM handle :lower16: and :upper16: after a '#' prefix.
rdar://11252521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154862 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 362a05a635379ca1151e5ccf735295aed814dd4b |
|
15-Apr-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Wire up support for diagnostic ranges in the ARMAsmParser.
As an example, attach range info to the "invalid instruction" message:
$ clang -arch arm -c asm.c
asm.c:2:11: error: invalid instruction
__asm__("foo r0");
^
<inline asm>:1:2: note: instantiated into assembly here
foo r0
^~~
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154765 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a5378ebe7890aa9a4974f2872aa6632f1b7f2400 |
|
11-Apr-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM add missing Thumb1 two-operand aliases for shift-by-immediate.
rdar://11222742
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154457 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 82509e5c62a99912c636b22e227b810eaf6eda78 |
|
11-Apr-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fix a number of problems with ARM fused multiply add/subtract instructions.
1. The new instruction itinerary entries are not properly described.
2. The asm parser can't handle vfms and vfnms.
3. There were no assembler, disassembler test cases.
4. HasNEON2 has the wrong assembler predicate.
rdar://10139676
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a23ecc2ba945c9685a76552276e5f6f41859b4ab |
|
10-Apr-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM fix cc_out operand handling for t2SUBrr instructions.
We were incorrectly conflating some add variants which don't have a
cc_out operand with the mirroring sub encodings, which do. Part of the
awesome non-orthogonality legacy of thumb1. Similarly, handling of
add/sub of an immediate was sometimes incorrectly removing the cc_out
operand for add/sub register variants.
rdar://11216577
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4e53fe8dc61ad48650ac6fe30d7268ec92b7fc1a |
|
05-Apr-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly aliases for add negative immediates using sub.
'add r2, #-1024' should just use 'sub r2, #1024' rather than erroring out.
Thumb1 aliases for adding a negative immediate to the stack pointer,
also.
rdar://11192734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b657a90929867716ca1c7c12d442bb5d32281bd4 |
|
05-Apr-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing for 'msr' plain 'cpsr' operand.
Plain 'cpsr' is an alias for 'cpsr_fc'.
rdar://11153753
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154080 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ad353c630359d285018a250d72c80b7022d8e67e |
|
30-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM assembler should prefer non-aliases encoding of cmp.
When an immediate is both a value [t2_]so_imm and a [t2_]so_imm_neg,
we want to use the non-negated form to make sure we prefer the normal
encoding, not the aliased encoding via the negation of, e.g., 'cmp.w'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153770 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8f1148bd07d57a1324ed39250642119baa540b7c |
|
30-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM can only use narrow encoding for low regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153765 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2d30d947ec2626e8b1a9b577cdfa4121f476c3f5 |
|
30-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM integrated assembler should encoding choice for add/sub imm.
For 'adds r2, r2, #56' outside of an IT block, the 16-bit encoding T2
can be used for this syntax. Prefer the narrow encoding when possible.
rdar://11156277
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c0164f86080bc9d7a41fd5eabd0d6556396f5b38 |
|
30-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing needs to be paranoid about negative immediates.
Make sure to treat immediates as unsigned when doing relative comparisons.
rdar://11153621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b22e70d835a88753d3ec6d5ee5e85b23fa6834b1 |
|
29-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly 'cmp lr, #0' should not encode using 'cmn'.
The CMP->CMN alias was matching for an immediate of zero when it
should only match for negative values.
rdar://11129224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153689 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9f2e160f7ae90a7a80b17e38ad06f2c706515115 |
|
20-Mar-2012 |
Kevin Enderby <enderby@apple.com> |
Fix assembling ARM vst2 instructions with double-spaced registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ceee984302a1cf1d659a186cf94149c779866da5 |
|
19-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly, accept optional '#' on lane index number.
rdar://11057160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153053 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| be7cf2b377d987f46d10f54f89ae4e1a71c37f55 |
|
16-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM ldm/stm register lists can be out of order.
It's not a good style idea, as the registers will be laid down in memory in
numerical order, not the order they're in the list, but it's legal. vldm/vstm
are stricter.
rdar://11064740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b84ad4aa7dacfba5337520740d47770f2200201c |
|
15-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM case-insensitive checking for APSR_nzcv.
rdar://11056591
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152846 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6357caec785268d1e39059d03eb2034dee65467f |
|
15-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM aliases for pre-unified syntax fcmpz[sd] mnemonics.
rdar://11056647
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4d0983a4d734280d481bb56472fe44ad0ddc447d |
|
07-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM more NEON VLD/VST composite physical register refactoring.
Register pair, all lanes subscripting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152157 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c0fc450f0754508871bc70f21e528bf2f1520da1 |
|
06-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor more NEON VLD/VST instructions to use composite physregs
Register pair VLD1/VLD2 all-lanes instructions. Kill off more of the
pseudos as a result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152150 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c3384c93c0e4c50da4ad093f08997507f9281c75 |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM Refactor VLD/VST spaced pair instructions.
Use the new composite physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| af9f4bc752292b3282f110c11aeb2a1ffb710bbf |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM Remove a bit of dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152061 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 28f08c93e75d291695ea89b9004145103292e85b |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor away a bunch of VLD/VST pseudo instructions.
With the new composite physical registers to represent arbitrary pairs
of DPR registers, we don't need the pseudo-registers anymore. Get rid of
a bunch of them that use DPR register pairs and just use the real
instructions directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| bc2198133a1836598b54b943420748e75d5dea94 |
|
07-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 24dda217052b48373ed89d043a778aabb2f65080 |
|
01-Feb-2012 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. One more return type mismatch fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149452 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 42e6bd38e02e2e1c2cc50d2f12036c38c4ea3ab0 |
|
27-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Keep source information, if available, around for ARM Fixups.
Adjust an example MachObjectWriter diagnostic to use the information
to issue a better message.
Before:
LLVM ERROR: unknown ARM fixup kind!
After:
x.s:6:5: error: unsupported relocation on symbol
beq bar
^
rdar://9800182
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ef4d3ebe2a36ebfd9370e1efbe74dff13f64c40f |
|
26-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. Fix mismatched return types for error handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149062 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 74423e32ce7f426b624bfb0c31481bcf6a36394d |
|
25-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM assemly parsing and validation of IT instruction.
"Although a Thumb2 instruction, the IT mnemonic shall be permitted in
ARM mode, and the condition verified to match the condition code(s)
on the following instruction(s)."
PR11853
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a57a36abe7d0b769a495ed886246db157aff4add |
|
25-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD4(all lanes) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5e59f7e15ed3770b32481cd72d2c15b159e991e6 |
|
25-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD3(all lanes) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148882 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 88a54de799240d5de2e79dfff4671ad5653e7ceb |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VST4(one lane) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148836 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e983a134e7e40e214f590c3d8ba565bb85f39628 |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD4(one lane) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 539aab771fea06bd230789e19c9672ef80ad1c7e |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VST4(multiple 4 element structures) assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8abe7e33641fccfa70a7e335939e83dfbf654fe8 |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD4(multiple 4 element structures) assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7945eade3d8db8c1dd52a291cee5d55ac0539586 |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. Remove some vertical space for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4adb18234278d6d40e5791e0dd6970be9a4b0b57 |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VST3(single element from one lane) assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d7433e2873706265d545edc5cdd0a728dd71ef66 |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VST3(multiple 3-element structures) assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c387fc66bd52e4276fdc2704a3aaed57cc1f9a11 |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD3(multiple 3-element structures) assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3a678af71dec76a7e1474ad85a99b3588516906d |
|
23-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD3 lane-indexed assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148734 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8b31f95bdde1e3809a1c9fdb6926b1840effcf9c |
|
23-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Simplify some NEON assembly pseudo definitions.
Let the generic token alias definitions handle the data subtype
suffices. We don't need explicit versions for each.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148718 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 12a8863828879168ffd634df09f3aa91b0b256ee |
|
21-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148601 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 |
|
20-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
More dead code removal (using -Wunreachable-code)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 51222d1551383dd7b95ba356b1a5ed89df69e789 |
|
20-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON use vmov.i32 to splat some f32 values into vectors.
For bit patterns that aren't representable using the 8-bit floating point
representation for vmov.f32, but are representable via vmov.i32, treat
the .f32 syntax as an alias. Most importantly, this covers the case
'vmov.f32 Vd, #0.0'.
rdar://10616677
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148556 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ae69f703d59410fc96f04be3c1afeaa1c17a45ce |
|
19-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly diagnostic caret in better position for FPImm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0b4c6738868e11ba06047a406f79489cb1db8c5a |
|
18-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 alternate syntax for LDR(literal) and friends.
Explicit pc-relative syntax. For example, "ldrb r2, [pc, #-22]".
rdar://10250964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148432 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2dd674fdce68f8fd59d78a3bbab2cf5b8d220290 |
|
17-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly.
(This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148262 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 19055cc2712223f6834fc3cf5b547803ba83f066 |
|
03-Jan-2012 |
Matt Beaumont-Gay <matthewbg@google.com> |
Fix malformed assert.
If anybody has strong feelings about 'default: assert(0 && "blah")' vs
'default: llvm_unreachable("blah")', feel free to regularize the instances of
each in this file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4050bc4cab61f8d3c7583a9b60f17c7da47bbf69 |
|
22-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).
rdar://10558523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147189 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 21bcca81f4597f1c7d939e5d69067539ff804e6d |
|
22-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. Use predicate function a bit more liberally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1aa149f5acea364aa8bc9cfc3a167f78eff2e96b |
|
22-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM pre-UAL aliases. fcmp[sd].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8d9550bde95c8d128e7bf62e9e65dec1854e2d1d |
|
22-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembler should accept shift-by-zero for any shifted-immediate operand.
Just treat it as-if the shift wasn't there at all. 'as' compatibility.
rdar://10604767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147153 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| de626ad8726677328e10dbdc15011254214437d7 |
|
22-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parser canonicallize on 'lsl' for shift-by-zero form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147152 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 18c8d12dea944086ef0ce2f674ca8a34de2bbd74 |
|
22-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147151 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f1a88fc474b87d66906689f5bf76d67cb5b1a4c7 |
|
22-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Nuke invalid comment from copy/paste.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147150 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| de4d83943a5206690fbe1e39dd33770f5ab29595 |
|
21-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM asm parser should be more lenient w/ .thumb_func directive.
Rather than require the symbol to be explicitly an argument of the directive,
allow it to look ahead and grab the symbol from the next non-whitespace
line.
rdar://10611140
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 520dc78d92a47af5e644b09f401d278cb1d5d196 |
|
21-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing of 'mov rd, rn, rrx'.
Maps to the RRX instruction. Missed this case earlier.
rdar://10615373
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2cc5cda464e7c936215281934193658cb799c603 |
|
21-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing of 'mov(register shifted register)' aliases.
These map to the ASR, LSR, LSL, ROR instruction definitions.
rdar://10615373
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c931325d99a93c273844c38d3c762705c454ae93 |
|
21-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing allows constant expressions for lane indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147028 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3471d4fbbd50eabb12511b711cbd2afd7bb9d962 |
|
21-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147025 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| aee718beac4fada5914d773db38002d95cae5e0d |
|
21-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM .req register name aliases are case insensitive, just like regnames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147009 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3cbe43fe69680df772d83947ced97ca445861213 |
|
20-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Move comment to appropriate place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147000 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5b484312c66f8d125c072517947538f301c5a805 |
|
20-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for VST2 single-element, double spaced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 95fad1c6034cdf8010428e61b71cd196ee1698ad |
|
20-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for VLD2 single-element, double spaced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146983 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d7c9e08b6bcf15655919960e214b9b91677cdde9 |
|
20-Dec-2011 |
Jason W Kim <jason.w.kim.2009@gmail.com> |
First steps in ARM AsmParser support for .eabi_attribute and .arch
(Both used for Linux gnueabi)
No behavioral change yet (no tests need so far)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146977 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 04b5d93250bef585631a583a85f6733b1bdc8c52 |
|
20-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly shifts by zero should be plain 'mov' instructions.
"mov r1, r2, lsl #0" should assemble as "mov r1, r2" even though it's
not strictly legal UAL syntax. It's a common extension and the friendly
thing to do.
rdar://10604663
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146937 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9b0878512fb57ee4b0bc483509e4d9f4f0b9e426 |
|
20-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON assembly aliases for VMOV<-->VMVN for i32 immediates.
e.g., "vmov.i32 d4, #-118" can be assembled as "vmvn.i32 d4, #117"
rdar://10603913
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2f196747f15240691bd4e622f7995edfedf90f61 |
|
20-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding support for LDRD(label).
rdar://9932658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6849019079794c573b72c1ec55613cb6ba1297a5 |
|
19-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VFP pre-UAL mnemonic aliases for fmul[sd].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146892 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9c39789c361d4fe2632f28fca74c9ea5fff3dafc |
|
19-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VFP pre-UAL mnemonic aliases for fcpy[sd] and fdiv[sd].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146887 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| eeaf1c1636c664c707fd9ecc96916fd20ddf137a |
|
19-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON relax parse time diagnostics for alignment specifiers.
There's more variation that we need to handle. Error checking will need
to be on operand predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 276ed0344c05822617934fa4a6a9920d864193a5 |
|
15-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Silence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146686 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0aaf4cd9b34454eb381e1694f520504779c6b7f8 |
|
15-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON two-register double spaced register list parsing support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146685 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 799ca9d1b7cfa8910ac27f8de4929bfbd278114d |
|
15-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON better assembly operand range checking for lane indices of VLD/VST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146608 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9b1b3902882675e5ce35eacd639456bd648324b7 |
|
15-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON VLD2/VST2 lane indexed assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146605 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a39cda7aff2d379ad9c15500319ab037baa48747 |
|
14-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembler support for the target-specific .req directive.
rdar://10549683
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146543 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 863d2af9477e331955a9bee8be1969ce658b59b5 |
|
13-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembler aliases for "mov(shifted register)"
rdar://10549767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146520 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 27debd60a152d39e421c57bce511f16d8439a670 |
|
13-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM LDM/STM system instruction variants.
rdar://10550269
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146519 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d7ea73a4909fc3200a1cecd2b420d7ace2180b70 |
|
13-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 tweak for ccout handling in RSB parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146516 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 55b02f28c1a2960ebb88cf5019cc5b36bb2eabf4 |
|
13-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM thumb2 parsing of "rsb rd, rn, #0".
rdar://10549741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146515 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f10154010ec01a6965f86e8c136db79732c92eee |
|
13-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146508 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 48171e7fbe58bb418f09717813779d03903d35e4 |
|
10-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146300 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 21d7fb814adcedc7b2f156e003d2083ad1d8ac6a |
|
10-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM add some pre-UAL VFP mnemonics for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8a12e3b5df13b279eff3cfc29e0d7808ff86aa44 |
|
09-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM allows '' syntax, not just '#imm' for assembly.
Backwards compatibility with 'gas'. #imm is the preferered and documented
syntax, but lots of existing code uses the '$' prefix, so we should
support it if we can.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146285 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 976c0da213bb9a4f07d4ca2a82765b5e590be05d |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM convenience aliases for VSQRT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146201 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6b044c26094a9f86da7d12945b00a47a5f07cf6d |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VSHR implied destination operand form aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146192 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a62d11ea942ab99ba74589f74d390138654b6197 |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM asm parser, just issue a warning for a duplicate reg in a list.
For better 'gas' compatibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146185 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 40e285554773c51f6dd6eb8d076256e557fab9c3 |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembler support for register name aliases.
rdar://10550084
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 730fe6c1b686fe71c8e549b0f955e65a6a49d3ff |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON two-operand aliases for VSHL(immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8254f02231faeb15b0abaad96a99ac9e40feb908 |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VFP support 'fmrs/fmsr' aliases for 'vldr'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 67ca1adf822c6cbc2f2bb78b8f94eefd099a8eb6 |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VFP support 'flds/fldd' aliases for 'vldr'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146115 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3bc8a3d3afe3ddda884a681002e24850099b719e |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembler aliases for "add Rd, #-imm" to "sub Rd, #imm".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146111 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| af4edea67b007592f9474e07d27182956e37f7f5 |
|
08-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands.
For 'gas' compatibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9a70df99ca674b288d50dbf454779ed75d6e48dd |
|
07-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM support the .arm and .thumb directives for assembly mode switching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146042 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3b8991cc98a469cbf8d9fa2a2ad971f46b8b6fd2 |
|
07-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM: NEON SHLL instruction immediate operand range checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146003 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| df33e0d05e6b7dc3d65cdb96e52fb6fb6b07f876 |
|
06-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 encoding choice correction for PLD.
Using encoding T1 for offset of #0 and encoding T2 for #-0.
rdar://10532413
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 713c70238c6d150d2cd458b07ab35932fafe508e |
|
05-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Tweak ADDrr fix. Bad check for explicit .w
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145863 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 927b9df4c678371d3fb1308be90e76ed44af72f8 |
|
05-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 prefer ADD register encoding T2 to T3 when possible.
rdar://10529664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145860 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| da84786bee8304588a4325b15e297be1995a5d41 |
|
05-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.
rdar://10529348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145851 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 587f5062b9e4532c4f464942e593cb87c58ac153 |
|
03-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON VEXT aliases for data type suffices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 84defb51ca183d136e08e87d95e2c907654405f9 |
|
02-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VST1 single lane assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145718 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 872eedbb3a46618e333db42ee9c41fda34eb1e9b |
|
02-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VLD1 single lane assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| dad2f8e7fb2df5fb080a38fa4c33a01f19729f15 |
|
02-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Clean up aliases for ARM VLD1 single-lane assembly parsing a bit.
Add the 16-bit lane variants while I'm at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145693 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7636bf6530fd83bf7356ae3894246a4e558741a4 |
|
02-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM start parsing VLD1 single lane instructions.
The alias pseudos need cleaned up for size suffix handling, but this gets
the basics working. Will be cleaning up and adding more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145655 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 13af222bab6fdc77d8193eb38e78a9cbed1d9d1f |
|
30-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing for VLD1 two register all lanes, no writeback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 98b05a57b67d1968381563c8cccbbb6c6cb65e3d |
|
30-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing aliases for VLD1 single register all lanes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6029b6ddafad45791c9e9d8e8ddd96978294beef |
|
30-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145458 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| efed3d1f58f69ec0a9bbe74e2ce5cc9b939a3805 |
|
16-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Clean up debug printing of ARM shifted operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144836 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 48b368bcd5fd6d1857de137230ac019b8530f1cd |
|
16-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing for RRX mnemonic.
rdar://9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144812 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 23f220705a74685edd743e84861a3e0d6d109828 |
|
16-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM mode aliases for bitwise instructions w/ register operands.
rdar://9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144803 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e43862b6a6130ec29ee4e9e6c6c30b5607c9a728 |
|
16-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing for register range syntax for VLD/VST register lists.
For example,
vld1.f64 {d2-d5}, [r2,:128]!
Should be equivalent to:
vld1.f64 {d2,d3,d4,d5}, [r2,:128]!
It's not documented syntax in the ARM ARM, but it is consistent with what's
accepted for VLDM/VSTM and is unambiguous in meaning, so it's a good thing to
support.
rdar://10451128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144727 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6cb4b081829880ba97a729bcf33fd59517ca5450 |
|
15-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM accept an immediate offset in memory operands w/o the '#'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5c984e451d604e3ff3cfdc5db7c0b6ca6be7a14f |
|
15-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM enclosing curly braces optional on one-register VLD/VST instruction lists.
'vld1.f32 d4, [r7]' should be parsed as equivalent to 'vld1.f32 {d4}, [r7]'
rdar://10450488.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144701 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 25e0a87e9190cdca62aee5ac95cfc8ef44f35e92 |
|
15-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144695 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7f1ec9570d673aedd13c5621407085400bab8299 |
|
15-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 two-operand 'mul' instruction wide encoding parsing.
rdar://10449724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144684 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1de0bd194540f8bab399fb39c4ba615a7b2381d3 |
|
15-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing for mul.w in IT block fix.
When the 3rd operand is not a low-register, and the first two operands are
the same low register, the parser was incorrectly trying to use the 16-bit
instruction encoding.
rdar://10449281
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 430052b084de7ab4eb6162b9f1a6a16bfb2a80ad |
|
14-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. 80 column.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9588c10b69121d9746b09e868fcc8879cbd98e3a |
|
12-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor simple immediate asm operand render methods.
These immediate operands all use the same simple logic for rendering to
MCInst, so have them share the method for doing so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144439 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7aef99b677452724100145c81f76f32e494cc5a7 |
|
12-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM vldm and vstm VFP instructions can take a data type suffix.
It's ignored by the assembler when present, but is legal syntax. Other
instructions have something similar, but for some mnemonics it's
only sometimes not significant, so this quick check in the parser will
need refactored into something more robust soon-ish. This gets some
basics working in the meantime.
Partial for rdar://10435264
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144422 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c3937b97c00a857dff3528895e71ecfbc7ff3a28 |
|
11-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Nuke no longer accurate comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ce485e7f70faed6d19daafff91bb20509403d432 |
|
11-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM allow Q registers in vldm/vstm register lists.
rdar://9672822
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144407 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0352b4679e9289ded6b2d73a76a017e0d97fe70d |
|
11-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.
rdar://10429490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144338 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 83ec87755ed4d07f6650d6727fb762052bd0041c |
|
11-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM let processInstruction() tranforms chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5402637ff283d7397513d5c1699cdf2274c47313 |
|
11-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 parsing for push/pop w/ hi registers in the reglist.
rdar://10130228.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fae02597bb90f4334079580441b8e5876be4a3d2 |
|
11-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb1 diagnostics for reglist on PUSH/POP fix.
Was not checking the first register in the register list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144329 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1b332860aef0121cf4591f4377a7201ce0ef8366 |
|
10-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb MUL assembly parsing for 3-operand form.
Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.
rdar://10428630
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144322 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d475f8612b1c7959dbf50242c8fa9d4aea1ee1a9 |
|
10-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM .thumb_func directive for quoted symbol names.
Use the getIdentifier() method of the token, not getString(), otherwise
we keep the quotes as part of the symbol name, which we don't want.
rdar://10428015
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ee10ff89a2934636570cb17b756bf31b2a38aab5 |
|
10-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing for LSR/LSL/ROR(immediate).
More of rdar://9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144301 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 71810ab7c0ecd6927dde1eee0c73169642f3764d |
|
10-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing for ASR(immediate).
Start of rdar://9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144293 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 590853667345d6fb191764b9d0bd2ff13589e3a3 |
|
06-Nov-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Replace (Lower|Upper)caseString in favor of StringRef's newest methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6284afc293c8f6e84dffab8731aa9e679d437745 |
|
01-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM label operands can be quoted.
For example, labels from Objective-C sources.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ed6a0c5243f4dc13169edc8e342c679f1bfc201c |
|
01-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM label operands can have an optional '#' before them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143510 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 681460f954e9c13ffd2f02f27bba048ccf90abaf |
|
01-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VLD/VST assembly parsing for symbolic address operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143413 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4334e032525d6c9038605f3871b945e8cbe6fab7 |
|
31-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VST1 w/ writeback assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e70ec8463720b5990f0d1ab8d9b6ab56ca1d01c3 |
|
29-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM mode 'mov' to 'mvn' assembler alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143237 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 89a633708542de5847e807f98f86edfefc9fc019 |
|
29-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".
When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example,
mov r2, #-3
becomes
mvn r2, #2
rdar://10349224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c73d73eb881ebe7493e934c00ca1c474ffd0ed2d |
|
28-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM Allow 'q' registers in VLD/VST vector lists.
Just treat it as if the constituent D registers where specified.
rdar://10348896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143167 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a581328ceb4c9db165d79a4dabd6b28db799d70f |
|
27-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 ldr pc-relative encoding fixes.
We were parsing label references to the i12 encoding, which isn't right.
They need to go to the pci variant instead.
More of rdar://10348687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143068 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 758a519a22b469ce8e2b8d0bf7a72813e87710d4 |
|
26-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parse parenthesized expressions for label references.
Partial fix for rdar://10348687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 12431329d617064d6e72dd040a58c1635cc261ab |
|
25-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for VLD1 w/ writeback.
One and two length register list variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1a2f9886a2a60dbd41216468a240446bbfed3e76 |
|
22-Oct-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Move various generated tables into read-only memory, fixing up const correctness along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4661d4cac3ba7f480a91d0ccd35fb2d22d9692d3 |
|
22-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Assembly parsing for 2-register sequential variant of VLD2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142691 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b6310316dbaf8716003531d7ed245f77f1a76a11 |
|
21-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Assembly parsing for 4-register variant of VLD1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142682 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| cdcfa280568d5d48ebeba2dcfc87915105e090d1 |
|
21-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Assembly parsing for 3-register variant of VLD1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142675 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 280dfad48940a0a51726308dd3daa3b1b0d18705 |
|
21-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VLD parsing and encoding.
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.
Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7784f1d2d8b76a7eb9dd9b3fef7213770605532d |
|
21-Oct-2011 |
Owen Anderson <resistor@mac.com> |
Don't automatically set the "fc" bits on MSR instructions if the user didn't ask for them. This is a divergence from gas' behavior, but it is correct per the documentation and allows us to forge ahead with roundtrip testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7926db82686be283ec4cdb68989806c69f388cb1 |
|
21-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Nuke an #if0 that got accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142658 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 862019c37f5b5d76e34eeb0d5686e617d544059f |
|
19-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VTBL (one register) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142441 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f2f5bc60f61acf0490d856ddd09e461bf93c5459 |
|
18-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for VMOV.i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142356 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6248a546f23e7ffa84c171dc364b922e28467275 |
|
18-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142321 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ea46110f57b293844a314aec3b8092adf21ff63f |
|
18-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142303 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fa1ee880520d8da1168278c65575241487f871df |
|
18-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0e387b2877e4eebeedfcb26b08253f9c1b946035 |
|
18-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON "vmov.i8" immediate assembly parsing and encoding.
NEON immediates are "interesting". Start of the work to handle parsing them
in an 'as' compatible manner. Getting the matcher to play nicely with
these and the floating point immediates from VFP is an extra fun wrinkle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142293 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c378015d1cc073e5e8027491514f50e2c7413f9e |
|
17-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Removed set, but unused variables.
Patch by Joe Abbey <jabbey@arxan.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142223 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c66e7afcf2810a2c1ebf08514eaf45c478e5ff67 |
|
12-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for LDC/STC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141811 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9b8f2a0b365ea62a5fef80bbaab3cf0252db2fcf |
|
12-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing and encoding for the <option> form of LDC/STC instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2bd0118472de352745a2e038245fab4974f7c87e |
|
11-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions.
Fill out the rest of the encoding information, update to properly mark
the LDC/STC instructions as predicable while the LDC2/STC2 instructions are
not, and adjust the parser accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 57dcb85a30133a9bc008f0b9ead81be03a23521e |
|
11-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parse alignment specifier for NEON load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141682 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e53c87b302b3ae07c781405572170b0b6641b524 |
|
11-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM Rename operand sub-structure 'Mem' to 'Memory' for a bit more clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141671 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f6c35c59f515505fa2e9b74b3d0f4ab06f8266d8 |
|
11-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Simplify operand Kind checks a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141592 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 460a90540b045c102012da2492999557e6840526 |
|
08-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON assembly parsing and encoding for VDUP(scalar).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 21ff17ce1b57ad68ae01d6eee0ecc36b5dd318cf |
|
08-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM prefix asmparser operand kind enums for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 186ffac4d35c9ea669b03ac75f5e21bff1f01a7f |
|
07-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Improve ARM assembly parser diagnostic for unexpected tokens.
Consider:
mov r8, r11 fred
Previously, we issued the not very informative:
x.s:6:1: error: unexpected token in argument list
^
Now we generate:
x.s:5:14: error: unexpected token in argument list
mov r8, r11 fred
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2dbb46a0a09d4a16a6752cfcbe1d55d51e7d2a31 |
|
05-Oct-2011 |
Owen Anderson <resistor@mac.com> |
Support a valid, but not very useful, encoding of CPSIE where none of the AIF bits are set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141190 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9d39036f62674606565217a10db28171b9594bc7 |
|
04-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for VMOV immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141046 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 68259145d9ac1f8d4e2cc9fc73626254fcc5cf08 |
|
04-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing/encoding for VCMP/VCMPE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141038 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5cd5ac6ad455880395e34ac647f1e962a83763a0 |
|
03-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for VMRS/FMSTAT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141025 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| acad68da50581de905a994ed3c6b9c197bcea687 |
|
28-Sep-2011 |
James Molloy <james.molloy@arm.com> |
Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.
Add decoder and disassembler tests.
Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140696 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0afa0094afdfe589f407feb76948f273b414b278 |
|
26-Sep-2011 |
Owen Anderson <resistor@mac.com> |
ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4d2a00147d19b17d382644de0d6a1f0d3230e0e4 |
|
24-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset of #-0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 50f1c37123968b7f57068280483ec78f6ff7973e |
|
20-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d5d0e81a4bec76a56a1e7b2326ed12bfcbcab9b9 |
|
20-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7f739bee261debdf56bd89ac922b57eca53e91dc |
|
20-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for TBB/TBH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 326efe58918d3f0a431d07938054870fcd0e240f |
|
19-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fb12f35545481e8b42bd547bc37d220ffee77f86 |
|
19-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM asm parsing should handle pre-indexed writeback w/o immediate.
For example, 'ldrb r9, [sp]!' is odd, but valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140035 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f67e8554bf4808ad447ffb5d2deebbb10b810391 |
|
17-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for SUB(immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139966 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ee2c2a4f98c4a6fa575dcdd1bcc3effd1432a7c7 |
|
16-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for STR.
More addressing mode encoding bits. Handle pre increment for STR/STRB/STRH
and STR(register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139949 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8213c96655e955a0b63b05580bc2f6a55be26083 |
|
16-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for STMIA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139938 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3443ed525a3bce98bacabb5aa8e67bee6def3b09 |
|
16-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for SMMULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| db7e2e59dde94cfab4246ae694dd13295940fd62 |
|
16-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Kill some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fb9cffea4a650d7f60d2c24741656c52c2185945 |
|
16-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 837fc5e9d5138ed48a74a672dc4c1525e5975ce8 |
|
16-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for SMLAL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8adf62034a874adacff158e8adc9438cb3e67c01 |
|
15-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 64944f48a1164c02c15ca423a53919682a89074c |
|
14-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| bf841cf3360558d2939c9f1a244a7a7296f846df |
|
14-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for MSR/MRS.
Fix a bug in handling default flags for both ARM and Thumb encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c2d3164ab467bdfa8508b93177e69b99626cd8e2 |
|
14-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing for MOV in IT block.
Select the right 16 vs. 32 bit encoding in an IT block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d0588e2a2ed1f7570f13b78c2042855dc4afae10 |
|
14-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM fix assembly parser handling of ranges in register lists.
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.
rdar://8883573
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139707 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d300b94e51cf8c91928a66478c387c1c3d76faab |
|
14-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Remove unnecessary scope resolution operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d7a2b3bea8e8e4965cd7654f3a7537aba6ad7870 |
|
13-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
There's only 16 regs legal in a register list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139637 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b6b7f515e2b90c9f9b6cdd5b9648121f6ad2b3a1 |
|
13-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2d539691a1e4b9d61853aa99d1a5580dc88595db |
|
13-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139559 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1ad60c2adc9ed765a968747d0c548cda53bfd384 |
|
10-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 parsing and encoding for MOV(immediate).
Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 51f6a7abf27fc92c3d8904c2334feab8b498e8e9 |
|
09-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 468709e43dfff52f48af9ff411d461e22b6e2015 |
|
09-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for MLA and MLS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b6aed508e310e31dcb080e761ca856127cec0773 |
|
09-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a77295db19527503d6b290e4f34f273d0a789365 |
|
09-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for LDRD(immediate).
Refactor operand handling for STRD as well. Tests for that forthcoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139322 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| eeec025cf5a2236ee9527a3312496a6ea42100c6 |
|
08-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback.
Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f0eee6eca8c39b11b6a41d9b04eba8985655df77 |
|
08-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for LDRBT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139267 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ab899c1bcca7f1cc85342c3a686464ba4af035df |
|
08-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for LDR(register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a8307dd1c9279cbde1f3497e530d2ed9d014a0c5 |
|
07-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 parsing and encoding for LDR(immediate).
The immediate offset of the non-writeback i8 form (encoding T4) allows
negative offsets only. The positive offset form of the encoding is the
LDRT instruction. Immediate offsets in the range [0,255] use encoding T3
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 76ecc3d35b4d16afb016bb14e29e12802b968716 |
|
07-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 parsing and encoding for LDMIA.
Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing
as match classes are insufficient to handle the context-sensitiveness of
the writeback operand's legality for the 16-bit encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 81d2e3901eed4bd70f551df8935c9ff224ccef6f |
|
07-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Better diagnostic location information for mnemonic suffices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139232 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ad2dad930d450d721209531175b0cbfdc8402558 |
|
06-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 parsing and encoding for CLREX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139172 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 98447daa9559d5bf7816f084581b5ca073d316f6 |
|
06-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM .code directive should always go to the streamer.
Even if there's no mode switch performed, the .code directive should still
be sent to the output streamer. Otherwise, for example, an output asm stream
is not equivalent to the input stream which generated it (a dependency on
the input target triple arm vs. thumb is introduced which was not originally
there).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a110988b391652e3f4f85cb709a3eeb81c8cdd84 |
|
03-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 parsing and encoding of B instruction.
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2f25d9b9334662e846460e98a8fe2dae4f233068 |
|
01-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7f17b5a483ea358f2b9e3958f16cf34d75d5b4da |
|
01-Sep-2011 |
Owen Anderson <resistor@mac.com> |
t2Bcc is allowed to have a predicate without a preceding IT instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138946 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 20ed2e7939d6a8e804a51897c3af4588deb48be2 |
|
01-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for ADD(immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c075510e43f768e79f0d66374f4d60529c4d3d85 |
|
31-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 t2Bcc should encode as t2B when condition is 'always'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b80ab8e369d13673c7fec81f07d1c9718c6eec7b |
|
31-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Remove FIXME. Thumb2 MOV instruction will use separate custom tricks.
When we want encoding T3 (the wide encoding), we can explicitly check for
that and twiddle the CanAcceptCarrySet accordingly. For now, just correctly
handle encodings T1 and T2 when in Thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c9a9b442853ee086492d6ad1384a2de2fea9b43b |
|
31-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
tBcc is OK to be predicated in Thumb2 outside of IT blocks (obviously).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138873 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0f3abd8d68cfb4a0705d0a8140d7f7dce32f6e77 |
|
31-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Tweak Thumb1 ADD encoding selection a bit.
When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138862 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f8e1e3e729473b8b2b7ee6134b6417976af84d05 |
|
30-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 parsing and encoding for IT blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0da10cf44d0f22111dae728bb535ade2283d976b |
|
29-Aug-2011 |
Owen Anderson <resistor@mac.com> |
Improve handling of #-0 offsets for many more pre-indexed addressing modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 63553c77cd1cf3b204d955fb65350db087aaff1d |
|
29-Aug-2011 |
Owen Anderson <resistor@mac.com> |
Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4af54a461fad6c98df72dd18e607bfb32bfc486f |
|
27-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing tweak for pldw.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 89df996ab20609676ecc8823f58414d598b09b46 |
|
26-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembler parsing and encoding of IT instruction.
This handles only the handling of the IT instruction itself, not the
processing and validation of the instructions in the IT block. That's next,
and will include encoding tests for IT itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9ab0f25fc194b4315db1b87d38d4024054120bf6 |
|
26-Aug-2011 |
Owen Anderson <resistor@mac.com> |
invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138653 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0c49ac05cd2374a99a3126ebe6c8370490a73ca5 |
|
25-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Explicitly disallow predication in Thumb1 assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138562 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4d23e99d2a272a4de06ee31eee6d8e501809a573 |
|
25-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb .n mnemonic qualifiers can be ignored for now.
We'll need to pay attention to them when we start getting more serious about
the details of parsing thumb2 assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138500 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f69c80403620ef38674e037ae2664f1bbe5a4f3c |
|
24-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb parsing and encoding for SUB (SP minu immediate).
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 72f39f8436848885176943b0ba985a7171145423 |
|
24-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb parsing and encoding support for ADD SP instructions.
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f95aaf951b628621c9c74bed6c450b8a52a1ae1e |
|
24-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Add missing explicit writeback operand to tSTMIA_UPD.
rdar://10014745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138457 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 |
|
24-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7801136b95d1fbe515b9655b73ada39b05a33559 |
|
23-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Some refactoring so TargetRegistry.h no longer has to include any files
from MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1e84f19337d44c04e74af4fb005550b525ef60e5 |
|
23-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb parsing and encoding for STM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| aa875f8c6fdf3a7a26ccc381cf8ecd2b69678dad |
|
23-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Factor low reg checking into a helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 04d55f1905748b0d66655e2332e1a232a3f665f4 |
|
23-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb parsing and encoding for SBC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138311 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 934755ac040c516eac7fdd974e87590543acd16a |
|
23-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb parsing and encoding for RSB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6dcafc0d0b33bebcac28539257a9a5b250542f6a |
|
23-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Improve error checking for tPUSH and tPOP register lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7260c6a4ea19f5eb94068296c1c8e01a99f17a01 |
|
23-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assemmbly parsing diagnostic improvements for LDM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138287 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 11e03e7c2d0c163e54b911ad1e665616dc0bcc8c |
|
22-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Tighten up ARM reglist validation a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138258 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0780b6303b99441fef04340b7a083006484f4743 |
|
20-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb parsing and encoding support for NOP.
The irony is not lost that this is not a completely trivial patchset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138143 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2c3f70e5d4b4f179f21ed1b2ba14674f9d65c9b0 |
|
20-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for NEG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7a010694209ce46c4f415c0b42c3bc03dc094a5c |
|
20-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Be more lenient on tied operand matching for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 88ae2bc6d53bbf58422ff74729da18a53e155b4a |
|
20-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138108 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4ec6e888ec6d12b5255afd685b05c8fee1f7fc73 |
|
19-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for MOV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138076 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1b7b68f08776dc9553399dc3b4e7ab54e5e596c0 |
|
19-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for LSL(immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 38466309d5c8ce408f05567fa47aeaa3b5826080 |
|
19-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for LDRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138060 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 48ff5ffe9e2a90f853ce3645b1b97ea7885eccf1 |
|
19-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for LDRB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ecd858968384be029574d845eb098d357049e02e |
|
19-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for LDR(immediate) form T2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138050 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2f7232efd5fdc72aaa5a446e11a868eea666a6bf |
|
19-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Use helper function to check for low registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138048 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 60f91a3d9518617e29da18477ae433b8f0069304 |
|
19-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for LDR(immediate) form T1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 93b3eff62322803a520e183fdc294bffd6d99bfa |
|
18-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for LDM instruction.
Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3ce23d3d87d1ca437acb65ac01fac1c486507280 |
|
18-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Add missing 'break'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137941 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 395b453bed53a60c559b679eb92f75d0b140b307 |
|
18-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for B.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 00f5d982057574cf65a4a3f29548ff9fb0ecfbd0 |
|
18-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for ASR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 70939ee1415722d7f39f13faf9b3644b96007996 |
|
17-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM clean up the imm_sr operand class representation.
Represent the operand value as it will be encoded in the instruction. This
allows removing the specialized encoder and decoder methods entirely. Add
an assembler match class while we're at it to lay groundwork for parsing the
thumb shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 89e2aa6afd408f1b4c6b47c53bbf31d48463bcab |
|
17-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb ADD(immediate) parsing support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 194bd8982936c819a4b14335a4d08f28af8f3d42 |
|
17-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb parsing diagnostics for low-reg requirements on ADD and MOV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 00c9a518886c4f2d1cd869c174c994c20a353906 |
|
16-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Add missing exit for 'case'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3912b73c74dc9c928228504e9a23c577b57c4e12 |
|
16-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb assembly parsing and encoding for ADD(register) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d54b4e612aa5d2d76a62f4409f82bd409f9af297 |
|
16-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Move some logic into a helper function and expand the commentary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 47a0d52b69056250a1edaca8b28f705993094542 |
|
16-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM thumb assembly parsing for arithmetic flag setting instructions.
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 19cb7f491fbc7cb5d0bbd10e201f9d5093e6d4e5 |
|
16-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
MCTargetAsmParser target match predicate support.
Allow a target assembly parser to do context sensitive constraint checking
on a potential instruction match. This will be used, for example, to handle
Thumb2 IT block parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137675 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 857e1a7b3fcc848a6508f9205f22e8e0d293dcae |
|
12-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM vector compare to zero instruction assembly parsing support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137389 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| dd32ba337aab88c215108ca8bf4a0267fce1e773 |
|
12-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM load shifted register pre-index fix shift value asm parser encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7b8f46cf9e31d730acc25be771462e2a6a1a1dfb |
|
11-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM STRH assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 14605d1a679d55ff25875656e100ff455194ee17 |
|
11-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM STRD assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 548340c4bfa596b602f286dfd3a8782817859d95 |
|
11-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM STR(immediate) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f6713916fb4504aab617f0e317689acd878cc37f |
|
11-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM push of a single register encodes as pre-indexed STR.
Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f8fce711e8b756adca63044f7d122648c960ab96 |
|
11-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM pop of a single register encodes as post-indexed LDR.
Per the ARM ARM, a 'pop' of a single register encodes as an LDR,
not an LDM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137316 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 623a454b0f5c300e69a19984d7855a1e976c3d09 |
|
11-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM LDRH(immediate) assembly parsing and encoding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137260 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 251bf25e7ee9702fed2a66deeb404ce473f7bac1 |
|
10-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM LDRD(register) assembly parsing and encoding.
Add support for literal encoding of #-0 along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 53642c533564c41d9a85ad28efe19b12fc2305ce |
|
10-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix typo. Not quite sure how that slipped in there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137245 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2fd2b87ded53f6b87eb240c17d62a23fb4964ba0 |
|
10-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM LDRD(immediate) assembly parsing and encoding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137244 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 09176e10dbe575b0f4c68803695c47ccb4b81f81 |
|
08-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM load/store label parsing.
Allow labels for load/store instructions when parsing. There's encoding
issues, still, so this doesn't work all the way through, yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137064 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0d6fac36eda6b65f0e396b24c5bce582f89f7992 |
|
06-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM load instruction shifted register index operands.
Parsing and encoding for shifted index operands for load instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f4fa3d6e463e88743983ccfa027a7555a8720917 |
|
05-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM indexed load assembly parsing and encoding.
More parsing support for indexed loads. Fix pre-indexed with writeback
parsing for register offsets and handle basic post-indexed offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136982 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 16578b50889329eb62774148091ba0f38b681a09 |
|
05-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM simplify the postidx_reg operand encoding.
The immediate portion of the operand is just a boolean (the 'U' bit indicating
add vs. subtract). Treat it as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 039c2e19c4237fb484315a62e95222ac28640bb7 |
|
05-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for LDR instructions.
Enhance support for LDR instruction assembly parsing for post-indexed
addressing with immediate values. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136940 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7ce057983ea7b8ad42d5cca1bb5d3f6941662269 |
|
04-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM refactoring assembly parsing of memory address operands.
Memory operand parsing is a bit haphazzard at the moment, in no small part
due to the even more haphazzard representations of memory operands in the .td
files. Start cleaning that all up, at least a bit.
The addressing modes in the .td files will be being simplified to not be
so monolithic, especially with regards to immediate vs. register offsets
and post-indexed addressing. addrmode3 is on its way with this patch, for
example.
This patch is foundational to enable going back to smaller incremental patches
for the individual memory referencing instructions themselves. It does just
enough to get the basics in place and handle the "make check" regression tests
we already have.
Follow-up work will be fleshing out the details and adding more robust test
cases for the individual instructions, starting with ARM mode and moving from
there into Thumb and Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e1cf5902ec832cecdd5a94b9701930253d410741 |
|
29-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM SRS instruction parsing, diassembly and encoding support.
Fix the instruction encoding for operands. Refactor mode to use explicit
instruction definitions per FIXME to be more consistent with loads/stores.
Fix disassembler accordingly. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136509 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2c6363a62df95b74468d9a561bbcb9edddeb3507 |
|
29-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for RFE instruction.
Fill in the missing fixed bits and the register operand bits of the instruction
encoding. Refactor the definition to make the mode explicit, which is
consistent with how loads and stores are normally represented and makes
parsing much easier. Add parsing aliases for pseudo-instruction variants.
Update the disassembler for the new representations. Add tests for parsing and
encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 48c693ff564c422153733424ab845106161430ac |
|
29-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
PLD and PLI are not predicable in ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136427 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| cf121c35c484ee17210fde1cecbd896348cd654a |
|
28-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for BLX (immediate).
Add parsing support for BLX (immediate). Since the register operand version is
predicated and the label operand version is not, we have to use some special
handling to get the operand list right for matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 293a2ee3063953bb6f5bc828831f985f054782a3 |
|
28-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for BFC and BFI.
Add parsing support that handles converting the lsb+width source into the
odd way we represent the instruction (an inverted bitfield mask).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| aa3402e2800e85107a8f803be2942633b1c8c384 |
|
28-Jul-2011 |
Owen Anderson <resistor@mac.com> |
Revert r136295. It broke nightly testers because some parts of codegen weren't aware of the changes to operand ordering. I hope to revive this sometime in the future, but it's not strictly necessary for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136362 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7b2958392c2be221ff1f0d2ffd45d453dec515dd |
|
28-Jul-2011 |
Owen Anderson <resistor@mac.com> |
Refactor and improve the encodings/decodings for addrmode3 loads, and make the writeback operand always the first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5de728cfe1a922ac9b13546dca94526b2fa693b6 |
|
28-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.
rdar://8204588
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136292 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 49f2ceddd25c75373f8a39fa25e8b9db33bcdacc |
|
28-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for UMULL.
Fix parsing of the 's' suffix for the mnemonic. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136277 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 71725a099e6d0cba24a63f9c9063f6efee3bf76e |
|
27-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for UMLAL.
Fix parsing of the 's' suffix for the mnemonic. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fb8989e64024547e4ad5ab6fe4d94fe146a7899f |
|
27-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing and encoding of SBFX and UBFX.
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7e1547ebf726a40e7ed3dbe89a77e1b946a8e2d0 |
|
27-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for extend instructions.
Assembly parser handling for extend instruction rotate operands. Add tests
for the sign extend instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136252 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| bd27f5adbd8f3b8ab8def5aa43fbc406ac9b8cbe |
|
27-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Support .code32 and .code64 in X86 assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136197 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0d87ec21d79c8622733b8367aa41067169602480 |
|
26-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix over-zealous rename from r136095.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136132 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 189610f9466686a91fb7d847b572e1645c785323 |
|
26-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM diagnostics for ldrexd/stredx out of order paired register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1355cf1f76abe9699cd1c2838da132ff8b25b76b |
|
26-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Clean up the ARM asm parser a bit.
No intendeded functional change. Just cleaning up a bit to make things more
self-consistent in layout and style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ed8384806e56952c44f8a717c1ef54a8468d2c8d |
|
26-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing and encoding for SVC instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136090 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 94b9550a32d189704a8eae55505edf62662c0534 |
|
26-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f49433523e8a39db6d83503e312ae55160eed90a |
|
26-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for SSAT16 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 580f4a9c1c2fcbb8877463f873c6e9ca2a5ccf9f |
|
26-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for SSAT instruction.
Fix the Rn register encoding for both SSAT and USAT. Update the parsing of the
shift operand to correctly handle the allowed shift types and immediate ranges
and issue meaningful diagnostics when an illegal value or shift type is
specified. Add aliases to parse an ommitted shift operand (default value of
'lsl #0').
Add tests for diagnostics and proper encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 275944afb55086d0b4b20d4d831de7c1c7507925 |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix more MC layering violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135979 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| af6981f2f59f0d825ad973e0bed8fff5d302196f |
|
25-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM asm operand renaming. Make things a bit more explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135959 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 43904299b05bdf579415749041f77c4490fe5f5b |
|
25-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Make assembly parser method names more consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135950 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a7cfc08ebe737062917b442830eb5321b0f79e89 |
|
23-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where they belong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4a5ffb399f841783c201c599b88d576757f1922e |
|
23-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM SSAT instruction 5-bit immediate handling.
The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135823 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| bf2845c0d8a77d24e9971871badeba8cee7b2648 |
|
23-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding updates.
Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135817 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b544f68b70475f06a8ec39c874297549edc0f695 |
|
22-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding of SMLAL instruction.
Fix parsing of carry-setting variant SMLALS and add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135797 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c27d4f9ea0cb9064d3e2cadb384d73e95e9de449 |
|
22-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for SETEND instruction.
Add parsing and diagnostics for malformed inputs. Tests for diagnostics and
for correct encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135776 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 152d4a4bb6b75de740b4b8a9f48abb9069d50c17 |
|
22-Jul-2011 |
Owen Anderson <resistor@mac.com> |
Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn necessitates a lot of changes to related bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135722 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7c6e42e9273168ba9b1273a1580d569e1bac0e91 |
|
22-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM Asm parser range checking for [0,31] immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135719 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 43d3b31cda187c5fab6fca53eb60739e03a20481 |
|
21-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 92a202213bb4c20301abf6ab64e46df3695e60bf |
|
21-Jul-2011 |
Owen Anderson <resistor@mac.com> |
Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135693 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f6c0525d421cb48119423a96e23289b473eddbd7 |
|
21-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for PKHBT and PKHTB instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135682 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ee04a6d3a40c3017124e3fd89a0db473a2824498 |
|
21-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ab40f4b737b0a87c4048a9ad2f0c02be735e3770 |
|
20-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing of MUL instruction.
Correctly handle 's' bit and predication suffices. Add parsing and encoding
tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135596 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b29b4dd988c50d5c4a15cd196e7910bf46f30b83 |
|
20-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Tweak ARM assembly parsing and printing of MSR instruction.
The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135532 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5f16057d1e4b711d492091bc555693a03d4a1b6e |
|
19-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing for MOV (register).
Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 558b66d3cd536cfba11e295816a15ea6476fcd16 |
|
19-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135507 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 731f2097944bfdf5b58ff1f19560a25ed15c9b2b |
|
19-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Tighten conditional for 'mov' cc_out.
Make sure we only clobber the cc_out operand if it is indeed a default
non-setting operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135506 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ffa3225e26cc1977d20f0d9649fcd6f38a3c4815 |
|
19-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing for MOV (immediate).
Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135500 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5a18700470f0831b9b2af78862672561dd980345 |
|
19-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Remove unused code.
cc_out and pred operands are added during parsing via custom C++ now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6bc1dbc37695bcfc5ae23a1a9e17550ee50fe02f |
|
19-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM range checking for so_imm operands in assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135489 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 33c16a27370939de39679245c3dff72383c210bd |
|
15-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM diagnostic when 's' suffix on mnemonic that can't set flags.
For example, "mlss r0, r1, r2, r3".
The MLS instruction does not have a flag-setting variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135203 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c60f9b752381baa6c4b80c0739034660f1748c84 |
|
14-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| eac0796542d098caa371856d545faa6cdab5aad3 |
|
14-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Don't leak operands when putting them into a shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 032434d622b6cd030a60bb9045a520c93b0d7d68 |
|
14-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM Assembler support for DMB instruction.
Flesh out the options supported for the instruction. Shuffle tests a bit and
add entries for the rest of the options. Add an alias to handle the default
operand of "sy".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135109 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 83ab070fc1fbb02ca77b0a37e6ae0eacf58001e1 |
|
14-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Range checking for CDP[2] immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fff76ee7ef007b2bb74804f165fee475e30ead0d |
|
13-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Range checking for 16-bit immediates in ARM assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135071 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 19906729a490744ce3071d20e3d514cadc12e6c5 |
|
13-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Improve ARM assembly parsing diagnostics a bit.
Catch potential cascading errors on a malformed so_reg operand and bail after
the first error.
Add some tests for the diagnostics we do want.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135055 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e8606dc7c878d4562da5e3e5609b9d7d734d498c |
|
13-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Flesh out ARM Parser support for shifted-register operands.
Now works for parsing register shifted register and register shifted
immediate arithmetic instructions, including the 'rrx' rotate with extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b7f689bab98777236a2bf600f299d232d246bb61 |
|
13-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Update MCParsedAsmOperand debug methods.
Update the debug output interface for MCParsedAsmOperand to have a print()
method which takes an output stream argument, an << operator which invokes
the print method using the given stream, and a dump() method which prints
the operand to the dbgs() stream. This makes the interface more consistent
with the rest of LLVM, and more convenient to use at the debugger command
line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3f00e317064560ad11168d22030416d853829f6e |
|
11-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix recognition of ARM 'adcs' mnemonic.
The 'CS' is not a predication suffix in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ffc0e73046f737d75e0a62b3a83ef19bcef111e3 |
|
09-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Change createAsmParser to take a MCSubtargetInfo instead of triple,
CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| eb0caa115491019f7f7fe45fc70ad47682244187 |
|
09-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 32869205052430f45d598fba25ab878d8b29da2d |
|
09-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add support for ARM / Thumb mode switching with .code 16 and .code 32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134760 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 75ca4b94bd9dcd3952fdc237429342a2154ba142 |
|
08-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Plug a leak by giving the AsmParser ownership of the MCSubtargetInfo.
Found by valgrind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134738 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 480cee5d4396a380ada6ffd03551b5700d041fe0 |
|
08-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
TargetAsmParser doesn't need reference to Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ebdeeab812beec0385b445f3d4c41a114e0d972f |
|
08-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
to generate asm matcher subtarget feature queries. e.g.
"ModeThumb,FeatureThumb2" is translated to
"(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 63b46faeb8acae9b7e5f865b7417dc00b9b9dad3 |
|
01-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb1 register to register MOV instruction is predicable.
Fix a FIXME and allow predication (in Thumb2) for the T1 register to
register MOV instructions. This allows some better codegen with
if-conversion (as seen in the test updates), plus it lays the groundwork
for pseudo-izing the tMOVCC instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6b8f1e35eacba34a11e2a7d5f614efc47b43d2e3 |
|
28-Jun-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM Assembly support for Thumb mov-immediate.
Correctly parse the forms of the Thumb mov-immediate instruction:
1. 8-bit immediate 0-255.
2. 12-bit shifted-immediate.
The 16-bit immediate "movw" form is also legal with just a "mov" mnemonic,
but is not yet supported. More parser logic necessary there due to fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133966 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| df8fe9901df829a02d1257121f35a78a434aca0d |
|
27-Jun-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM Asm parsing of Thumb2 move immediate.
Thumb2 MOV mnemonic can accept both cc_out and predication. We don't (yet)
encode the instruction properly, but this gets the parsing part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d1f0bbee189ea7cd18d03c4f9f55d0a33b070814 |
|
27-Jun-2011 |
Jim Grosbach <grosbach@apple.com> |
Add exception necessitated by 133938.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 660a9ec4aa08b42a1379e5caa3935d301b1e27b7 |
|
27-Jun-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly carry set/clear condition code aliases for 'hi/lo'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133938 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| be64b394317feb8d7bcb732bdfb35e0b286efd4c |
|
28-May-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
ARM asm parser wasn't able to parse a "mov" instruction while in Thumb
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 56926a39619bd644c83c4128f0b55189e52707d7 |
|
25-May-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Fix PR9762
Enable the parsing of the operand "cpsr_all" for the ARM msr instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6469540adf63d94a876c2b623cb4ca70479647f7 |
|
16-May-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
sets bit 0 of the function address of thumb function in .symtab
("T is 1 if the target symbol S has type STT_FUNC and the
symbol addresses a Thumb instruction ;it is 0 otherwise."
from "ELF for the ARM Architecture" 4.7.1.2)
Patch by Koan-Sin Tan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f6d9109124fa9ee5533dcc5a1c9f2af694890706 |
|
18-Apr-2011 |
Sean Callanan <scallanan@apple.com> |
Small fix to the ARM AsmParser to ensure that a
superclass variable is instantiated properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ac79e4c82f201c30a06c2cd05baebd20f5b49888 |
|
04-Apr-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
- Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHT
also fix the encoding of the later.
- Add a new encoding bit to describe the index mode used in AM3.
- Teach printAddrMode3Operand to check by the addressing mode which
index mode to print.
- Testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e3662cca5d204a3e0bceaead1b35361117630fab |
|
01-Apr-2011 |
Matt Beaumont-Gay <matthewbg@google.com> |
Remove unused variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ae0855401b8c80f96904b6808b0bc4c89216aecd |
|
01-Apr-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Apply again changes to support ARM memory asm parsing. I removed
all LDR/STR changes and left them to a future patch. Passing all
checks now.
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
fix the encoding wherever is possible.
- Add a new encoding bit to describe the index mode used and teach
printAddrMode2Operand to check by the addressing mode which index
mode to print.
- Testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128689 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b41aaab5a1769f4df04d566da37866ac91b6ee9e |
|
31-Mar-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Revert r128632 again, until I figure out what break the tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| bcd3a9cd84d3bb143075d31bdf631f621f44f9e7 |
|
31-Mar-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Reapply r128585 without generating a lib depedency cycle. An updated log:
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
{STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible.
- Move all instructions which use am2offset without a pattern to use
addrmode2.
- Add a new encoding bit to describe the index mode used and teach
printAddrMode2Operand to check by the addressing mode which index
mode to print.
- Testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e4345c9977e65b14fa4b93d19c7e67a7b15f7f40 |
|
31-Mar-2011 |
Matt Beaumont-Gay <matthewbg@google.com> |
Revert "- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and"
This revision introduced a dependency cycle, as nlewycky mentioned by email.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 40829ed6f5e449fa33a9cd7022ce6c3941dace3d |
|
31-Mar-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
{STR,LDC}{2}_PRE.
- Fixed the encoding in some places.
- Some of those instructions were using am2offset and now use addrmode2.
Codegen isn't affected, instructions which use SelectAddrMode2Offset were not
touched.
- Teach printAddrMode2Operand to check by the addressing mode which index
mode to print.
- This is a work in progress, more work to come. The idea is to change places
which use am2offset to use addrmode2 instead, as to unify assembly parser.
- Add testcases for assembly parser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1866af4a982be999e4d0c08c38ebec71f3ed4025 |
|
24-Mar-2011 |
Matt Beaumont-Gay <matthewbg@google.com> |
Suppress an unused variable warning in -asserts builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128244 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 505f3cd2965e65b6b7ad023eaba0e3dc89b67409 |
|
24-Mar-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add asm parsing support w/ testcases for strex/ldrex family of instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128236 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0082830cb26248178fe5cc9bbdbd00881556c33d |
|
18-Mar-2011 |
Owen Anderson <resistor@mac.com> |
Add support to the ARM asm parser for the register-shifted-register forms of basic instructions like ADD. More work left to be done to support other instances of shifter ops in the ISA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4b19c9865ee94367d7b3594c36e59e4c15ba82cc |
|
19-Feb-2011 |
Joerg Sonnenberger <joerg@bec.de> |
Avoid dangling else warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126004 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8bba1a5ef0f8a71de2e58c7f05b8714a73464ca8 |
|
18-Feb-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Fix style and a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125949 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 584bf7bb03e4cf1475b26851edcc1ddb66b85028 |
|
18-Feb-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add assembly parsing support for "msr" and also fix its encoding. Also add
testcases for the disassembler to make sure it still works for "msr".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125948 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e98d646b1194c522b121e1a70906efe4ea578fc8 |
|
14-Feb-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
A fail to match coprocessor number and register number must fail instead of assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125521 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a2b6e4151b75248f9dbf8067186cba673520f8f4 |
|
14-Feb-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Fix encoding and add parsing support for the arm/thumb CPS instruction:
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125489 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f922c47143d247cbae14b294a0bada139bcd35f6 |
|
12-Feb-2011 |
Jim Grosbach <grosbach@apple.com> |
AsmMatcher custom operand parser failure enhancements.
Teach the AsmMatcher handling to distinguish between an error custom-parsing
an operand and a failure to match. The former should propogate the error
upwards, while the latter should continue attempting to parse with
alternative matchers.
Update the ARM asm parser accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 706d946cfe44fa93f482c3a56ed42d52ca81b257 |
|
07-Feb-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add support for parsing dmb/dsb instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125055 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fafde7f0b7c70e08de719d9e33ce9f6fdaefc984 |
|
07-Feb-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Remove the MCR asm parser hack and start using the custom target specific asm
parsing of operands introduced in r125030. As a small note, besides using a more
generic approach we can also have more descriptive output when debugging
llvm-mc, example:
mcr p7, #1, r5, c1, c1, #4
note: parsed instruction:
['mcr', <ARMCC::al>,
<coprocessor number: 7>,
1,
<register 73>,
<coprocessor register: 1>,
<coprocessor register: 1>,
4]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b412915ff6229b3e2dffedcfb0f3fb7e85259841 |
|
04-Feb-2011 |
Daniel Dunbar <daniel@zuster.org> |
MC/AsmParser: Add support for allowing the conversion process to fail (via
custom conversion functions).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124872 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 69df72367f45c0414541196efaf7c13b1ccd3f08 |
|
03-Feb-2011 |
Bob Wilson <bob.wilson@apple.com> |
Fix 80-column violations and whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124819 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9e56fb12c504c82c92947fe9c46287fc60116b91 |
|
28-Jan-2011 |
Kevin Enderby <enderby@apple.com> |
Changed llvm-mc arm target to give an error if .syntax divided is used. Since
only .syntax unified is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124454 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| bf7553210ae44f05e7460edeae1ee499d8a22dcb |
|
27-Jan-2011 |
Roman Divacky <rdivacky@freebsd.org> |
Introduce virtual ParseRegister method in TargetAsmParser.
Create override of this method in X86/ARM/MBlaze.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e47f3751d7770916f250a00a84316d412e959c00 |
|
20-Jan-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Fix the encoding and parsing of clrex instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8dd37f7b7dca7907f9f070dc96359f242e102163 |
|
20-Jan-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add cdp/cdp2 instructions for thumb/thumb2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123929 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b32f7a5f4bc678c052db40cbb4ac8617c134aa24 |
|
20-Jan-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
- Use a more appropriate name for Owen's ARM Parser isMCR hack since the same operands can be present
in cdp/cdp2 instructions. Also increase the hack with cdp/cdp2 instructions.
- Fix the encoding of cdp/cdp2 instructions for ARM (no thumb and thumb2 yet) and add testcases for t
hem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fa5bd27fbe5188ca708ac0dda4f32d90505da9f5 |
|
20-Jan-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add mcr* and mr*c support to thumb targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 892fc6d7b64364b230261daa967518a71748c01b |
|
18-Jan-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Fix the encoding of t2ISB by using the right class and also parse it correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123776 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fdcee77887372dbf6589d47cc33094965b679f24 |
|
18-Jan-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Follow the current hack set and enable the correct parsing of bkpt while in thumb mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123772 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4b462672d2b4950e5f059bd093db524aa10e8377 |
|
18-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Use accessors where appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6ec56204f372df73e4a27085b188a72548b867ac |
|
18-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Fill in ASMOperand::dump() for memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2637dc9a252f25fd1c63acfe0606860ee7c8cfdf |
|
18-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Make ARMOperand use a union where appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123744 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 05d8b71424316ad7b014adbbb316f78c5bd46861 |
|
18-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Unify ParseMemory() successfull return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0571093f4cf0414724674448fe6b973c0fa705b3 |
|
18-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Early exit on failure (NEFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d3df5f32c059b3ac111f1c08571d5493aa1d48c6 |
|
18-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Always keep an offset expression, if used (instead of assuming == 0 if used but not present), and simplify logic.
Also, clean up various non-sensicalisms in isMemModeRegThumb() and isMemModeImmThumb().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123738 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 023835d51b6dd6e3a253deefa595b0d916b605ac |
|
18-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Add a variety of asserts on the sanity of memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123737 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 81f453c4b91b8c681d82d63257a271107626648e |
|
18-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Use a consistent marker for not-set OffsetRegNum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123736 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0c9f250d54ed59108fffe5ce2f7df7bc8448915c |
|
13-Jan-2011 |
Owen Anderson <resistor@mac.com> |
Recognize alternative register names like ip -> r12.
Fixes <rdar://problem/8857982>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123409 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e4e5e2aae7e1e0e84877061432e7b981a360a77d |
|
13-Jan-2011 |
Owen Anderson <resistor@mac.com> |
Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting
the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.
With this, we can properly pretty-print and encode assembly like:
mrc p15, #0, r3, c13, c0, #3
Fixes <rdar://problem/8857858>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123404 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 67b212e03b77e921e2b9780059681125a45d15a7 |
|
13-Jan-2011 |
Kevin Enderby <enderby@apple.com> |
Fix ARMAsmParser::ParseOperand() to allow it to parse . as a branch target and
directional local labels like 1f and 2b.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123393 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7597212abced110723f2fee985a7d60557c092ec |
|
13-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step
in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fef9ff492206330ff0a5b94cec5ac1455b28df88 |
|
13-Jan-2011 |
Kevin Enderby <enderby@apple.com> |
Add a FIXME and two asserts for now in the ARMAsmParser when it sees .code 16 or
.code 32 if the TargetMachine's isThumb() boolean does not match. The correct
fix is to switch ARM subtargets at that point and is tracked by rdar://8856789
which is bigger task.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8a8696db6b6f6e735bb9de630876af83946b45f9 |
|
13-Jan-2011 |
Jason W Kim <jason.w.kim.2009@gmail.com> |
Change call to Error() to assert()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123350 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7caebff83d90a59aa74876ff887e822387f479e0 |
|
12-Jan-2011 |
Bill Wendling <isanbard@gmail.com> |
Sort the register list based on the *actual* register numbers rather than the
enum values we give to them. <rdar://problem/8823730>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123321 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9081b4b4cf89a161246e037f4817c69de2fcdf82 |
|
12-Jan-2011 |
Jason W Kim <jason.w.kim.2009@gmail.com> |
Workaround for bug 8721.
.s Test added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123292 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b72d2a92b75daa9cbac7338aff0cd8ae04c2b4bd |
|
11-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Clean up ARM subtarget code by using Triple ADT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| eb9f3f91c03c29f020ee3c25cfefe7ae2b496526 |
|
11-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Fill in GetMnemonicAcceptInfo().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123253 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3771dd041f6a68bef08b6f685a41d1d54f4e8b9d |
|
11-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Sketch some logic for determining when to add carry set and predication code operands based on the "canonical mnemonic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123239 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 352e148cbe6498a6dd31b7fc71df7cd23c4b4d10 |
|
11-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Add more hard coded logic to SplitMnemonicAndCC to also split out the
carry setting flag from the mnemonic.
Note that this currently involves me disabling a number of working cases in
arm_instructions.s, this is a hopefully short term evil which will be rapidly
fixed (and greatly surpassed), assuming my current approach flies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123238 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8ab1112bdc30b8675bb12431d8b5b270da42f1b5 |
|
10-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
McARM: Flush out hard coded known non-predicated mnemonic list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123189 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6a5c22ed89c8bb73034a70105340acf6539dc58b |
|
10-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
MC/ARM/AsmParser: Minor nitty fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123175 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| badbd2fde9b8debd6265e8ece511fb01123d1d5f |
|
10-Jan-2011 |
Daniel Dunbar <daniel@zuster.org> |
MC/ARM/AsmParser: Split out SplitMnemonicAndCC().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f4caf69720d807573c50d41aa06bcec1c99bdbbd |
|
14-Dec-2010 |
Bill Wendling <isanbard@gmail.com> |
The tLDR et al instructions were emitting either a reg/reg or reg/imm
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.
The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.
There are some obvious cleanups here, which will happen shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 44a9e8f869dd9d04a04eb556ff0ff4a1039d371f |
|
10-Dec-2010 |
Kevin Enderby <enderby@apple.com> |
Fix the leak from r121401 of the Operands erased in the list but not deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 193c3acbe5cdb60767d114016970e898c7502d7a |
|
09-Dec-2010 |
Kevin Enderby <enderby@apple.com> |
Add support for parsing ARM arithmetic instructions that update or don't update
the condition codes. Where the ones that do have an 's' suffix and the ones
that don't don't have the suffix. The trick is if MatchInstructionImpl() fails
we try again after adding a CCOut operand with the correct value and removing
the 's' if present. Four simple test cases added for now, lots more to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121401 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6aa49435994c33257b7588cac24671785d17fa6e |
|
07-Dec-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add parens to pacify gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 04f74942f2994a7c1d8e62c207c4005ed4652b6a |
|
06-Dec-2010 |
Jim Grosbach <grosbach@apple.com> |
Encode the register operand of ARM CondCode operands correctly. ARM::CPSR if
the instruction is predicated, reg0 otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121020 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d67641b6f804110505a69aaed5479f446bbbb34e |
|
06-Dec-2010 |
Jim Grosbach <grosbach@apple.com> |
The ARM AsmMatcher needs to know that the CCOut operand is a register value,
not an immediate. It stores either ARM::CPSR or reg0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1fd374e9c1c074c1681336bef31e65f0170b0f7e |
|
30-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
* Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same as
t_addrmode_s4, but with a different scaling factor.
* Encode the Thumb1 load and store instructions. This involved a bit of
refactoring (hi, Chris! :-). Some of the patterns became dead afterwards and
were removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ef4a68badbde372faac9ca47efb9001def57a43d |
|
30-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost
certainly be made more generic. But it does allow us to parse something like:
ldr r3, [r2, r4]
correctly in Thumb mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120408 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 00a257af5b62df1921e3df3ee2fa4adc2ccbd297 |
|
30-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Add a few missing initializers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120350 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 03f44a04e63ff77af12df33e10ffdc473609dfe2 |
|
30-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Nuke trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9717fa9f29696bca45ddfdf206b1c382c8b40b78 |
|
21-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
The "trap" instruction is one of this which doesn't have a condition code. Hack
the code to not add a "condition code" if it's trap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119937 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| cb21d1c9fd1cf53f063183f7eb28af7fa4052ef0 |
|
19-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Use array_pod_sort because the list is contiguous.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119769 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 50d0f5894448aff6eb02ad63da55ecf26b54aeb8 |
|
19-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Add support for parsing the writeback ("!") token.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 24d22d27640e9de954a5ac26f51a45cc96bb9135 |
|
18-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Don't allocate the SmallVector of Registers. It gets messy figuring out who
should delete what when the object gets copied around. It's also making valgrind
upset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0f6307561359fac4425a0b9e512931cf96c1ec5b |
|
17-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Proper encoding for VLDM and VSTM instructions. The register lists for these
instructions have to distinguish between lists of single- and double-precision
registers in order for the ASM matcher to do a proper job. In all other
respects, a list of single- or double-precision registers are the same as a list
of GPR registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8ea974039a8811ff83ad2c45ec1037ac78e5afab |
|
10-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Emit a '!' if this is a "writeback" register or memory address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118662 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| cc8d10e1a8a8555fa63f33e36e3c1ed2fb24389d |
|
10-Nov-2010 |
Matt Beaumont-Gay <matthewbg@google.com> |
Rename a parameter to avoid confusion with a local variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8e8b18bcfa87ff919f127b1270a6891db1c9021f |
|
10-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Emit the warning about the register list not being in ascending order only once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118653 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5fa22a19750c082ff161db1702ebe96dd2a787e7 |
|
10-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
s/std::vector/SmallVector/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118648 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c3236753d6bb69d20003a7da441e9a42707ed714 |
|
09-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Delete the allocated vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7729e06c128be01fc564870d5ea3d22d236dddb5 |
|
09-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Two types of instructions have register lists:
* LDM, et al, uses a bit mask to indicate the register list.
* VLDM, et al, uses a base register plus number.
The LDM instructions may be non-contiguous, but the VLDM ones must be
contiguous. Those are semantic checks that should be done later in the
compiler. Also postpone the creation of the bit mask until it's needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 87f4f9a946549ad93046990a364ac5190333a7eb |
|
09-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
The "addRegListOperands()" function returns the start register and the total
number of registers in the list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b32e7844e9f79d2bd4ff34a1d19aba347f999abc |
|
08-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118389 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e8399c6e01f5d53ddda361a5eb5952147bb25f94 |
|
07-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
In this context, a reglist is a reg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e717610f53e0465cde198536561a3c00ce29d59f |
|
06-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Add support for parsing register lists. We can't use a bitfield to keep track of
the registers, because the register numbers may be much greater than the number
of bits available in the machine's register.
I extracted the register list verification code out of the actual parsing of the
registers. This made checking for errors much easier. It also limits the number
of warnings that would be emitted for cascading infractions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8155e5b753aca42973cf317727f3805faddcaf90 |
|
06-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Return the base register of a register list for the "getReg()" method. This is
to satisfy the ClassifyOperand method of the Asm matcher without having to add a
RegList type to every back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118360 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 146018fc6414eb2a1e67b2d8798a42a2f55ec96c |
|
06-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
General cleanup:
- Make ARMOperand a class so that some things are internal to the class.
- Reformatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8d5acb7007decaf0c30bf4a3d4c55e5cc2cce0a7 |
|
06-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Add a RegList (register list) object to ARMOperand. It will be used soon to hold
(surprise!) a list of registers. Register lists are consecutive, so we only need
to record the start register plus the number of registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118351 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 12f40e9a6305fe7553ebce19346cb55874073fc7 |
|
06-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Fix grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118341 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a60f157b7c6fb60b33598fa5143ed8cb91aa5107 |
|
06-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Fix grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118340 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d68fd9c79eeb30980c18dc3f74b2da839bb259f3 |
|
06-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
MatchRegisterName() returns 0 if it can't match the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118339 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1d6a26507bfd75758f5c8a29bccf577784ead751 |
|
06-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Use TryParseRegister() instead of MatchRegisterName(). The former returns -1
while the latter doesn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118338 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2a301704ea76535f0485d5c3b75664b323249bdb |
|
05-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Hook up the '.code {16|32}' directive to the streamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 642fc9c24ba7c43a4a962c6c05cfffce713d7de7 |
|
05-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Hook up the '.thumb_func' directive to the streamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 83c4018fcca18fe9c281c3943fc58a17621636c4 |
|
05-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Fix past-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 92b5a2eb1646b3c1173a5ff3c0073f24ed5ee6a4 |
|
03-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
The MC code couldn't handle ARM LDR instructions with negative offsets:
vldr.64 d1, [r0, #-32]
The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118144 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 469ebbe148b18a78963e8bc3fa7ae8e5700d8d27 |
|
01-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Add FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 833c93c7958dbbd9d648f331091fbfbeabf342e6 |
|
01-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Mark ARM subtarget features that are available for the assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d4462a5a4feae0293ca14376ff25d8bb72dd12a9 |
|
01-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4aaf59d8ed5e565632314a1eeb7cf5a1fe1fdbe0 |
|
30-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| dba34d874d0ac8c334f03d770b80c6ee2f12808a |
|
30-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
simplify this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117771 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e5658fa15ebb733e0786a96c1852c7cf590d5b24 |
|
30-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
split MaybeParseRegister into its two logical uses, eliminating malloc+free traffic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117769 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 52925b60f1cd4cf810524ca05b00a207a926ab9f |
|
30-Oct-2010 |
Bill Wendling <isanbard@gmail.com> |
Some instructions end with an "ls" prefix, but it doesn't indicate that they are
conditional. Check for those instructions explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3df518e67edaf358154af394cc99d21435b7b118 |
|
29-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
add FIXME
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117718 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 80eb233a3ce1a6f2e6c0847cb3e456d735e37569 |
|
29-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
Handle ARM addrmode5 instructions with an offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d8d716fad3eefce98fac5a76a70250d89fcf9a20 |
|
29-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
Revert 117660. Apparently it's not as trivial as that...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| da54c6dd4f4e54d654722390311bdab502badc3a |
|
29-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
ARM addrmode5 instructions have neither writeback nor post-indexed modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117660 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 16c7425cff6ac3d0a4a9c56779bdfa91b2e8e863 |
|
29-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117651 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 61a4d56a03c051834ee25d8248fa9f434e7e8c19 |
|
29-Oct-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
ARMAsmParser: Plug a memory leak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117648 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c223e2b10b4753a63dfe7e6980c650b179139983 |
|
29-Oct-2010 |
Eric Christopher <echristo@apple.com> |
Add an unreachable to silence warning - the switch is actually
fully enumerated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117647 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 14b93851cc7611ae6c2000f1c162592ead954420 |
|
29-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
add simple support for addrmode5 operands, allowing
vldr.64 to work. I have no idea if this is fully right, but
it is in the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e73d4f8ec7af68fc0f67811e4e004562ab538014 |
|
28-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
give better error diagnostics, for example:
t.s:1:14: error: invalid operand for instruction
vldr.64 d17, [r0]
^
instead of:
t.s:1:1: error: unrecognized instruction
vldr.64 d17, [r0]
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117611 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fa42fad8bf7b0058ba031a275e1e8ce53b2cb1ad |
|
28-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
move a method out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117605 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 550276ee5bb3e115d4d81156dceffb9d3d78823a |
|
28-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
remove the rest of hte owningptr's, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c0ddfaa134fe60c09686906b3a8f489531653453 |
|
28-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
rearrange ParseRegisterList.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3a69756e392942bc522193f38d7f33958ed3b131 |
|
28-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
refactor some code to simplify it, eliminating some owningptr's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117559 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 1cd9708f5cc13995a4e84ef498e4162a47f8b4f5 |
|
20-Oct-2010 |
Chandler Carruth <chandlerc@gmail.com> |
Remove remaining uses of ATTRIBUTE_UNUSED on variables, and delete three
#includes in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7c51a3172cf5104ebeaef22f1366fa634ca00d85 |
|
29-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
implement rdar://8456378 and PR7557 - support for the fstsw,
an instruction that requires a WHOLE NEW wonderful kind of alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115015 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7036f8be4df8a1a830ca01afe9497b035a5647d6 |
|
29-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
change the protocol TargetAsmPArser::MatchInstruction method to take an
MCStreamer to emit into instead of an MCInst to fill in. This allows the
matcher extra flexibility and is more convenient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115014 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| cbf8a98c7c652e96967623c80cb945fef001b090 |
|
11-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
fix the asmparser so that the target is responsible for skipping to
the end of the line on a parser error, allowing skipping to happen
for syntactic errors but not for semantic errors. Before we would
miss emitting a diagnostic about the second line, because we skipped
it due to the semantic error on the first line:
foo %eax
bar %al
This fixes rdar://8414033 - llvm-mc ignores lines after an invalid instruction mnemonic errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 34e53140c2cc02ce4c9d060e48302576d3962e1c |
|
08-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
change the MC "ParseInstruction" interface to make it the
implementation's job to check for and lex the EndOfStatement
marker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113347 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ce4a3355d96971e7edcbff3c1975f83e1ddcb8f2 |
|
07-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
in the case where an instruction only has one implementation
of a mneumonic, report operand errors with better location
info. For example, we now report:
t.s:6:14: error: invalid operand for instruction
cwtl $1
^
but we fail for common cases like:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
because we don't know if this is supposed to be the reg/imm or imm/reg
form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 79ed3f77e8b87615b80054ca6e4e3ba5e07445bd |
|
06-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
change MatchInstructionImpl to return an enum instead of bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113165 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 0692ee676f8cdad25ad09a868bf597af4115c9d9 |
|
06-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
have AsmMatcherEmitter.cpp produce the hunk of code that gets included
into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 14ab39e43f151d833e74534c87b670b767ff0d5d |
|
01-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
zap dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f1e29d4c21d15f9e1e3a64f3b92b1aa9908e4f63 |
|
12-Aug-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC/AsmParser: Push the burdon of emitting diagnostics about unmatched
instructions onto the target specific parser, which can do a better job.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110889 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 4f98f834593f0a107268d19a557b63f0da33a751 |
|
12-Aug-2010 |
Daniel Dunbar <daniel@zuster.org> |
tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl',
target specific parsers can adapt the TargetAsmParser to this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110888 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 345a9a6269318c96f333c0492b23733e29d952df |
|
11-Aug-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC/ARM: Add basic support for handling predication by parsing it out of the mnemonic into a separate operand form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110794 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 5747b13af801d5af7cd5827c07c6a59e981bdb1a |
|
11-Aug-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC/ARM: Split mnemonic on '.' characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110793 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| fa315de8f44ddb318a7c6ff913e80d71d7c68859 |
|
11-Aug-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC/ARM: Fill in ARMOperand::dump a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110792 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b3cb6967949493a2e1b10d015ac08b746736764e |
|
11-Aug-2010 |
Daniel Dunbar <daniel@zuster.org> |
MCAsmParser: Add dump() hook to MCParsedAsmOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 8462b30548fb5969250858036638c73c16b65b43 |
|
11-Aug-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC/ARM: Add an ARMOperand class for condition codes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3483acabf012b847b13b969ebd9ce5c4d16d9eb7 |
|
11-Aug-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC/ARM: Switch to using the generated match functions instead of stub implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d73ada7d24832bc2a4c3965b8f00ffd951341acf |
|
19-Jul-2010 |
Daniel Dunbar <daniel@zuster.org> |
Target: Give the TargetAsmParser access to the TargetMachine.
- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108664 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 38e59891ee4417a9be2f8146ce0ba3269e38ac21 |
|
15-Jul-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Don't pass StringRef by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 3472766f9eb7d66f234c390ce1b3a8b76f0ee9ce |
|
12-Jul-2010 |
Duncan Sands <baldrick@free.fr> |
Convert some tab stops into spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 58c86910b31c569a5709466c82e2fabae2014a56 |
|
29-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove unused variable Loc and pointless variables unified_syntax
and thumb_mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 90b7097f92f6b4f6b27cd88c7c88a21b777f5795 |
|
07-Apr-2010 |
Sean Callanan <scallanan@apple.com> |
Added an AsmLexer for the ARM target, which uses
a simple mapping of register names to IDs to
identify register tokens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100685 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 762647673379dbcff6bbba6167b0b1b0d658ba9d |
|
03-Apr-2010 |
Sean Callanan <scallanan@apple.com> |
Added support for reporting operand token ranges
to the ARM AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100232 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| c6ef277a0b8f43af22d86aea9d5053749cacfbbb |
|
22-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
create a new MCParser library and move some stuff into it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94129 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 18b8323de70e3461b5d035e3f9e4f6dfaf5e674b |
|
19-Jan-2010 |
Sean Callanan <scallanan@apple.com> |
Promoted the getTok() method to MCAsmParser so that
the two token accessor functions are declared consistently.
Modified the clients of MCAsmParser to reflect this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93916 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| b9a25b7744ed12b80031426978decce3d4cebbd7 |
|
19-Jan-2010 |
Sean Callanan <scallanan@apple.com> |
Propagated the parser-side Lex function's declaration to
MCAsmParser, and changed the target-specific AsmParsers
to use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93900 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| aaec205b87637cd0d59d4f11630db603686eb73d |
|
19-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Generalize mcasmstreamer data emission APIs to take an address space
identifier. There is no way to work around it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93896 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9898671a74d3fc924347e679c45edaa685b3fe6e |
|
14-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Split the TargetAsmParser "ParseInstruction" interface in half:
the new ParseInstruction method just parses and returns a list of
target operands. A new MatchInstruction interface is used to
turn the operand list into an MCInst.
This requires new/deleting all the operands, but it also gives
targets the ability to use polymorphic operands if they want to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93469 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| f007e853e26845cd6866b52d646455fc69f4e0af |
|
14-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
prune #includes in TargetAsmParser.h
Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93457 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 7659389d0d4d315d30877592221da6a6f663114a |
|
14-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
introduce MCParsedAsmOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 079b6f5ee5c3516b773a3ad71874c14e8ea7479c |
|
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add an "ATTRIBUTE_UNUSED" macro (and use it). It's for variables which are
mainly used in debugging and/or assert situations. It should make the compiler
and the static analyzer stop nagging us about them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92181 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| bd13cb911cb40ac6a82db12deaef775a9d19ff4b |
|
16-Dec-2009 |
John McCall <rjmccall@apple.com> |
Every anonymous namespace is different. Caught by clang++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91481 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 60131c0d0bb04d0ae3c13cbd055616c71d86e8ea |
|
02-Nov-2009 |
Kevin Enderby <enderby@apple.com> |
Fix ARMAsmParser::ParseMemoryOffsetReg() where the parameter OffsetRegNum should
have been passed as a reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85823 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9c41fa87eac369d84f8bfc2245084cd39f281ee4 |
|
30-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
Updates to the ARM target assembler for llvm-mc per review comments from
Daniel Dunbar.
- Reordered the fields in the ARMOperand Mem struct to make the struct smaller.
Making bool's into 1 bit fields and put the MCExpr* fields adjacent to each
other.
- Fixed a number of places in ARMAsmParser.cpp so they have doxygen comments.
- Change the name of ARMAsmParser::ParseRegister() to MaybeParseRegister and
added the bool ParseWriteBack parameter.
- Changed ARMAsmParser::ParseMemory() to call MaybeParseRegister().
- Added ARMAsmParser::ParseMemoryOffsetReg to factor out parsing the offset of a
memory operand. And use it for both parsing both preindexed and post indexing
addressing forms in ARMAsmParser::ParseMemory.
- Changed the first argument to ParseShift() to a reference.
- Changed ParseShift() to check for Rrx first and return to reduce nesting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 2685a29a8d4ced7791bb671e28f9fe51c74eb3bb |
|
20-Oct-2009 |
Daniel Dunbar <daniel@zuster.org> |
Wire up the ARM MCInst printer, for llvm-mc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| e2a98dd2a4f007d5d9d3c71460cfbe0a825b8993 |
|
15-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
Fix ARM memory operand parsing of post indexing with just a base register, that
is just "[Rn]" and no tailing comma with an offset, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84205 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 515d509360d81946247fd0f937034cdf1f237c72 |
|
15-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
More bits of the ARM target assembler for llvm-mc, code added to parse labels
as expressions, code for parsing a few arm specific directives (still needs
the MCStreamer calls for these). Some clean up of the operand parsing code
and adding some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84201 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 079469f649d8da3923b9f747d7062c84e01cc4ae |
|
14-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
Correct comment about ARM immediates using '#' not '$' and TODO for modifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84055 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| cfe072401658bbe9336b200b79526b65c5213b74 |
|
14-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
More bits of the ARM target assembler for llvm-mc to parse immediates.
Also fixed a couple of coding style things that crept in. And added more
to the temporary hacked up ARMAsmParser::MatchInstruction() method for testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 6bd266e56799703cd2773cadc4da8bc3c5107fdf |
|
13-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
Fix two warnings about unused variables that are only used in assert() calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 9d36962ab66f728291f0921b3b4851a37d303e95 |
|
13-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
Fix a problem in the code where ARMAsmParser::ParseShift() second argument
should have been a pointer to a reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83915 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| d7894f105a3c397a3d7f5c5136eee39f5865e64b |
|
09-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
Added another bit of the ARM target assembler to llvm-mc to parse register
lists. Changed ARMAsmParser::MatchRegisterName to return -1 instead of 0 on
errors so 0-15 values could be returned as register numbers. Also added the
rest of the arm register names to the currently hacked up version to allow more
testing. Some changes to ARMAsmParser::ParseOperand to give different errors
for things not yet supported and some additions to the hacked
ARMAsmParser::MatchInstruction to allow more testing for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83673 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| 99e6d4e8392497d950d48b03f45c79b7dd131327 |
|
07-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
Add another bit of the ARM target assembler to llvm-mc to parse registers
with writeback, things like "sp!", etc. Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83477 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| a7ba3a81c008142a91d799e2ec3152cfd6bbb15f |
|
07-Oct-2009 |
Kevin Enderby <enderby@apple.com> |
Added bits of the ARM target assembler to llvm-mc to parse some load instruction
operands. Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts. This is a work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|
| ca9c42c4daa8f4ffd9411e11c05fb53ee1bfaf70 |
|
15-Sep-2009 |
Kevin Enderby <enderby@apple.com> |
Added the first bits of the ARM target assembler to llvm-mc. For now it only
parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called. Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81817 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
|