ee77da6b28d7f56e4e531ae8b4f8093de760a2e5 |
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02-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a typo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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f55ef64544f8ba81e50154a98f144f7b7783ed40 |
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02-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Generate better select code by allowing the target to use scalar select, and not sign-extend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163086 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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d906017c1a8b5c7c49f1bc21c13e8b85306298b8 |
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02-Sep-2012 |
Pete Cooper <peter_cooper@apple.com> |
Only legalise a VSELECT in to bitwise operations if the vector mask bool is zeros or all ones. A vector bool with just ones isn't suitable for masking with. No test case unfortunately as i couldn't find a target which fit all the conditions needed to hit this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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e757f00446fb3c80a96d729f0530b87e9148db7f |
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30-Aug-2012 |
Nadav Rotem <nrotem@apple.com> |
Currently targets that do not support selects with scalar conditions and vector operands - scalarize the code. ARM is such a target because it does not support CMOV of vectors. To implement this efficientlyi, we broadcast the condition bit and use a sequence of NAND-OR to select between the two operands. This is the same sequence we use for targets that don't have vector BLENDs (like SSE2). rdar://12201387 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162926 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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6b1e1d8b3d8d5a1b299d3c2897db9bf122b02c00 |
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30-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Add FMA to switch statement in VectorLegalizer::LegalizeOp so that it can be expanded when it isn't legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162894 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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926dc168c893e1848a18e45fd78f9b99d6f4cd5d |
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28-Jun-2012 |
Jim Grosbach <grosbach@apple.com> |
'Promote' vector [su]int_to_fp should widen elements. Teach vector legalization how to honor Promote for int to float conversions. The code checking whether to promote the operation knew to look at the operand, but the actual promotion code didn't. This fixes that. The operand is promoted up via [zs]ext. rdar://11762659 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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3ab32ea49ec13182f1397dc89c37551692f67140 |
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15-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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5e25ee8a1fcf8288d00d731b0f7ab7976f33b123 |
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05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149816 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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63974b2144c87c962effdc0508c27643c8ad98b6 |
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13-Dec-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Initial CodeGen support for CTTZ/CTLZ where a zero input produces an undefined result. This adds new ISD nodes for the new semantics, selecting them when the LLVM intrinsic indicates that the undef behavior is desired. The new nodes expand trivially to the old nodes, so targets don't actually need to do anything to support these new nodes besides indicating that they should be expanded. I've done this for all the operand types that I could figure out for all the targets. Owners of various targets, please review and let me know if any of these are incorrect. Note that the expand behavior is *conservatively correct*, and exactly matches LLVM's current behavior with these operations. Ideally this patch will not change behavior in any way. For example the regtest suite finds the exact same instruction sequences coming out of the code generator. That's why there are no new tests here -- all of this is being exercised by the existing test suite. Thanks to Duncan Sands for reviewing the various bits of this patch and helping me get the wrinkles ironed out with expanding for each target. Also thanks to Chris for clarifying through all the discussions that this is indeed the approach he was looking for. That said, there are likely still rough spots. Further review much appreciated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146466 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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815af82b74fa0901e818f5d16ee418675f399101 |
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19-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Improve code generation for vselect on SSE2: When checking the availability of instructions using the TLI, a 'promoted' instruction IS available. It means that the value is bitcasted to another type for which there is an operation. The correct check for the availablity of an instruction is to check if it should be expanded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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fbf19ef1860e33b202ff73a269b8b0bf9157460e |
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19-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Index starts with zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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17001ce25cc205ac1cd2604492c2bce310964220 |
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18-Oct-2011 |
Duncan Sands <baldrick@free.fr> |
Fix a bunch of unused variable warnings when doing a release build with gcc-4.6. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142350 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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60655413ceecfeb15a5abe6aa2fe6be249f85fab |
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17-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Removed set, but unused variable. Patch by Joe Abbey <jabbey@arxan.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142206 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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e9b58d0aac4e89b53a4be0e6f289b66649e1512b |
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15-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Move the legalization of vector loads and stores into LegalizeVectorOps. In some cases we need the second type-legalization pass in order to support all cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142060 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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b6266fb6026bdd900d8f045bf01300ef549e1802 |
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18-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
white space cleanups git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139994 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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8f28aaf72c61a493dfcd1b838ff8c5050352b5cd |
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13-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix the assertion which checks the size of the input operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139633 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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aec5861bb6ace3734163c000cb75ca2e22e29caa |
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13-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add vselect target support for targets that do not support blend but do support xor/and/or (For example SSE2). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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28b77e968d2b01fc9da724762bd8ddcd80650e32 |
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06-Sep-2011 |
Duncan Sands <baldrick@free.fr> |
Add codegen support for vector select (in the IR this means a select with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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d0f3ef807ee4210b97a7a6bc4231e89403145b83 |
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14-Jul-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
[VECTOR-SELECT] During type legalization we often use the SIGN_EXTEND_INREG SDNode. When this SDNode is legalized during the LegalizeVector phase, it is scalarized because non-simple types are automatically marked to be expanded. In this patch we add support for lowering SIGN_EXTEND_INREG manually. This fixes CodeGen/X86/vec_sext.ll when running with the '-promote-elements' flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135144 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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06cc324b9da1dc8fb7360a560343c28f5e7a940a |
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19-Mar-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add support for legalizing UINT_TO_FP of vectors on platforms which do not have native support for this operation (such as X86). The legalized code uses two vector INT_TO_FP operations and is faster than scalarizing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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bf17cfa3f904e488e898ac2e3af706fd1a892f08 |
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23-Nov-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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027657db7cf60bcbf40403496d7e4a170f9ce1ec |
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18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Change UpdateNodeOperands' operand and return value from SDValue to SDNode *, since it doesn't care about the ResNo value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106282 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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d858e90f039f5fcdc2fa93035e911a5a9505cc50 |
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17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use const qualifiers with TargetLowering. This eliminates several const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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d1996360399ad6dbe75ee185b661b16c83146373 |
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09-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode really does need to be a vector type, because TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type, and it needs to be able to distinguish between vectors and scalars. Also, fix some more issues with legalization of vector casts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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87862e77bbf90cf1b68c9eea1f3641ad81435e38 |
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11-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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7896c9f436a4eda5ec15e882a7505ba482a2fcd0 |
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03-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
improve portability to avoid conflicting with std::next in c++'0x. Patch by Howard Hinnant! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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cd6e725f21852e2f8cdf5fd0e65eb42c224776f8 |
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30-Nov-2009 |
Mon P Wang <wangmp@apple.com> |
Added support to allow clients to custom widen. For X86, custom widen vectors for divide/remainder since these operations can trap by unroll them and adding undefs for the resulting vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90108 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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825b72b0571821bf2d378749f69d6c4cfb52d2f9 |
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11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while the latter is capable of representing either a primitive or an extended type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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e50ed30282bb5b4a9ed952580523f2dda16215ac |
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11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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98ca4f2a325f72374a477f9deba7d09e8999c29b |
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05-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Major calling convention code refactoring. Instead of awkwardly encoding calling-convention information with ISD::CALL, ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering provides three virtual functions for targets to override: LowerFormalArguments, LowerCall, and LowerRet, which replace the custom lowering done on the special nodes. They provide the same information, but in a more immediately usable format. This also reworks much of the target-independent tail call logic. The decision of whether or not to perform a tail call is now cleanly split between target-independent portions, and the target dependent portion in IsEligibleForTailCallOptimization. This also synchronizes all in-tree targets, to help enable future refactoring and feature work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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556929a84bb8842cb07bebf4df67810d17be096e |
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06-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Make SINT_TO_FP/UINT_TO_FP vector legalization queries query on the integer type to be consistent with normal operation legalization. No visible change because nothing is actually using this at the moment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72980 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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509150f973ae650a57b79010a3ec36e60e40f41d |
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27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove special cases for more opcodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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c046c00d0a1f65483a8c69f26c66fc74f5228332 |
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24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add a comment which should hopefully make the purpose of this method a bit clearer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72374 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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5c22c8074404797f1313b1334757254fb5c6487a |
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23-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add a new step to legalization to legalize vector math operations. This will allow simplifying LegalizeDAG to eliminate type legalization. (I have a patch to do that, but it's not quite finished; I'll commit it once it's finished and I've fixed any review comments for this patch.) See the comment at the beginning of lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp for more details on the motivation for this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72325 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
|