| 1144af3c9b4da48cd581156e05b24261c8de366a |
|
25-Aug-2012 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Fix integer undefined behavior due to signed left shift overflow in LLVM.
Reviewed offline by chandlerc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 |
|
20-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
More dead code removal (using -Wunreachable-code)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| d9190c0f148b218ab046deadd0c7ae475414cde5 |
|
15-Nov-2011 |
Jay Foad <jay.foad@gmail.com> |
Remove some unnecessary includes of PseudoSourceValue.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144631 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| d752e0f7e64585839cb3a458ef52456eaebbea3c |
|
08-Nov-2011 |
Pete Cooper <peter_cooper@apple.com> |
Added invariant field to the DAG.getLoad method and changed all calls.
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| c60f9b752381baa6c4b80c0739034660f1748c84 |
|
14-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 7f5de8b4c64280587c2c9a9a0ba4e1ada7e050e5 |
|
04-Mar-2011 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Allow load from constant on SPU.
A 'load <4 x i32>* null' crashes llc before this fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 584520e8e2c1f8cc04bc8dd4dc4ea6c390627317 |
|
23-Jan-2011 |
Ted Kremenek <kremenek@apple.com> |
Null initialize a few variables flagged by
clang's -Wuninitialized-experimental warning.
While these don't look like real bugs, clang's
-Wuninitialized-experimental analysis is stricter
than GCC's, and these fixes have the benefit
of being general nice cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124073 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 16c29b5f285f375be53dabaa73e3e91107485fe4 |
|
10-Jan-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 2da8bc8a5f7705ac131184cd247f48500da0d74e |
|
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 7d17097e4a1f5d166a67a00670e8eca317a3a8ac |
|
09-Dec-2010 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Dont' feed ILA two inputs - it takes just one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 11edd0cedc98cda93681a6e9779f542c7354ec86 |
|
29-Nov-2010 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Add missing i128 case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| bf17cfa3f904e488e898ac2e3af706fd1a892f08 |
|
23-Nov-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 218c98c2848ef55607c729feb2c3d6d40ca504ae |
|
07-Oct-2010 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Add the missing cases to the type->registerclass conversion function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 8258135c908de13ceb771de1bacc8bf277bf8f70 |
|
01-Oct-2010 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Zap some redundant 'ori $?, $?, 0' from SPU.
Also remove some code that died in the process.
One now non-existant ori is checked for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115306 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| e8639036b1fb3a5b5e9589fe4e9f2ee1b77c36bd |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
it's more elegant to put the "getConstantPool" and
"getFixedStack" on the MachinePointerInfo class. While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 1cd1b0b283079b5a8c54759983e9e70845971b2c |
|
16-Sep-2010 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.
This cleans up after the mess r108567 left in the CellSPU backend.
ORCvt-instruction were used to reinterpret registers, and the ORs were then
removed by isMoveInstr(). This patch now removes 350 instrucions of format:
or $3, $3, $3
(from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is
checked for.
Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 17aa68055beed6faa48ca3a995c5b6fdf5092fd4 |
|
04-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
zap dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113073 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| df3f25656d97deda816f74f10be14821fd5259e9 |
|
03-Sep-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Zap dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112955 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 574aab5700bde870a2fb1334b5bb82551b6b6bce |
|
25-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
zap dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112073 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| bc2697cca0fc58434b6177923d46612267781825 |
|
04-Aug-2010 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Make SPU backend handle insertelement and
store for "half vectors"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110198 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 90c64f4aac95ebfcdeb8ad78a373fdb9e61b002c |
|
29-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove initialized but otherwise unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107127 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| c6166c6bcaf41acab5f14aa267acec3214b75127 |
|
09-Jun-2010 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Handle loading from/storing to undef pointers on SPU by inserting a
random load/store, rather than crashing llc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 11fe24624a307575eec82e9825ab8ba5435024a5 |
|
01-Jun-2010 |
Kalle Raiskila <kalle.raiskila@nokia.com> |
Fix handling of 'load' nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105269 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| d4ac35b350c1925e3921df7a3f1b2524dca79b46 |
|
04-May-2010 |
Chris Lattner <sabre@nondot.org> |
"on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
Patch by Kalle Raiskila!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| b6f778a8f6b47cec333f53d674d856ffd4889174 |
|
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use cast instead of dyn_cast when assuming success.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| d858e90f039f5fcdc2fa93035e911a5a9505cc50 |
|
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 46510a73e977273ec67747eb34cbdb43f815e451 |
|
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add const qualifiers to CodeGen's use of LLVM IR constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 1bd7335a17010bd4d8f86736cf73cac9f3fb80a5 |
|
08-Apr-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Use twines to simplify calls to report_fatal_error. For code size and readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 75361b69f3f327842b9dad69fa7f28ae3b688412 |
|
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
rename llvm::llvm_report_error -> llvm::report_fatal_error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 34247a0f356edf45ae3ad9ce04e1f90a77c6dba7 |
|
29-Mar-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Make isInt?? and isUint?? template specializations of the generic versions. This
makes calls a little bit more consistent and allows easy removal of the
specializations in the future. Convert all callers to the templated functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99838 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 7e09debcf17b2430ee95e547460ccc0fff4b0a87 |
|
29-Mar-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove a bunch of integer width predicate functions in favor of MathExtras.
Most of these were unused, some of them were wrong and unused (isS16Constant<short>,
isS10Constant<short>).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99827 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 7c306da505e2d7f64e160890b274a47fa0740962 |
|
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.
Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.
17 files changed, 114 insertions(+), 430 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97555 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| a8e761464df231dc6b91eef535c62bf2f87a4eba |
|
23-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
reapply my cellspu changes with a fix to not break the old isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| e2c0924f8e8b1b0fcbd48cfaada320917223beb5 |
|
23-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Revert 96854, 96852, and 96849, unbreaking test/CodeGen/CellSPU/i64ops.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 674b75617c977bb7168171fca514da3c082ec074 |
|
23-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
fix hte last cellspu failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 8843fd39c8b9bbe187d78cfce7cc6582c124cff5 |
|
23-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
hack around more crimes in instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96852 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 27e998984cf8100f6715e424ba2ac1c6925cf2f6 |
|
23-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
the cell backend is making all sorts of unsafe and incorrect assumptions
about ownership and update policies. It isn't clear why it is doing all
this lowering at isel time instead of in legalize. This fixes fcmp64.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 73657df3884c2994996341f5dc431d87012d6344 |
|
15-Feb-2010 |
David Greene <greened@obbligato.org> |
Remove an assumption of default arguments. This is in anticipation of a
change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96232 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| eeb3a00b84b7767d236ec8cf0619b9217fc247b9 |
|
05-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Change SelectCode's argument from SDValue to SDNode *, to make it more
clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 73bb251cd7a535fb93bb3a52eda61555fb253f41 |
|
05-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove uninteresting and confusing debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86149 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 602b0c8c17f458d2c80f2deb3c8e554d516ee316 |
|
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| f6045fe8c474110ba47afa69c752c54158678a4e |
|
25-Aug-2009 |
Scott Michel <scottm@aero.org> |
- Remove SelectSEXTi128 from SPUISelDAGToDAG.cpp, evidently, this is redundant
code, according to Anton (I'm not totally convinced, but we can always
resurrect patches if we need to do so.)
- Start moving CellSPU's tests to prefer FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79958 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| f1fa4fd282987381ab773d84a91e7de0cc4e5258 |
|
25-Aug-2009 |
Scott Michel <scottm@aero.org> |
128-bit sign extension and vector shift cleanups, contributed by Ken Werner
(IBM).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79949 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 4437ae213d5435390f0750213b53ec807c047f22 |
|
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
eliminate uses of cerr()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 23b9b19b1a5a00faa9fce0788155c7dbfd00bfb1 |
|
12-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 825b72b0571821bf2d378749f69d6c4cfb52d2f9 |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| e50ed30282bb5b4a9ed952580523f2dda16215ac |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| ad2afc2a421a0e41603d5eee412d4d8c77e9bc1c |
|
31-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77691 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| c5b19b21d84814d19692a6bbea11fbd135f4b094 |
|
31-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
failures when building assorted projects with clang.
--- Reverse-merging r77654 into '.':
U include/llvm/CodeGen/Passes.h
U include/llvm/CodeGen/MachineFunctionPass.h
U include/llvm/CodeGen/MachineFunction.h
U include/llvm/CodeGen/LazyLiveness.h
U include/llvm/CodeGen/SelectionDAGISel.h
D include/llvm/CodeGen/MachineFunctionAnalysis.h
U include/llvm/Function.h
U lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/MachineVerifier.cpp
U lib/CodeGen/MachineFunction.cpp
U lib/CodeGen/PrologEpilogInserter.cpp
U lib/CodeGen/MachineLoopInfo.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D lib/CodeGen/MachineFunctionAnalysis.cpp
D lib/CodeGen/MachineFunctionPass.cpp
U lib/CodeGen/LiveVariables.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77661 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 933c762371fe8cc6e2ef5d00d6866f4924852fed |
|
31-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Manage MachineFunctions with an analysis Pass instead of the Annotable
mechanism. To support this, make MachineFunctionPass a little more
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| af7ec975870f92245f1f1484ac80a1e2db6a0afa |
|
28-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Return ConstantVector to 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| a90b3dc2f1f70ab7102ec3f1fc57f199fd56d7cc |
|
15-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move a few more convenience factory functions from Constant to LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75840 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| c23197a26f34f559ea9797de51e187087c039c42 |
|
14-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| c25e7581b9b8088910da31702d4ca21c4734c6d7 |
|
11-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| dac237e18209b697a8ba122d0ddd9cad4dfba1f8 |
|
08-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Implement changes from Chris's feedback.
Finish converting lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 51b16f473759c1546acbf308a5d3f3e7bf3ea23c |
|
30-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Untabification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| a82d3f7c57f03457c385add1687319d5c290f867 |
|
17-Mar-2009 |
Scott Michel <scottm@aero.org> |
CellSPU:
Revert inadvertent mis-fix of fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67084 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 7ea02ffe918baff29a39981276e83b0e845ede03 |
|
17-Mar-2009 |
Scott Michel <scottm@aero.org> |
CellSPU:
- Fix fabs, fneg for f32 and f64.
- Use BuildVectorSDNode.isConstantSplat, now that the functionality exists
- Continue to improve i64 constant lowering. Lower certain special constants
to the constant pool when they correspond to SPU's shufb instruction's
special mask values. This avoids the overhead of performing a shuffle on a
zero-filled vector just to get the special constant when the memory load
suffices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 1606e8e4cd937e6de6681f686c266cf61722d972 |
|
13-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues.
1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants.
2. MachineConstantPool alignment field is also a log2 value.
3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values.
4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries.
5. Asm printer uses expensive data structure multimap to track constant pool entries by sections.
6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic.
Solutions:
1. ConstantPoolSDNode alignment field is changed to keep non-log2 value.
2. MachineConstantPool alignment field is also changed to keep non-log2 value.
3. Functions that create ConstantPool nodes are passing in non-log2 alignments.
4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT.
5. Asm printer uses cheaper data structure to group constant pool entries.
6. Asm printer compute entry offsets after grouping is done.
7. Change JIT code to compute entry offsets on the fly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| a87008d90b7d894cfca53d407642acfd7be2af3c |
|
25-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 4214a5531cdbe538a358033f1847e55c4436be1b |
|
23-Feb-2009 |
Scott Michel <scottm@aero.org> |
Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 046928077645f6ddad839e85dd03ab11e5b22cbc |
|
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Needs this file too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63993 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| ed2eee63a6858312ed17582d8cb85a6856d8eb34 |
|
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of one more non-DebugLoc getNode and
its corresponding getTargetNode. Lots of
caller changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 33c960f523f2308482d5b2816af46a7ec90a6d3d |
|
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc versions of getLoad and getStore.
Adjust the many callers of those versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63767 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 9de57a9ed2d401332eea0c02cdf0b6e66502be58 |
|
26-Jan-2009 |
Scott Michel <scottm@aero.org> |
CellSPU:
- Update DWARF debugging support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 19c10e658a3bcf6e01e2a83ffe9b8dd75adcb182 |
|
26-Jan-2009 |
Scott Michel <scottm@aero.org> |
Untabify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| c9c8b2a804b2cd3d33a6a965e06a21ff93968f97 |
|
26-Jan-2009 |
Scott Michel <scottm@aero.org> |
CellSPU:
- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll
- Fix select_bits.ll test
- Capitulate to the DAGCombiner and move i64 constant loads to instruction
selection (SPUISelDAGtoDAG.cpp).
<rant>DAGCombiner will insert all kinds of 64-bit optimizations after
operation legalization occurs and now we have to do most of the work that
instruction selection should be doing twice (once to determine if v2i64
build_vector can be handled by SelectCode(), which then runs all of the
predicates a second time to select the necessary instructions.) But,
CellSPU is a good citizen.</rant>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| d1e8d9c0a5dc821b6b52f7872181edeeec5df7ba |
|
21-Jan-2009 |
Scott Michel <scottm@aero.org> |
CellSPU:
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
Discovered interesting DAGCombiner feature, which is currently solved via
custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
insists on inserting one anyway.)
- Update README.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62664 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| fc54c552963545a81e4ea38e60460590afb2d5ae |
|
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 79ce276083ced01256a0eb7d80731e4948ca6e87 |
|
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 94bd57e154088f2d45c465e73f896f64f6da4ade |
|
15-Jan-2009 |
Scott Michel <scottm@aero.org> |
- Convert remaining i64 custom lowering into custom instruction emission
sequences in SPUDAGToDAGISel.cpp and SPU64InstrInfo.td, killing custom
DAG node types as needed.
- i64 mul is now a legal instruction, but emits an instruction sequence
that stretches tblgen and the imagination, as well as violating laws of
several small countries and most southern US states (just kidding, but
looking at a function with 80+ parameters is really weird and just plain
wrong.)
- Update tests as needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 02d711b93e3e0d2f0dae278360abe35305913e23 |
|
31-Dec-2008 |
Scott Michel <scottm@aero.org> |
- Start moving target-dependent nodes that could be represented by an
instruction sequence and cannot ordinarily be simplified by DAGcombine
into the various target description files or SPUDAGToDAGISel.cpp.
This makes some 64-bit operations legal.
- Eliminate target-dependent ISD enums.
- Update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61508 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| f0569be4a948c7ed816bfa2b8774a5a18458ee23 |
|
27-Dec-2008 |
Scott Michel <scottm@aero.org> |
- Remove Tilmann's custom truncate lowering: it completely hosed over
DAGcombine's ability to find reasons to remove truncates when they were not
needed. Consequently, the CellSPU backend would produce correct, but _really
slow and horrible_, code.
Replaced with instruction sequences that do the equivalent truncation in
SPUInstrInfo.td.
- Re-examine how unaligned loads and stores work. Generated unaligned
load code has been tested on the CellSPU hardware; see the i32operations.c
and i64operations.c in CodeGen/CellSPU/useful-harnesses. (While they may be
toy test code, it does prove that some real world code does compile
correctly.)
- Fix truncating stores in bug 3193 (note: unpack_df.ll will still make llc
fault because i64 ult is not yet implemented.)
- Added i64 eq and neq for setcc and select/setcc; started new instruction
information file for them in SPU64InstrInfo.td. Additional i64 operations
should be added to this file and not to SPUInstrInfo.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61447 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| aedc637c966b6eaa3ca33e9220efe5ec34517de7 |
|
10-Dec-2008 |
Scott Michel <scottm@aero.org> |
CellSPU:
- Fix bug 3185, with misc other cleanups.
- Needed to implement SPUInstrInfo::InsertBranch(). CAUTION: Not sure what
gets or needs to get passed to InsertBranch() to insert a conditional
branch. This will abort for now until a good test case shows up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60811 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 30ee7df71c4b08da5d7e3f772f29f7c9ca57d8fa |
|
04-Dec-2008 |
Scott Michel <scottm@aero.org> |
CellSPU:
- First patch from Nehal Desai, a new contributor at Aerospace. Nehal's patch
fixes sign/zero/any-extending loads for integers and floating point. Example
code, compiled w/o debugging or optimization where he first noticed the bug:
int main(void) {
float a = 99.0;
printf("%d\n", a);
return 0;
}
Verified that this code actually works on a Cell SPU.
Changes by Scott Michel:
- Fix bug in the value type list constructed by SPUISD::LDRESULT to include
both the load result's result and chain, not just the chain alone.
- Simplify LowerLOAD and remove extraneous and unnecessary chains.
- Remove unused SPUISD pseudo instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 1a6cdb6b50f982122453babde406215e849bb021 |
|
01-Dec-2008 |
Scott Michel <scottm@aero.org> |
CellSPU:
- Fix v2[if]64 vector insertion code before IBM files a bug report.
- Ensure that zero (0) offsets relative to $sp don't trip an assert
(add $sp, 0 gets legalized to $sp alone, tripping an assert)
- Shuffle masks passed to SPUISD::SHUFB are now v16i8 or v4i32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 18fae69723ace3b430a7c9301e7f99d2ff01fadc |
|
25-Nov-2008 |
Scott Michel <scottm@aero.org> |
CellSPU:
(a) Remove conditionally removed code in SelectXAddr. Basically, hope for the
best that the A-form and D-form address predicates catch everything before
the code decides to emit a X-form address.
(b) Expand vector store test cases to include the usual suspects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 50843c0741d242ab59e10ef88ebfbb88ce8f63ba |
|
25-Nov-2008 |
Scott Michel <scottm@aero.org> |
CellSPU: Relax constraints on when to generate a X-form address, evidently
they were too tight according to bug 3126.
Fix bug 3126.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 7a1c9e9cb7822afcf86b6575a3187974beecd9c6 |
|
23-Nov-2008 |
Scott Michel <scottm@aero.org> |
CellSPU: Fix bug 3056. Varadic extract_element was not implemented (nor was it
ever conceived to occur).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 9c0c6b2e4a403454c7c5105e18d9ffe1eef2f498 |
|
21-Nov-2008 |
Scott Michel <scottm@aero.org> |
CellSPU:
(a) Fix bgs 3052, 3057
(b) Incorporate Duncan's suggestions re: i1 promotion
(c) Indentation updates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 8be6bbe5bfd50945ac6c5542e0f54a0924a5db8d |
|
05-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 8ad4c00c00233acb8a3395098e2b575cc34de46b |
|
27-Oct-2008 |
David Greene <greened@obbligato.org> |
Have TableGen emit setSubgraphColor calls under control of a -gen-debug
flag. Then in a debugger developers can set breakpoints at these calls
to see waht is about to be selected and what the resulting subgraph
looks like. This really helps when debugging instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58278 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| f522068412218cd14b2c2df74a3437717d255381 |
|
16-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Trim #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57649 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 7810bfed5570c192e0714a8fd0e5130a0c38dd2e |
|
26-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| f5aeb1a8e4cf272c7348376d185ef8d8267653e0 |
|
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 6448d91ad1e5497fe2f7015d61b57cb5f3040879 |
|
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Clean up uses of TargetLowering::getTargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55769 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| ba36cb5242eb02b12b277f82b9efe497f7da4d7f |
|
28-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| f350b277f32d7d47f86c0e54f4aec4d470500618 |
|
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move the point at which FastISel taps into the SelectionDAGISel
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| ad3460c3c968e33c5b9a07104b9fe5a5c27ff55b |
|
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Simplify SelectRoot's interface, and factor out some common code
from all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 475871a144eb604ddaf37503397ba0941442e5fb |
|
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| e8be6c63915e0389f1eef6b53c64300d13b2ce99 |
|
17-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 1002c0203450620594a85454c6a095ca94b87cb2 |
|
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53179 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| db8d56b825efeb576d67b9dbe39d736d93306222 |
|
30-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
Split scheduling from instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52923 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 8e4eb09b1e3571965f49edcdfb56b1375b1b7551 |
|
08-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits. Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 83ec4b6711980242ef3c55a4fa36b2d7a39c1bfb |
|
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| eecfa369eb91838fbd833183717b2579a0127acb |
|
29-May-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove more iostream header includes. Needed to implement a "FlushStream"
function to flush a specified std::ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51705 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 844731a7f1909f55935e3514c9e713a62d67662e |
|
13-May-2008 |
Dan Gohman <gohman@apple.com> |
Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 203b2d6eed0f35fc8492c78ed2ae1afa854bfbf1 |
|
30-Apr-2008 |
Scott Michel <scottm@aero.org> |
Bug fixes and updates for CellSPU, syncing up with trunk. Most notable
fixes are target-specific lowering of frame indices, fix constants generated
for the FSMBI instruction, and fixing SPUTargetLowering::computeMaskedBitsFor-
TargetNode().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50462 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 79698f60c4693ba305ba994b8349a3f6a6d6031e |
|
20-Mar-2008 |
Scott Michel <scottm@aero.org> |
Add more patterns to match in the integer comparison test harnesses.
Fix bugs encountered, mostly due to range matching for immediates;
the CellSPU's 10-bit immediates are sign extended, covering a
larger range of unsigned values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48575 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 78c47fa50b903d5dcb4e07a5c048a35cbc2add9e |
|
10-Mar-2008 |
Scott Michel <scottm@aero.org> |
Integer comparison tests for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48152 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| a59d469e9b31087f0f045bcb5d1a154c963be9b7 |
|
23-Feb-2008 |
Scott Michel <scottm@aero.org> |
Merge current work back to tree to minimize diffs and drift. Major highlights
for CellSPU modifications:
- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
compiles and generates the right code. More work still needs to be done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47532 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 4e3f5a4e9c13f216856515e6f000881f2c850736 |
|
05-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| a844bdeab31ef04221e7ef59a8467893584cc14d |
|
02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 7f9ba9bb3c969eab32118dd21f15b4b74843c5c1 |
|
30-Jan-2008 |
Scott Michel <scottm@aero.org> |
More cleanups for CellSPU:
- Expand tabs... (poss 80-col violations, will get them later...)
- Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single
function, simplifying maintenance. Also reduced custom instruction
generation for SPUvecinsert/INSERT_MASK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 053c1da8d956a794d158ac906b3927c923f97c4d |
|
29-Jan-2008 |
Scott Michel <scottm@aero.org> |
Overhaul Cell SPU's addressing mode internals so that there are now
only two addressing mode nodes, SPUaform and SPUindirect (vice the
three previous ones, SPUaform, SPUdform and SPUxform). This improves
code somewhat because we now avoid using reg+reg addressing when
it can be avoided. It also simplifies the address selection logic,
which was the main point for doing this.
Also, for various global variables that would be loaded using SPU's
A-form addressing, prefer D-form offs[reg] addressing, keeping the
base in a register if the variable is used more than once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 58c5818c01e375a84dc601140470fa68638004cf |
|
17-Jan-2008 |
Scott Michel <scottm@aero.org> |
Forward progress: crtbegin.c now compiles successfully!
Fixed CellSPU's A-form (local store) address mode, so that all globals,
externals, constant pool and jump table symbols are now wrapped within
a SPUISD::AFormAddr pseudo-instruction. This now identifies all local
store memory addresses, although it requires a bit of legerdemain during
instruction selection to properly select loads to and stores from local
store, properly generating "LQA" instructions.
Also added mul_ops.ll test harness for exercising integer multiplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 497e888daf9ba6489928e1153804ed12a7fe44c5 |
|
11-Jan-2008 |
Scott Michel <scottm@aero.org> |
More CellSPU refinements:
- struct_2.ll: Completely unaligned load/store testing
- call_indirect.ll, struct_1.ll: Add test lines to exercise
X-form [$reg($reg)] addressing
At this point, loads and stores should be under control (he says
in an optimistic tone of voice.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45882 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 9de5d0dd42463f61c4ee2f9db5f3d08153c0dacf |
|
11-Jan-2008 |
Scott Michel <scottm@aero.org> |
More CellSPU refinement and progress:
- Cleaned up custom load/store logic, common code is now shared [see note
below], cleaned up address modes
- More test cases: various intrinsics, structure element access (load/store
test), updated target data strings, indirect function calls.
Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode
structures: they now share a common base class, LSBaseSDNode, that
provides an interface to their common functionality. There is some hackery
to access the proper operand depending on the derived class; otherwise,
to do a proper job would require finding and rearranging the SDOperands
sent to StoreSDNode's constructor. The current refactor errs on the
side of being conservatively and backwardly compatible while providing
functionality that reduces redundant code for targets where loads and
stores are custom-lowered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45851 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 84bc5427d6883f73cfeae3da640acd011d35c006 |
|
31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 4ee451de366474b9c228b4e5fa573795a715216d |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| d3ada751c3e5f4e0de419c83e0f7975a050f893e |
|
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
fix strict-aliasing violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 86c041f50e17f7fcd18193ff49e58379924d6472 |
|
20-Dec-2007 |
Scott Michel <scottm@aero.org> |
More working CellSPU tests:
- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 9999e685ea86e9cb8c8d59bfb2f3f4c20acc4de4 |
|
19-Dec-2007 |
Scott Michel <scottm@aero.org> |
Add new immed16.ll test case, fix CellSPU errata to make test case work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 504c369213efb263136bb048e79af3516511c040 |
|
17-Dec-2007 |
Scott Michel <scottm@aero.org> |
- Restore some i8 functionality in CellSPU
- New test case: nand.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| ec2a08ff061af36b46160e475362959f21663e76 |
|
15-Dec-2007 |
Scott Michel <scottm@aero.org> |
Start committing working test cases for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45050 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 2466c3766dee7e65793bded413d02834dbc75629 |
|
05-Dec-2007 |
Scott Michel <scottm@aero.org> |
Updated source file headers to llvm coding standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|
| 266bc8f7774b153401e54ed537db299159840981 |
|
04-Dec-2007 |
Scott Michel <scottm@aero.org> |
More of the Cell SPU code drop from "Team Aerospace".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44582 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
|