/external/llvm/include/llvm/CodeGen/ |
H A D | FunctionLoweringInfo.h | 106 APInt KnownOne, KnownZero; member in struct:llvm::FunctionLoweringInfo::LiveOutInfo 107 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), 171 const APInt &KnownZero, const APInt &KnownOne) { 173 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) 179 LOI.KnownOne = KnownOne; 170 AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, const APInt &KnownZero, const APInt &KnownOne) argument
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombine.h | 295 APInt &KnownOne, unsigned Depth = 0) const { 296 return llvm::ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth); 323 APInt& KnownZero, APInt& KnownOne, 326 APInt& KnownZero, APInt& KnownOne, 294 ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne, unsigned Depth = 0) const argument
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H A D | InstCombineSimplifyDemanded.cpp | 54 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0); 58 KnownZero, KnownOne, 0); 69 APInt &KnownZero, APInt &KnownOne, 72 KnownZero, KnownOne, Depth); 85 /// returns false after analyzing the expression and setting KnownOne and known 89 /// the expression. KnownOne and KnownZero always follow the invariant that 90 /// KnownOne & KnownZero == 0. That is, a bit can't be both 1 and 0. Note that 91 /// the bits in KnownOne and KnownZero may only be accurate for those bits set 93 /// and KnownOne must all be the same. 101 APInt &KnownZero, APInt &KnownOne, 68 SimplifyDemandedBits(Use &U, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne, unsigned Depth) argument 100 SimplifyDemandedUseBits(Value *V, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne, unsigned Depth) argument [all...] |
H A D | InstCombineCompares.cpp | 153 const APInt& KnownOne, 155 assert(KnownZero.getBitWidth() == KnownOne.getBitWidth() && 158 "KnownZero, KnownOne and Min, Max must have equal bitwidth."); 159 APInt UnknownBits = ~(KnownZero|KnownOne); 163 Min = KnownOne; 164 Max = KnownOne|UnknownBits; 177 const APInt &KnownOne, 179 assert(KnownZero.getBitWidth() == KnownOne.getBitWidth() && 182 "Ty, KnownZero, KnownOne and Min, Max must have equal bitwidth."); 183 APInt UnknownBits = ~(KnownZero|KnownOne); 152 ComputeSignedMinMaxValuesFromKnownBits(const APInt& KnownZero, const APInt& KnownOne, APInt& Min, APInt& Max) argument 176 ComputeUnsignedMinMaxValuesFromKnownBits(const APInt &KnownZero, const APInt &KnownOne, APInt &Min, APInt &Max) argument [all...] |
/external/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 47 APInt &KnownZero, APInt &KnownOne, 96 KnownOne |= KnownOne2 & Mask; 107 KnownOne |= LHSKnownOne & Mask; 111 if (!KnownZero.isNegative() && !KnownOne.isNegative()) { 119 KnownOne |= APInt::getSignBit(BitWidth); 126 KnownOne |= APInt::getSignBit(BitWidth); 133 APInt &KnownZero, APInt &KnownOne, 137 ComputeMaskedBits(Op1, KnownZero, KnownOne, TD, Depth+1); 139 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 152 bool isKnownNegativeOp1 = KnownOne 46 ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, const TargetData *TD, unsigned Depth) argument 132 ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, const TargetData *TD, unsigned Depth) argument 228 ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne, const TargetData *TD, unsigned Depth) argument 780 ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne, const TargetData *TD, unsigned Depth) argument [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 841 APInt &KnownOne, 845 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 851 DAG.ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 853 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 857 KnownOne &= KnownOne2; 839 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGISel.cpp | 509 APInt KnownOne; local 538 CurDAG->ComputeMaskedBits(Src, KnownZero, KnownOne); 539 FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, KnownZero, KnownOne); 1469 APInt KnownZero, KnownOne; local 1470 CurDAG->ComputeMaskedBits(LHS, KnownZero, KnownOne); 1473 if ((NeededMask & KnownOne) == NeededMask)
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H A D | LegalizeIntegerTypes.cpp | 1360 APInt KnownZero, KnownOne; local 1361 DAG.ComputeMaskedBits(N->getOperand(1), KnownZero, KnownOne); 1364 if (((KnownZero|KnownOne) & HighBitMask) == 0) 1373 if (KnownOne.intersects(HighBitMask)) {
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H A D | TargetLowering.cpp | 1184 /// analyze the expression and return a mask of KnownOne and KnownZero bits for 1190 APInt &KnownOne, 1200 KnownZero = KnownOne = APInt(BitWidth, 0); 1205 // If not at the root, Just compute the KnownZero/KnownOne bits to 1207 TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1226 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1227 KnownZero = ~KnownOne; 1248 KnownOne, TLO, Depth+1)) 1250 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1258 if ((NewMask & ~KnownZero2 & KnownOne) 1187 SimplifyDemandedBits(SDValue Op, const APInt &DemandedMask, APInt &KnownZero, APInt &KnownOne, TargetLoweringOpt &TLO, unsigned Depth) const argument 1841 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument 1896 APInt KnownZero, KnownOne; local [all...] |
H A D | DAGCombiner.cpp | 680 APInt KnownZero, KnownOne; local 681 if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO)) 3883 APInt KnownZero, KnownOne; local 3884 DAG.ComputeMaskedBits(N0.getOperand(0), KnownZero, KnownOne); 3886 // If any of the input bits are KnownOne, then the input couldn't be all 3888 if (KnownOne.getBoolValue()) return DAG.getConstant(0, VT); 4475 APInt KnownOne; local 4478 DAG.ComputeMaskedBits(Op, KnownZero, KnownOne); 4499 DAG.ComputeMaskedBits(Op, KnownZero, KnownOne);
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H A D | SelectionDAG.cpp | 1684 APInt KnownZero, KnownOne; local 1685 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1686 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1691 /// known to be either zero or one and return them in the KnownZero/KnownOne 1695 APInt &KnownOne, unsigned Depth) const { 1698 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1707 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1708 KnownZero = ~KnownOne; 1712 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1714 assert((KnownZero & KnownOne) 1694 ComputeMaskedBits(SDValue Op, APInt &KnownZero, APInt &KnownOne, unsigned Depth) const argument 2252 APInt KnownZero, KnownOne; local 2277 APInt KnownZero, KnownOne; local 2328 APInt KnownZero, KnownOne; local 6096 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 902 APInt KnownZero, KnownOne; local 903 DAG.ComputeMaskedBits(X, KnownZero, KnownOne);
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H A D | X86ISelLowering.cpp | 13264 APInt &KnownOne, 13276 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 14103 APInt KnownZero, KnownOne; local 14107 TLI.SimplifyDemandedBits(Cond, DemandedMask, KnownZero, KnownOne, TLO)) 15628 APInt KnownZero, KnownOne; local 15633 TLI.SimplifyDemandedBits(Op1, DemandedMask, KnownZero, KnownOne, TLO)) 13262 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1367 APInt KnownZero, KnownOne; local 1370 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1390 APInt KnownZero, KnownOne; local 1393 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1406 APInt KnownZero, KnownOne; local 1409 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1529 APInt &KnownOne, 1532 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 1527 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 3169 APInt &KnownOne, 3177 // KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0); 3167 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth ) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 5624 APInt &KnownOne, 5627 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 5622 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 8945 APInt KnownZero, KnownOne; local 8946 DAG.ComputeMaskedBits(SDValue(N,0), KnownZero, KnownOne); local 9475 APInt &KnownOne, 9478 KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0); 9483 DAG.ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 9484 if (KnownZero == 0 && KnownOne == 0) return; 9489 KnownOne &= KnownOneRHS; 9473 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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