Searched refs:getRegInfo (Results 1 - 25 of 95) sorted by relevance

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/external/llvm/lib/Target/Mips/
H A DMipsMachineFunction.cpp43 return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
H A DMipsISelDAGToDAG.cpp125 MachineRegisterInfo &RegInfo = MF.getRegInfo();
143 MF.getRegInfo().addLiveIn(Mips::T9_64);
182 MF.getRegInfo().addLiveIn(Mips::T9);
217 MF.getRegInfo().addLiveIn(Mips::V0);
264 MachineRegisterInfo *MRI = &MF.getRegInfo();
/external/llvm/lib/CodeGen/
H A DAllocationOrder.cpp29 const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg);
31 VRM.getRegInfo().getRegAllocationHint(VirtReg);
H A DPHIEliminationUtils.cpp36 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
H A DVirtRegMap.cpp52 MRI = &mf.getRegInfo();
66 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs();
94 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
195 MRI = &MF->getRegInfo();
H A DRegAllocBase.cpp57 MRI = &vrm.getRegInfo();
H A DVirtRegMap.h85 MachineRegisterInfo &getRegInfo() const { return *MRI; } function in class:llvm::VirtRegMap
H A DCalcSpillWeights.cpp47 MachineRegisterInfo &MRI = MF.getRegInfo();
111 MachineRegisterInfo &mri = MF.getRegInfo();
H A DPHIElimination.cpp112 MRI = &MF.getRegInfo();
238 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
239 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
H A DDeadMachineInstructionElim.cpp89 MRI = &MF.getRegInfo();
H A DLiveRegMatrix.cpp51 MRI = &MF.getRegInfo();
H A DOptimizePHIs.cpp64 MRI = &Fn.getRegInfo();
H A DProcessImplicitDefs.cpp146 MRI = &MF.getRegInfo();
H A DSpiller.cpp67 mri = &mf.getRegInfo();
H A DMachineInstr.cpp59 MachineRegisterInfo &MRI = MF->getRegInfo();
101 MachineRegisterInfo &MRI = MF->getRegInfo();
121 MF->getRegInfo().removeRegOperandFromUseList(this);
137 RegInfo = &MF->getRegInfo();
633 /// getRegInfo - If this instruction is embedded into a MachineFunction,
636 MachineRegisterInfo *MachineInstr::getRegInfo() { function in class:MachineInstr
638 return &MBB->getParent()->getRegInfo();
667 MachineRegisterInfo *RegInfo = getRegInfo();
758 MachineRegisterInfo *RegInfo = getRegInfo();
1535 MRI = &MF->getRegInfo();
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCCTRLoops.cpp208 MRI = &MF.getRegInfo();
636 MF->getRegInfo().getRegClass(TripCount->getReg());
637 CountReg = MF->getRegInfo().createVirtualRegister(RC);
645 CountReg = MF->getRegInfo().createVirtualRegister(RC);
657 CountReg = MF->getRegInfo().createVirtualRegister(RC);
663 CountReg = MF->getRegInfo().createVirtualRegister(RC);
H A DPPCFrameLowering.cpp104 if (MF->getRegInfo().isPhysRegUsed(VRRegNo[i]))
110 I = MF->getRegInfo().livein_begin(),
111 E = MF->getRegInfo().livein_end(); I != E; ++I) {
117 I = MF->getRegInfo().liveout_begin(),
118 E = MF->getRegInfo().liveout_end(); I != E; ++I) {
732 MachineRegisterInfo::def_iterator RI = MF.getRegInfo().def_begin(LR);
733 return RI !=MF.getRegInfo().def_end() || MFI->isLRStoreRequired();
745 MF.getRegInfo().setPhysRegUnused(LR);
/external/llvm/lib/Target/CellSPU/
H A DSPUFrameLowering.cpp247 MF.getRegInfo().setPhysRegUnused(SPU::R0);
248 MF.getRegInfo().setPhysRegUnused(SPU::R1);
249 MF.getRegInfo().setPhysRegUnused(SPU::R2);
/external/llvm/include/llvm/CodeGen/
H A DLiveRangeEdit.h109 MRI(MF.getRegInfo()), LIS(lis), VRM(vrm),
H A DMachineFunction.h158 /// getRegInfo - Return information about the registers currently in use.
160 MachineRegisterInfo &getRegInfo() { return *RegInfo; } function in class:llvm::MachineFunction
161 const MachineRegisterInfo &getRegInfo() const { return *RegInfo; } function in class:llvm::MachineFunction
/external/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp402 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
607 MF.getRegInfo().isLiveIn(Reg))
1176 MachineRegisterInfo &MRI = MF.getRegInfo();
1190 MF.getRegInfo().setPhysRegUsed(ARM::R4);
1221 MF.getRegInfo().setPhysRegUsed(ARM::R4);
1226 MF.getRegInfo().setPhysRegUsed(ARM::LR);
1236 MF.getRegInfo().setPhysRegUsed(ARM::R4);
1244 MF.getRegInfo().setPhysRegUsed(RegInfo->getBaseRegister());
1252 if (MF.getRegInfo().isPhysRegOrOverlapUsed(Reg)) {
1341 MF.getRegInfo()
[all...]
H A DThumb1FrameLowering.cpp243 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
316 MF.getRegInfo().isLiveIn(Reg))
/external/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp230 MRI = &MF.getRegInfo();
486 MF->getRegInfo().getRegClass(TripCount->getReg());
487 unsigned CountReg = MF->getRegInfo().createVirtualRegister(RC);
492 CountReg = MF->getRegInfo().createVirtualRegister(RC);
/external/llvm/lib/Target/X86/
H A DX86VZeroUpper.cpp140 MachineRegisterInfo &MRI = MF.getRegInfo();
/external/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp100 if (MF.getRegInfo().liveout_empty()) {
103 MF.getRegInfo().addLiveOut(RVLocs[i].getLocReg());
130 if (MF.getRegInfo().liveout_empty())
131 MF.getRegInfo().addLiveOut(SP::I0);
157 MachineRegisterInfo &RegInfo = MF.getRegInfo();
186 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi);
212 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
295 Reg = MF.getRegInfo().createVirtualRegister(&SP::IntRegsRegClass);
324 MF.getRegInfo().addLiveIn(*CurArgReg, VReg);

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