Searched refs:reg_end (Results 1 - 12 of 12) sorted by relevance

/external/llvm/lib/CodeGen/
H A DPHIEliminationUtils.cpp38 RE = MRI.reg_end(); RI != RE; ++RI) {
H A DSpiller.cpp93 regItr = mri->reg_begin(li->reg); regItr != mri->reg_end();) {
103 } while (regItr != mri->reg_end() && (&*regItr == mi));
H A DMachineRegisterInfo.cpp190 for (reg_iterator I = reg_begin(FromReg), E = reg_end(); I != E; ) {
H A DTwoAddressInstructionPass.cpp312 E = MRI->reg_end(); I != E; ++I) {
1480 RE = MRI->reg_end(); RI != RE; ) {
H A DLiveInterval.cpp868 RE = MRI.reg_end(); RI != RE;) {
H A DScheduleDAGInstrs.cpp157 for (const_iterator I = reg_begin(), E = reg_end(); I != E; ++I) {
H A DSplitKit.cpp971 RE = MRI.reg_end(); RI != RE;) {
/external/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h158 /// reg_begin/reg_end - Provide iteration support to walk over all definitions
167 /// reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified
173 static reg_iterator reg_end() { return reg_iterator(0); } function in class:llvm::MachineRegisterInfo
177 bool reg_empty(unsigned RegNo) const { return reg_begin(RegNo) == reg_end(); }
508 /// atEnd - return true if this iterator is equal to reg_end() on the value.
H A DScheduleDAGInstrs.h135 const_iterator reg_end() const { return PhysRegSet.end(); } function in class:llvm::Reg2SUnitsMap
/external/llvm/lib/Target/Hexagon/
H A DHexagonHardwareLoops.cpp332 RI = MRI->reg_begin(IV_Opnd->getReg()), RE = MRI->reg_end();
/external/llvm/lib/Target/PowerPC/
H A DPPCCTRLoops.cpp341 RI = MRI->reg_begin(IV_Opnd->getReg()), RE = MRI->reg_end();
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp860 if (RI == RegInfo->reg_end())
868 if (PostRI != RegInfo->reg_end())

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