PPCInstrInfo.cpp revision c50e2bcdf7bff1f9681ab80e52691f274950fab5
121e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman//===- PPCInstrInfo.cpp - PowerPC32 Instruction Information -----*- C++ -*-===// 2b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 5f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file was developed by the LLVM research group and is distributed under 6f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// the University of Illinois Open Source License. See LICENSE.TXT for details. 7b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC implementation of the TargetInstrInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 1416e71f2f70811c69c56052dd146324fe20e31db5Chris Lattner#include "PPCInstrInfo.h" 154c7b43b43fdf943c7298718e15ab5d6dfe345be7Chris Lattner#include "PPCGenInstrInfo.inc" 16b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner#include "PPCTargetMachine.h" 17f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 18f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include <iostream> 19f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanusing namespace llvm; 20f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 21b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris LattnerPPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) 22804e06704261f233111913a047ef7f7dec1b8725Chris Lattner : TargetInstrInfo(PPCInsts, sizeof(PPCInsts)/sizeof(PPCInsts[0])), TM(tm), 23804e06704261f233111913a047ef7f7dec1b8725Chris Lattner RI(*TM.getSubtargetImpl()) {} 24b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 25b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner/// getPointerRegClass - Return the register class to use to hold pointers. 26b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner/// This is used for addressing modes. 27b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattnerconst TargetRegisterClass *PPCInstrInfo::getPointerRegClass() const { 28b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner if (TM.getSubtargetImpl()->isPPC64()) 29b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner return &PPC::G8RCRegClass; 30b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner else 31b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner return &PPC::GPRCRegClass; 32b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner} 33b1d26f66658cff3ceb7d44a72fbc8c8e975532f9Chris Lattner 34f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 3521e463b2bf864671a87ebe386cb100ef9349a540Nate Begemanbool PPCInstrInfo::isMoveInstr(const MachineInstr& MI, 3621e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman unsigned& sourceReg, 3721e463b2bf864671a87ebe386cb100ef9349a540Nate Begeman unsigned& destReg) const { 38f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineOpCode oc = MI.getOpcode(); 39b410dc99774d52b4491750dab10b91cca1d661d8Chris Lattner if (oc == PPC::OR || oc == PPC::OR8 || oc == PPC::VOR || 4014c09b81ead8fe8b754fca2d0a8237cb810b37d6Chris Lattner oc == PPC::OR4To8 || oc == PPC::OR8To4) { // or r1, r2, r2 41f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(MI.getNumOperands() == 3 && 42f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 43f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(1).isRegister() && 44f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(2).isRegister() && 45f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC OR instruction!"); 46f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { 47f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 48f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 49f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 50f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 51f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else if (oc == PPC::ADDI) { // addi r1, r2, 0 52f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(MI.getNumOperands() == 3 && 53f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 54f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(2).isImmediate() && 55f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC ADDI instruction!"); 56f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (MI.getOperand(1).isRegister() && MI.getOperand(2).getImmedValue()==0) { 57f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 58f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 59f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 60f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 61cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } else if (oc == PPC::ORI) { // ori r1, r2, 0 62cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman assert(MI.getNumOperands() == 3 && 63cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(0).isRegister() && 64cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(1).isRegister() && 65cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman MI.getOperand(2).isImmediate() && 66cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman "invalid PPC ORI instruction!"); 67cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman if (MI.getOperand(2).getImmedValue()==0) { 68cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman sourceReg = MI.getOperand(1).getReg(); 69cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman destReg = MI.getOperand(0).getReg(); 70cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman return true; 71cb90de37a720b0b00d6303b49b8df6d5ac5f34f9Nate Begeman } 72eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner } else if (oc == PPC::FMRS || oc == PPC::FMRD || 73eb5d47d99db0d9e4fc11f136fbacbd507c71a4c2Chris Lattner oc == PPC::FMRSD) { // fmr r1, r2 74f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(MI.getNumOperands() == 2 && 75f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(0).isRegister() && 76f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(1).isRegister() && 77f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "invalid PPC FMR instruction"); 78f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman sourceReg = MI.getOperand(1).getReg(); 79f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman destReg = MI.getOperand(0).getReg(); 80f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return true; 817af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (oc == PPC::MCRF) { // mcrf cr1, cr2 827af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman assert(MI.getNumOperands() == 2 && 837af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman MI.getOperand(0).isRegister() && 847af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman MI.getOperand(1).isRegister() && 857af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman "invalid PPC MCRF instruction"); 867af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman sourceReg = MI.getOperand(1).getReg(); 877af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman destReg = MI.getOperand(0).getReg(); 887af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman return true; 89f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 90f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return false; 91f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 92043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 93408396014742a05cad1c91949d2226169e3f9d80Chris Lattnerunsigned PPCInstrInfo::isLoadFromStackSlot(MachineInstr *MI, 949c09c9ec9dab61450800b42cbf746164aa076b88Chris Lattner int &FrameIndex) const { 95408396014742a05cad1c91949d2226169e3f9d80Chris Lattner switch (MI->getOpcode()) { 96408396014742a05cad1c91949d2226169e3f9d80Chris Lattner default: break; 97408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LD: 98408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LWZ: 99408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFS: 100408396014742a05cad1c91949d2226169e3f9d80Chris Lattner case PPC::LFD: 101408396014742a05cad1c91949d2226169e3f9d80Chris Lattner if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImmedValue() && 102408396014742a05cad1c91949d2226169e3f9d80Chris Lattner MI->getOperand(2).isFrameIndex()) { 103408396014742a05cad1c91949d2226169e3f9d80Chris Lattner FrameIndex = MI->getOperand(2).getFrameIndex(); 104408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return MI->getOperand(0).getReg(); 105408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 106408396014742a05cad1c91949d2226169e3f9d80Chris Lattner break; 107408396014742a05cad1c91949d2226169e3f9d80Chris Lattner } 108408396014742a05cad1c91949d2226169e3f9d80Chris Lattner return 0; 1096524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 110408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 1116524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattnerunsigned PPCInstrInfo::isStoreToStackSlot(MachineInstr *MI, 1126524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner int &FrameIndex) const { 1136524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner switch (MI->getOpcode()) { 1146524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner default: break; 1153b478b31e297208ef2c9f74750a8a603eb3726fbNate Begeman case PPC::STD: 1166524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STW: 1176524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFS: 1186524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner case PPC::STFD: 1196524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImmedValue() && 1206524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner MI->getOperand(2).isFrameIndex()) { 1216524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner FrameIndex = MI->getOperand(2).getFrameIndex(); 1226524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return MI->getOperand(0).getReg(); 1236524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1246524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner break; 1256524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner } 1266524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner return 0; 1276524287c53cf727a8ef33517403fcb1bbd7adff9Chris Lattner} 128408396014742a05cad1c91949d2226169e3f9d80Chris Lattner 129043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// commuteInstruction - We can commute rlwimi instructions, but only if the 130043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner// rotate amt is zero. We also have to munge the immediates a bit. 13121e463b2bf864671a87ebe386cb100ef9349a540Nate BegemanMachineInstr *PPCInstrInfo::commuteInstruction(MachineInstr *MI) const { 132043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Normal instructions can be commuted the obvious way. 133043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOpcode() != PPC::RLWIMI) 134043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return TargetInstrInfo::commuteInstruction(MI); 135043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 136043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Cannot commute if it has a non-zero rotate count. 137043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner if (MI->getOperand(3).getImmedValue() != 0) 138043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return 0; 139043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 140043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // If we have a zero rotate count, we have: 141043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask(MB,ME) 142043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op1 & ~M) | (Op2 & M) 143043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Change this to: 144043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // M = mask((ME+1)&31, (MB-1)&31) 145043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Op0 = (Op2 & ~M) | (Op1 & M) 146043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 147043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap op1/op2 148043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg1 = MI->getOperand(1).getReg(); 149043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned Reg2 = MI->getOperand(2).getReg(); 150e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(2).setReg(Reg1); 151e53f4a055f74bded20d6129b4724ddd17fd199f6Chris Lattner MI->getOperand(1).setReg(Reg2); 152043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner 153043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner // Swap the mask around. 154043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned MB = MI->getOperand(4).getImmedValue(); 155043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner unsigned ME = MI->getOperand(5).getImmedValue(); 156043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner MI->getOperand(4).setImmedValue((ME+1) & 31); 157043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner MI->getOperand(5).setImmedValue((MB-1) & 31); 158043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner return MI; 159043870dd85ea41e8972c304b122070a417c8a4bcChris Lattner} 160bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner 161bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattnervoid PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, 162bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner MachineBasicBlock::iterator MI) const { 163bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner BuildMI(MBB, MI, PPC::NOP, 0); 164bbf1c72d51a77bf54c9c684b90a78e59f0b70b2fChris Lattner} 165c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 166c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 167c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner// Branch analysis. 168c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, 169c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *&FBB, 170c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner std::vector<MachineOperand> &Cond) const { 171c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block has no terminators, it just falls into the block after it. 172c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 173c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (I == MBB.begin() || !isTerminatorInstr((--I)->getOpcode())) 174c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 175c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 176c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the last instruction in the block. 177c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *LastInst = I; 178c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 179c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there is only one terminator instruction, process it. 180c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (I == MBB.begin() || !isTerminatorInstr((--I)->getOpcode())) { 181c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (LastInst->getOpcode() == PPC::B) { 182c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner TBB = LastInst->getOperand(0).getMachineBasicBlock(); 183c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 184c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } else if (LastInst->getOpcode() == PPC::COND_BRANCH) { 185c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Block ends with fall-through condbranch. 186c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner TBB = LastInst->getOperand(2).getMachineBasicBlock(); 187c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(0)); 188c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(LastInst->getOperand(1)); 189c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 190c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 191c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, don't know what this is. 192c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 193c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 194c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 195c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Get the instruction before it if it's a terminator. 196c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineInstr *SecondLastInst = I; 197c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 198c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If there are three terminators, we don't know what sort of block this is. 199c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst && I != MBB.begin() && 200c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner isTerminatorInstr((--I)->getOpcode())) 201c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 202c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 203c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // If the block ends with PPC::B and PPC:COND_BRANCH, handle it. 204c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (SecondLastInst->getOpcode() == PPC::COND_BRANCH && 205c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner LastInst->getOpcode() == PPC::B) { 206c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner TBB = SecondLastInst->getOperand(2).getMachineBasicBlock(); 207c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(0)); 208c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner Cond.push_back(SecondLastInst->getOperand(1)); 209c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner FBB = LastInst->getOperand(0).getMachineBasicBlock(); 210c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return false; 211c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner } 212c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 213c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Otherwise, can't handle this. 214c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 215c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 216c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 217c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnervoid PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 218c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock::iterator I = MBB.end(); 219c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (I == MBB.begin()) return; 220c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 221c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (I->getOpcode() != PPC::B && I->getOpcode() != PPC::COND_BRANCH) 222c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return; 223c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 224c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 225c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 226c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 227c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I = MBB.end(); 228c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 229c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (I == MBB.begin()) return; 230c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner --I; 231c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (I->getOpcode() != PPC::COND_BRANCH) 232c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return; 233c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 234c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Remove the branch. 235c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner I->eraseFromParent(); 236c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 237c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 238c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnervoid PPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 239c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner MachineBasicBlock *FBB, 240c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner const std::vector<MachineOperand> &Cond) const { 241c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Fall through? 242c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (TBB == 0 && FBB == 0) return; 243c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 244c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner assert(Cond.size() == 2 && "PPC branch conditions have two components!"); 245c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 246c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner // Conditional branch 247c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner BuildMI(&MBB, PPC::COND_BRANCH, 3) 248c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner .addReg(Cond[0].getReg()).addImm(Cond[1].getImm()).addMBB(TBB); 249c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 250c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner if (FBB) // Two-way branch. 251c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner BuildMI(&MBB, PPC::B, 1).addMBB(FBB); 252c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 253c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner 254c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattnerbool PPCInstrInfo:: 255c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris LattnerReverseBranchCondition(std::vector<MachineOperand> &Cond) const { 256c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner return true; 257c50e2bcdf7bff1f9681ab80e52691f274950fab5Chris Lattner} 258