| 255f89faee13dc491cb64fbeae3c763e7e2ea4e6 |
|
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Sort the #include lines for the include/... tree with the script.
AKA: Recompile *ALL* the source code!
This one went much better. No manual edits here. I spot-checked for
silliness and grep-checked for really broken edits and everything seemed
good. It all still compiles. Yell if you see something that looks goofy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a9fa4fd9736f7d1066223f32fa54efbe86c0fceb |
|
28-Nov-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove all references to TargetInstrInfoImpl.
This class has been merged into its super-class TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168760 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| fa2d98632c77e5d9c305e97e5fa25d06f579127b |
|
28-Nov-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move the guts of TargetInstrInfoImpl into the TargetInstrInfo class.
The *Impl class no longer serves a purpose now that the super-class
implementation is in CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 1358841e91695bd0e498c02d064c480dc53c566a |
|
16-Nov-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Work around a layering violation from Target to CodeGen.
Technically this is still a layering violation but it's header-only which makes
it less harmful. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168173 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a7d2d564d918a9cb9105d3b2b4176b45af36a20e |
|
12-Nov-2012 |
Andrew Trick <atrick@apple.com> |
misched: rename interfaceto avoid gcc warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6996fd0b543cf8bd4a0d4e09e80a168f0ae052c5 |
|
12-Nov-2012 |
Andrew Trick <atrick@apple.com> |
misched: Target-independent support for MacroFusion.
Uses the infrastructure from r167742 to support clustering instructure
that the target processor can "fuse". e.g. cmp+jmp.
Next step: target hook implementations with test cases, and enable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167744 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9b5caaa9c452f262a52dd5ac7ebbc722da5a63de |
|
12-Nov-2012 |
Andrew Trick <atrick@apple.com> |
misched: Target-independent support for load/store clustering.
This infrastructure is generally useful for any target that wants to
strongly prefer two instructions to be adjacent after scheduling.
A following checkin will add target-specific hooks with unit
tests. Then this feature will be enabled by default with misched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 412cd2f81374865dfa708bef6d5b896ca10dece0 |
|
10-Oct-2012 |
Andrew Trick <atrick@apple.com> |
misched: Use the TargetSchedModel interface wherever possible.
Allows the new machine model to be used for NumMicroOps and OutputLatency.
Allows the HazardRecognizer to be disabled along with itineraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 34301ceca8913f3126339f332d3dc6f2d7ac0d78 |
|
18-Sep-2012 |
Andrew Trick <atrick@apple.com> |
TargetSchedModel API. Implement latency lookup, disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e1b53287179b4b9b5c3c549586f688d3fa2ae8ef |
|
18-Sep-2012 |
Andrew Trick <atrick@apple.com> |
Revert r164061-r164067. Most of the new subtarget emitter.
I have to work out the Target/CodeGen header dependencies
before putting this back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 12886db4a7af74f17281695320c40248cb263f55 |
|
18-Sep-2012 |
Andrew Trick <atrick@apple.com> |
TargetSchedModel API. Implement latency lookup, disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 001d3dc976d7cda8a3dd8c7fd4020b0b96033f4e |
|
17-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b4e090dffc4bed40cee22b94560aa8dd3b4af013 |
|
30-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a bit of documentation to copyPhysReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ffd2526fa4e2d78564694b4797b96236c9ba9d85 |
|
23-Aug-2012 |
Andrew Trick <atrick@apple.com> |
Simplify the computeOperandLatency API.
The logic for recomputing latency based on a ScheduleDAG edge was
shady. This bypasses the problem by requiring the client to provide
operand indices. This ensures consistent use of the machine model's
API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f2c64ef519b38a4328809b27b4a3a8e0c26e9709 |
|
17-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an MCID::Select flag and TII hooks for optimizing selects.
Select instructions pick one of two virtual registers based on a
condition, like x86 cmov. On targets like ARM that support predication,
selects can sometimes be eliminated by predicating the instruction
defining one of the operands.
Teach PeepholeOptimizer to recognize select instructions, and ask the
target to optimize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 43600e95ec3690b37d458a6d3d56941ad84cddcb |
|
13-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the TII::scheduleTwoAddrSource() hook.
It never does anything when running 'make check', and it get's in the
way of updating live intervals in 2-addr.
The hook was originally added to help form IT blocks in Thumb2 code
before register allocation, but the pass ordering has changed since
then, and we run if-conversion after register allocation now.
When the MI scheduler is enabled, there will be no less than two
schedulers between 2-addr and Thumb2ITBlockPass, so this hook is
unlikely to help anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161794 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3c417554caedde3a333755916701c8380606342a |
|
08-Aug-2012 |
Andrew Trick <atrick@apple.com> |
Minor cleanup of defaultDefLatency API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 127eea87d666ccc9fe7025f41148c33af0f8c84b |
|
02-Aug-2012 |
Manman Ren <mren@apple.com> |
X86 Peephole: fold loads to the source register operand if possible.
Add more comments and use early returns to reduce nesting in isLoadFoldable.
Also disable folding for V_SET0 to avoid introducing a const pool entry and
a const pool load.
rdar://10554090 and rdar://11873276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161207 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d7d003c2b7b7f657eed364e4ac06f4ab32fc8c2d |
|
02-Aug-2012 |
Manman Ren <mren@apple.com> |
X86 Peephole: fold loads to the source register operand if possible.
Machine CSE and other optimizations can remove instructions so folding
is possible at peephole while not possible at ISel.
This patch is a rework of r160919 and was tested on clang self-host on my local
machine.
rdar://10554090 and rdar://11873276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161152 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e8b4a4a9d173d67e35e4b1d32e20140381db6bde |
|
29-Jul-2012 |
Manman Ren <mren@apple.com> |
Revert r160920 and r160919 due to dragonegg and clang selfhost failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0eb3edea9cb6819334173a7d288da85943201fe5 |
|
28-Jul-2012 |
Manman Ren <mren@apple.com> |
X86 Peephole: fold loads to the source register operand if possible.
Machine CSE and other optimizations can remove instructions so folding
is possible at peephole while not possible at ISel.
rdar://10554090 and rdar://11873276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 33242fd3ed5586091e73254b58dd1825e9d53c60 |
|
04-Jul-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an experimental early if-conversion pass, off by default.
This pass performs if-conversion on SSA form machine code by
speculatively executing both sides of the branch and using a cmov
instruction to select the result. This can help lower the number of
branch mispredictions on architectures like x86 that don't have
predicable instructions.
The current implementation is very aggressive, and causes regressions on
mosts tests. It needs good heuristics that have yet to be implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159694 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 218ee74a011c0d350099c452810da0bd57a15047 |
|
02-Jul-2012 |
Andrew Trick <atrick@apple.com> |
Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary."
Reapplies r159406 with minor cleanup. The regressions appear to have been spurious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| de7266c611b37ec050efb53b73166081a98cea13 |
|
29-Jun-2012 |
Manman Ren <mren@apple.com> |
Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle Compare
instructions with two register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3e4b3b9043b1ced24e07d8d1174feeee06c6912e |
|
29-Jun-2012 |
Andrew Trick <atrick@apple.com> |
Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."
This reverts commit r159406. I noticed a performance regression so I'll back out for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0d9513c74f3e4c019406273cce49e43508dc4dcf |
|
29-Jun-2012 |
Andrew Trick <atrick@apple.com> |
Make NumMicroOps a variable in the subtarget's instruction itinerary.
The TargetInstrInfo::getNumMicroOps API does not change, but soon it
will be used by MachineScheduler. Now each subtarget can specify the
number of micro-ops per itinerary class. For ARM, this is currently
always dynamic (-1), because it is used for load/store multiple which
depends on the number of register operands.
Zero is now a valid number of micro-ops. This can be used for
nop pseudo-instructions or instructions that the hardware can squash
during dispatch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 575e90e955064f60ac66230dce6c27653973c149 |
|
13-Jun-2012 |
Kay Tiong Khoo <kkhoo@perfwizard.com> |
*typo: Cyles changed to Cycles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158404 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| dddc1cf50b6dfe543f617426ac4eab55fbbdfecd |
|
09-Jun-2012 |
Andrew Trick <atrick@apple.com> |
Removing strange "using" declarations form TargetInstrInfo.
I can't imagine why these were added. Trial and error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158247 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| eb81df7d95b8923ea99c0d4741a5aabf82d1c5ab |
|
08-Jun-2012 |
Andrew Trick <atrick@apple.com> |
TargetInstrInfo hooks implemented in codegen should be declared pure virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 397f4e3583b36b23047fec06b1648f0771cd6fe3 |
|
07-Jun-2012 |
Andrew Trick <atrick@apple.com> |
Continue factoring computeOperandLatency. Use it for ARM hasHighOperandLatency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2afde7782dfa56b2e46f79598bdb5f1e09471941 |
|
07-Jun-2012 |
Manman Ren <mren@apple.com> |
Revert r157755.
The commit is intended to fix rdar://11540023.
It is implemented as part of peephole optimization. We can actually implement
this in the SelectionDAG lowering phase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b7e0289fb320c8440ba5eed121a8b932dbd806a2 |
|
05-Jun-2012 |
Andrew Trick <atrick@apple.com> |
misched: API for minimum vs. expected latency.
Minimum latency determines per-cycle scheduling groups.
Expected latency determines critical path and cost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 91c5346d91973a1d3458a20f8c6b0e899b732e38 |
|
31-May-2012 |
Manman Ren <mren@apple.com> |
X86: replace SUB with CMP if possible
This patch will optimize the following
movq %rdi, %rax
subq %rsi, %rax
cmovsq %rsi, %rdi
movq %rdi, %rax
to
cmpq %rsi, %rdi
cmovsq %rsi, %rdi
movq %rdi, %rax
Perform this optimization if the actual result of SUB is not used.
rdar: 11540023
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0a39d4e4c86540d7c89f6dbe511b70466e132715 |
|
25-May-2012 |
Andrew Trick <atrick@apple.com> |
misched: Added ScoreboardHazardRecognizer.
The Hazard checker implements in-order contraints, or interlocked
resources. Ready instructions with hazards do not enter the available
queue and are not visible to other heuristics.
The major code change is the addition of SchedBoundary to encapsulate
the state at the top or bottom of the schedule, including both a
pending and available queue.
The scheduler now counts cycles in sync with the hazard checker. These
are minimum cycle counts based on known hazards.
Targets with no itinerary (x86_64) currently remain at cycle 0. To fix
this, we need to provide some maximum issue width for all targets. We
also need to add the concept of expected latency vs. minimum latency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157427 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 397fc4874efe9c17e737d4c5c50bd19dc3bf27f5 |
|
08-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().
The getPointerRegClass() hook can return register classes that depend on
the calling convention of the current function (ptr_rc_tailcall).
So far, we have been able to infer the calling convention from the
subtarget alone, but as we add support for multiple calling conventions
per target, that no longer works.
Patch by Yiannis Tsiouris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 50bee42b54cd9aec5f49566307df2b0cf23afcf6 |
|
05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ee498d3254b86bceb4f441741e9f442990647ce6 |
|
01-Feb-2012 |
Andrew Trick <atrick@apple.com> |
VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.
Patch by Sergei Larin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8787c5f24e175a36f645784d533384f9f7cd86fc |
|
19-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add a if-conversion optimization that allows 'true' side of a diamond to be
unpredicated. That is, turn
subeq r0, r1, #1
addne r0, r1, #1
into
sub r0, r1, #1
addne r0, r1, #1
For targets where conditional instructions are always executed, this may be
beneficial. It may remove pseudo anti-dependency in out-of-order execution
CPUs. e.g.
op r1, ...
str r1, [r10] ; end-of-life of r1 as div result
cmp r0, #65
movne r1, #44 ; raw dependency on previous r1
moveq r1, #12
If movne is unpredicated, then
op r1, ...
str r1, [r10]
cmp r0, #65
mov r1, #44 ; r1 written unconditionally
moveq r1, #12
Both mov and moveq are no longer depdendent on the first instruction. This gives
the out-of-order execution engine more freedom to reorder them.
This has passed entire LLVM test suite. But it has not been enabled for any ARM
variant pending more performance evaluation.
rdar://8951196
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146914 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 638905d90cf8e2601b5609e549e3fca6676fff10 |
|
19-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add "using" to silence warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146913 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 1e2ec6abd4e150ac87d6cde3133fa9895f63c74c |
|
19-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Attempt to fix PR11607 by shuffling around which class defines which methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146897 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 020f4106f820648fd7e91956859844a80de13974 |
|
14-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Model ARM predicated write as read-mod-write. e.g.
r0 = mov #0
r0 = moveq #1
Then the second instruction has an implicit data dependency on the first
instruction. Sadly I have yet to come up with a small test case that
demonstrate the post-ra scheduler taking advantage of this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 12dfdb424ddcfabb347f168f9332795ba443ccd3 |
|
14-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Allow target to specify register output dependency. Still default to one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 32f9763017f4329a0da75648655d63c9d7b91130 |
|
09-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move isUnpredicatedTerminator() default implementation to TargetInstrInfoImpl to break Target's dependency on CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146247 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c2ecf3efbf375fc82bb1cea6afd7448498f9ae75 |
|
15-Nov-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Break false dependencies before partial register updates.
Two new TargetInstrInfo hooks lets the target tell ExecutionDepsFix
about instructions with partial register updates causing false unwanted
dependencies.
The ExecutionDepsFix pass will break the false dependencies if the
updated register was written in the previoius N instructions.
The small loop added to sse-domains.ll runs twice as fast with
dependency-breaking instructions inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144602 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 92fb79b7a611ab4c1043f04e8acd08f963d073ad |
|
29-Sep-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Expand the x86 V_SET0* pseudos right after register allocation.
This also makes it possible to reduce the number of pseudo instructions
and get rid of the encoding information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140776 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 98e933f9ad3cc2ede3a0a337144a504265d614cd |
|
28-Sep-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Promote the X86 Get/SetSSEDomain functions to TargetInstrInfo.
I am going to unify the SSEDomainFix and NEONMoveFix passes into a
single target independent pass. They are essentially doing the same
thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140652 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c291e2f5780c3a8470113a2a58c1fa680cd54b20 |
|
25-Sep-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add target hook for pseudo instruction expansion.
Many targets use pseudo instructions to help register allocation. Like
the COPY instruction, these pseudos can be expanded after register
allocation. The early expansion can make life easier for PEI and the
post-ra scheduler.
This patch adds a hook that is called for all remaining pseudo
instructions from the ExpandPostRAPseudos pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140472 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3be654f8082dcbdff011a6716a7c90486e28fc9e |
|
21-Sep-2011 |
Andrew Trick <atrick@apple.com> |
Lower ARM adds/subs to add/sub after adding optional CPSR operand.
This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140228 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2df3f58a0b3937f2cbd76d3417d2905ca86cf8fa |
|
08-Aug-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Hoist hasLoadFromStackSlot and hasStoreToStackSlot.
These the methods are target-independent since they simply scan the
memory operands. They can live in TargetInstrInfoImpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f81b7f6069b27c0a515070dcb392f6828437412f |
|
10-Jul-2011 |
Jakub Staszak <jstaszak@apple.com> |
Use BranchProbability instead of floating points in IfConverter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134858 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4db3cffe94a5285239cc0056f939c6b74a5ca0b6 |
|
01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Hide the call to InitMCInstrInfo into tblgen generated ctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a01b58af85cebd7d7bcf94d48317f8cc8a4bdf57 |
|
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Unbreak every backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134031 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d5b03f252c0db6b49a242abab63d7c5a260fceae |
|
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e837dead3c8dc3445ef6a0e2322179c57e264a13 |
|
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 15993f83a419950f06d2879d6701530ae6449317 |
|
27-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133944 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 7a2bdde0a0eebcd2125055e0eacaca040f0b766c |
|
15-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ece96f5713e14b705d415eb95fe57c5fff841626 |
|
05-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Missing "virtual" keyword. Jakob's review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127070 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e0ef509aeb47b396cf1bdc170ca4f468f799719f |
|
05-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Increased the register pressure limit on x86_64 from 8 to 12
regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.
Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.
Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4 |
|
21-Jan-2011 |
Andrew Trick <atrick@apple.com> |
Convert -enable-sched-cycles and -enable-sched-hazard to -disable
flags. They are still not enable in this revision.
Added TargetInstrInfo::isZeroCost() to fix a fundamental problem with
the scheduler's model of operand latency in the selection DAG.
Generalized unit tests to work with sched-cycles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9fe2009956fc40f3aea46fb3c38dcfb61c4aca46 |
|
20-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sorry, several patches in one.
TargetInstrInfo:
Change produceSameValue() to take MachineRegisterInfo as an optional argument.
When in SSA form, targets can use it to make more aggressive equality analysis.
Machine LICM:
1. Eliminate isLoadFromConstantMemory, use MI.isInvariantLoad instead.
2. Fix a bug which prevent CSE of instructions which are not re-materializable.
3. Use improved form of produceSameValue.
ARM:
1. Teach ARM produceSameValue to look pass some PIC labels.
2. Look for operands from different loads of different constant pool entries
which have same values.
3. Re-implement PIC GA materialization using movw + movt. Combine the pair with
a "add pc" or "ldr [pc]" to form pseudo instructions. This makes it possible
to re-materialize the instruction, allow machine LICM to hoist the set of
instructions out of the loop and make it possible to CSE them. It's a bit
hacky, but it significantly improve code quality.
4. Some minor bug fixes as well.
With the fixes, using movw + movt to materialize GAs significantly outperform the
load from constantpool method. 186.crafty and 255.vortex improved > 20%, 254.gap
and 176.gcc ~10%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123905 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2da8bc8a5f7705ac131184cd247f48500da0d74e |
|
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6e8f4c404825b79f9b9176483653f1aa927dfbde |
|
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| cd775ceff0b25a0b026f643a7990c2924bd310a3 |
|
28-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move callee-saved regs spills / reloads to TFI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120228 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c4af4638dfdab0dc3b6257276cfad2ee45053060 |
|
17-Nov-2010 |
Evan Cheng <evan.cheng@apple.com> |
Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,
and xor. The 32-bit move immediates can be hoisted out of loops by machine
LICM but the isel hacks were preventing them.
Instead, let peephole optimization pass recognize registers that are defined by
immediates and the ARM target hook will fold the immediates in.
Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ
instructions if there are multiple uses. This happens when the 'and' is live
out, machine sink would have sinked the computation and that ends up pessimizing
code. The peephole pass would recognize situations where the 'and' can be
toggled to define CPSR and eliminate the comparison anyway.
2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking
important optimizations.
rdar://8663787, rdar://8241368
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119548 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| eb96a2f6c03c0ec97c56a3493ac38024afacc774 |
|
15-Nov-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code clean up. The peephole pass should be the one updating the instruction
iterator, not TII->OptimizeCompareInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119186 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8239daf7c83a65a189c352cce3191cdc3bbfe151 |
|
03-Nov-2010 |
Evan Cheng <evan.cheng@apple.com> |
Two sets of changes. Sorry they are intermingled.
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
"optimize for latency". Call instructions don't have the right latency and
this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
not # of micro-ops since multi-latency instructions is completely executed
even when the predicate is false. Also, some instruction will be "slower"
when they are predicated due to the register def becoming implicit input.
rdar://8598427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c8141dfc7f983cb04e65d8acd6bcbdc8e4b8a0ae |
|
26-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Use instruction itinerary to determine what instructions are 'cheap'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2312842de0c641107dd04d7e056d02491cc781ca |
|
19-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-enable register pressure aware machine licm with fixes. Hoist() may have
erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 98694138025fdb0cec0cda5727201ad00ded3d63 |
|
19-Oct-2010 |
Daniel Dunbar <daniel@zuster.org> |
Revert r116781 "- Add a hook for target to determine whether an instruction def
is", which breaks some nightly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116816 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 11e8b74a7ae9ecd59b64180a59143e39bc3b9514 |
|
19-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Add a hook for target to determine whether an instruction def is
"long latency" enough to hoist even if it may increase spilling. Reloading
a value from spill slot is often cheaper than performing an expensive
computation in the loop. For X86, that means machine LICM will hoist
SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
instructions.
- Enable register pressure aware machine LICM by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116781 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b41ee96d76ccf1eec2fd898def4cfd7c16868708 |
|
18-Oct-2010 |
Bill Wendling <isanbard@gmail.com> |
Don't recompute MachineRegisterInfo in the Optimize* method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116750 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a0792de66c8364d47b0a688c7f408efb7b10f31b |
|
06-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
allow target to correctly compute latency for cases where static scheduling
itineraries isn't sufficient. e.g. variable_ops instructions such as
ARM::ldm.
This also allows target without scheduling itineraries to compute operand
latencies. e.g. X86 can return (approximated) latencies for high latency
instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
e.g. ldm and those used by store multiple instructions, e.g. stm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e3cc84a43d6a4bb6c50f58f3dd8e60e28787509e |
|
02-Oct-2010 |
Owen Anderson <resistor@mac.com> |
Thread the determination of branch prediction hit rates back through the if-conversion heuristic APIs. For now,
stick with a constant estimate of 90% (branch predictors are good!), but we might find that we want to provide
more nuanced estimates in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115364 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b20b85168c0e9819e6545f08281e9b83c82108f0 |
|
28-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Part one of switching to using a more sane heuristic for determining if-conversion profitability.
Rather than having arbitrary cutoffs, actually try to cost model the conversion.
For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114973 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 04ac81d5db058a3a9492e1aff1f398a8643bfda9 |
|
21-Sep-2010 |
Gabor Greif <ggreif@gmail.com> |
Move the search for the appropriate AND instruction
into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114428 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a65568676d0d9d53dd4aae8f1c58271bb4cfff10 |
|
11-Sep-2010 |
Bill Wendling <isanbard@gmail.com> |
Rename ConvertToSetZeroFlag to something more general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3665661a5708c8adc2727be38b56d1d87ddeb661 |
|
11-Sep-2010 |
Bill Wendling <isanbard@gmail.com> |
No need to recompute the SrcReg and CmpValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113666 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 92ad57f066e9f256e4e3d72febf152e68caa80c7 |
|
11-Sep-2010 |
Bill Wendling <isanbard@gmail.com> |
Move some of the decision logic for converting an instruction into one that sets
the 'zero' bit down into the back-end. There are other cases where this logic
isn't sufficient, so they should be handled separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 220e240bdf3235252c2a1fc8fcc5d4b8e8117918 |
|
10-Sep-2010 |
Bill Wendling <isanbard@gmail.com> |
Modify the comparison optimizations in the peephole optimizer to update the
iterator when an optimization took place. This allows us to do more insane
things with the code than just remove an instruction or two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1 |
|
10-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5f54ce347368105260be2cec497b6a4199dc5789 |
|
09-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
For each instruction itinerary class, specify the number of micro-ops each
instruction in the class would be decoded to. Or zero if the number of
uOPs must be determined dynamically.
This will be used to determine the cost-effectiveness of predicating a
micro-coded instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c98af3370f899a0d1570b1dff01a2e36632f884f |
|
08-Aug-2010 |
Bill Wendling <isanbard@gmail.com> |
Use the "isCompare" machine instruction attribute instead of calling the
relatively expensive comparison analyzer on each instruction. Also rename the
comparison analyzer method to something more in line with what it actually does.
This pass is will eventually be folded into the Machine CSE pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e4ddbdfd3cf031034020671d03626f0373fbd5ca |
|
06-Aug-2010 |
Bill Wendling <isanbard@gmail.com> |
Add the Optimize Compares pass (disabled by default).
This pass tries to remove comparison instructions when possible. For instance,
if you have this code:
sub r1, 1
cmp r1, 0
bz L1
and "sub" either sets the same flag as the "cmp" instruction or could be
converted to set the same flag, then we can eliminate the "cmp" instruction all
together. This is a important for ARM where the ALU instructions could set the
CPSR flag, but need a special suffix ('s') to do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110423 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2062875a7d8f7dd94a20d9e3a298e9e216efb4b5 |
|
22-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the TargetInstrInfo::GetInstSizeInBytes hook.
ARM/PPC/MSP430-specific code (which are the only targets that
implement the hook) can directly reference their target-specific
instrinfo classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109171 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 134d8eec8789184c7a7290ee101ca3d6f62f384a |
|
22-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
remove the JIT "NeedsExactSize" feature and supporting logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109167 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 78e6e009223a38739797629ca2d217acf86dda93 |
|
17-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the isMoveInstr() hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| af462c4b4f59429d993b10607a0c31deb8a8156f |
|
16-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove remaining calls to TII::isMoveInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108556 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5a3eb8f0e1141825634be38165e40871ce60b3d5 |
|
15-Jul-2010 |
Eric Christopher <echristo@apple.com> |
80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 744b3a5acdbd4d0fac9c6a7c9ad702502cc3cc37 |
|
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove TargetInstrInfo::copyRegToReg entirely.
Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no
longer a default implementation forwarding to copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b0a258be2f154e83ef6ffe5f2437aa648a1279ca |
|
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove copyRegToReg from TargetInstrInfo so it is not longer accesible.
Use a COPY instruction instead for register copies, or TII::copyPhysReg() after
COPY instructions are lowered.
Targets should implement copyPhysReg instead of copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 1f32340d95ac480bfc74bcfd00fd5cffbe078652 |
|
09-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Automatically fold COPY instructions into stack load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e05442d50806e2850eae1571958816028093df85 |
|
09-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Change TII::foldMemoryOperand API to require the machine instruction to be
inserted in a MBB, and return an already inserted MI.
This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.
The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0bc25f40402f48ba42fc45403f635b20d90fabb3 |
|
08-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.
Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3651d92d91062ea4b1ee8b2a88eca03bd39e1968 |
|
08-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add TargetInstrInfo::copyPhysReg hook and use it from LowerSubregs.
This target hook is intended to replace copyRegToReg entirely, but for now it
calls copyRegToReg.
Any remaining calls to copyRegToReg wil be replaced by COPY instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 13151432edace19ee867a93b5c14573df4f75d24 |
|
26-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Change if-conversion block size limit checks to add some flexibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f0e1b8942157f4344cce36e98c7dabb230d52bf8 |
|
24-Jun-2010 |
Bob Wilson <bob.wilson@apple.com> |
Edit and clarify comments for TargetInstrInfo methods:
None of the existing implementations of commuteInstruction create new
instructions unless the NewMI parameter is true, but the comment had
implied otherwise.
findCommutedOpIndices returns false, not true, when it doesn't know
how to commute the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4d54e5b2dd4a3d3bed38ff9c7aa57fc66adb5855 |
|
22-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Tail merging pass shall not break up IT blocks. rdar://8115404
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 86050dc8cc0aaea8c9dfeb89de02cafbd7f48d92 |
|
19-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow ARM if-converter to be run after post allocation scheduling.
- This fixed a number of bugs in if-converter, tail merging, and post-allocation
scheduler. If-converter now runs branch folding / tail merging first to
maximize if-conversion opportunities.
- Also changed the t2IT instruction slightly. It now defines the ITSTATE
register which is read by instructions in the IT block.
- Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
change the instruction ordering in the IT block (since IT mask has been
finalized). It also ensures no other instructions can be scheduled between
instructions in the IT block.
This is not yet enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3bf912593301152b65accb9d9c37a95172f1df5a |
|
18-Jun-2010 |
Stuart Hastings <stuart@apple.com> |
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 729aab3dd3a6ea5ca23430936270154090fcc10b |
|
12-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow target to provide its own hazard recognizer to post-ra scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105862 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 68fc2daf8fa446be04d2ed2b3cbb1b00c382458f |
|
09-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow target to place 2-address pass inserted copies in better spots. Thumb2 will use this to try to avoid breaking up IT blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9edf7deb37f0f97664f279040fa15d89f32e23d9 |
|
03-Jun-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Slightly change the meaning of the reMaterialize target hook when the original
instruction defines subregisters.
Any existing subreg indices on the original instruction are preserved or
composed with the new subreg index.
Also substitute multiple operands mentioning the original register by using the
new MachineInstr::substituteRegister() function. This is necessary because there
will soon be <imp-def> operands added to non read-modify-write partial
definitions. This instruction:
%reg1234:foo = FLAP %reg1234<imp-def>
will reMaterialize(%reg3333, bar) like this:
%reg3333:bar-foo = FLAP %reg333:bar<imp-def>
Finally, replace the TargetRegisterInfo pointer argument with a reference to
indicate that it cannot be NULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2457f2c66184e978d4ed8fa9e2128effff26cb0b |
|
22-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Implement @llvm.returnaddress. rdar://8015977.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556 |
|
06-May-2010 |
Dan Gohman <gohman@apple.com> |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 746ad69e088176819981b4b2c5ac8dcd49f5e60e |
|
06-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8601a3d4decff0a380e059b037dabf71075497d3 |
|
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Frame index can be negative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102577 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ee9eb411fffddbb8fe70418c05946a131889b487 |
|
27-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
on darwin empty functions need to codegen into something of non-zero length,
otherwise labels get incorrectly merged. We handled this by emitting a
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes. Handle this by emitting a noop. This
is more gross than it should be because arm/ppc are not fully mc'ized yet.
This fixes rdar://7908505
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| efc3a6348addd7c9158348fa01f4602e0e0b1688 |
|
26-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Add PPC AsmPrinter handling for target-specific form of
DBG_VALUE, and a cautionary comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102371 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 962021bc7f6721c20c7dfe8ca809e2d98b1c554a |
|
26-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102323 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2dbc8bdfe9191c2078daccbeefba9e69a690feb6 |
|
08-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 506049f29f4f202a8e45feb916cc0264440a7f6d |
|
03-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality.
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 518bb53485df640d7b7e3f6b0544099020c42aa7 |
|
09-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 96dc115ef3ee019cb91d7c112358a77536c38a53 |
|
22-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add two target hooks to determine whether two loads are near and should be scheduled together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 243a32f96b364811e2f9feadecfefb21b640321f |
|
15-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Remove DEBUG_DECLARE, looks like we don't need it.
Also, DEBUG_VALUE has side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93498 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 7da9ecf9677b751d81515f95168ae3cb2df54160 |
|
13-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93278 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a5a81d70720a4ce6ac7538927c2a874b0dfa8bd2 |
|
12-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add TargetInstrInfo::isCoalescableInstr. It returns true if the specified
instruction is copy like where the source and destination registers can
overlap. This is to be used by the coalescable to coalesce the source and
destination registers of instructions like X86::MOVSX64rr32. Apparently
some crazy people believe the coalescer is too simple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93210 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d2035203a0359eedbc1cf4ae77d43176e8455cd4 |
|
09-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Add DEBUG_DECLARE. Not used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 87563b39370d7adfd42b0f531409ff9bc2bfcc56 |
|
09-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Add DEBUG_VALUE. Not used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93030 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d1862037f04954f00cd6e6066ee213cfdc292877 |
|
07-Jan-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92883 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 30ac0467ced4627a9b84d8a1d3ca5e8706ddad63 |
|
07-Jan-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add Target hook to duplicate machine instructions.
Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92873 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 85de1e5bade2f3755e47ed6fd43c92fcf99ff08b |
|
14-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Whitespace changes, comment clarification. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 864e2efce2cb5d02e376933933d96074723fe77c |
|
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 63be493b52e3558f2c579fef78d194c76c99eb8b |
|
05-Dec-2009 |
David Greene <greened@obbligato.org> |
Remove an unneeded include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90627 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 03c8406fc19658a3a8dc8ee00fddc88160038683 |
|
05-Dec-2009 |
David Greene <greened@obbligato.org> |
Fix a bad merge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90616 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5e3363255912c559e8251121491a2a9e901f07ac |
|
05-Dec-2009 |
David Greene <greened@obbligato.org> |
Update the TargetInstrInfo interfaces so hasLoad/StoreFrom/ToStackSlot
can return a MachineMemOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90615 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 15217e63bce6c161b355b63d6496c7c327d15817 |
|
30-Nov-2009 |
Bob Wilson <bob.wilson@apple.com> |
Remove isProfitableToDuplicateIndirectBranch target hook. It is profitable
for all the processors where I have tried it, and even when it might not help
performance, the cost is quite low. The opportunities for duplicating
indirect branches are limited by other factors so code size does not change
much due to tail duplicating indirect branches aggressively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90144 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f8c4cfb7cc330234112e1378dac6424d9956add0 |
|
25-Nov-2009 |
Bob Wilson <bob.wilson@apple.com> |
Refactor target hook for tail duplication as requested by Chris.
Make tail duplication of indirect branches much more aggressive (for targets
that indicate that it is profitable), based on further experience with
this transformation. I compiled 3 large applications with and without
this more aggressive tail duplication and measured minimal changes in code
size. ("size" on Darwin seems to round the text size up to the nearest
page boundary, so I can only say that any code size increase was less than
one 4k page.) Radar 7421267.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89814 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e54cb16308ad40d0f0b257de47efaa0ee5a47004 |
|
21-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
Allow target to disable if-converting predicable instructions. e.g. NEON instructions under ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 834b08af8d3d8fc6c76ac6ca40674565689e8d7f |
|
18-Nov-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add a target hook to allow changing the tail duplication limit based on the
contents of the block to be duplicated. Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89187 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d57cdd5683ea926e489067364fb7ffe5fd5d35ee |
|
14-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.
- If destination is a physical register and it has a subreg index, use the
sub-register instead.
This fixes PR5423.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| dda3978d7877d2d60390833c73ed24857295e89c |
|
13-Nov-2009 |
David Greene <greened@obbligato.org> |
Fix a bootstrap failure.
Provide special isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE
interfaces to explicitly request checking for post-frame ptr elimination
operands. This uses a heuristic so it isn't reliable for correctness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b87bc95db075dae3033a3c541b55b4cb711c332c |
|
12-Nov-2009 |
David Greene <greened@obbligato.org> |
Add hasLoadFromStackSlot and hasStoreToStackSlot to return whether a
machine instruction loads or stores from/to a stack slot. Unlike
isLoadFromStackSlot and isStoreFromStackSlot, the instruction may be
something other than a pure load/store (e.g. it may be an arithmetic
operation with a memory operand). This helps AsmPrinter determine when
to print a spill/reload comment.
This is only a hint since we may not be able to figure this out in all
cases. As such, it should not be relied upon for correctness.
Implement for X86. Return false by default for other architectures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 12749db1503c2beed58ddcfba5f1b323611fb2ce |
|
07-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
Missed this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0115e164bad632572e2cfbaf72f0f0882d5319de |
|
30-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Fix MachineLICM to use the correct virtual register class when
unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a5dc45e3c8fa26e62b187284a240adf3879b56e2 |
|
26-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
- Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and
bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
common for targets to operate on registers where the top bits are undef. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
= d0
When the insert_subreg is eliminated by the coalescer, the scavenger used to
complain. The previous fix was to keep to insert_subreg around. But that's
brittle and it's overly conservative when we want to use the scavenger to
allocate registers. It's actually legal and desirable for other instructions
to use the "undef" part of d0. e.g.
s0 =
d0 = insert_subreg d0<undef>, s0, 1
...
s1 =
= s1
= d0
We probably need add a "partial-undef" marker on machine operand so the
machine verifier would not complain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85091 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f5fe5e4e79689933ae9da99e5b62fc661e5421dd |
|
25-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add isIdentityCopy to check for identity copy (or extract_subreg, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c9dfeb1be841045427d71b85e95ac7355b64e8b1 |
|
24-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Identity copies should not contribute to spill weight.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3a6b9eb868f579b945aa8ec8fadf65e4dd913555 |
|
12-Oct-2009 |
Dale Johannesen <dalej@apple.com> |
Revert the kludge in 76703. I got a clean
bootstrap of FSF-style PPC, so there is some
reason to believe the original bug (which was
never analyzed) has been fixed, probably by
82266.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3731bc026cc6c4fb7deb7ac67e2c3be0c22498be |
|
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Replace X86's CanRematLoadWithDispOperand by calling the target-independent
MachineInstr::isInvariantLoad instead, which has the benefit of being
more complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83696 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a70dca156fa76d452f54829b5c5f962ddfd94ef2 |
|
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Factor out LiveIntervalAnalysis' code to determine whether an instruction
is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.
This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e33f44cfc547359bc28526e4c5e1852b600b4448 |
|
07-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Replace TargetInstrInfo::isInvariantLoad and its target-specific
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 26207e5bf1123a793bd9b38bcda2f569a6b45ef2 |
|
28-Sep-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Introduce the TargetInstrInfo::KILL machine instruction and get rid of the
unused DECLARE instruction.
KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 33adcfb4d217f5f23d9bde8ba02b8e48f9605fc5 |
|
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
rename TAI -> MAI, being careful not to make MAILJMP instructions :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79777 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| af76e592c7f9deff0e55c13dbb4a34f07f1c7f64 |
|
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 24f20e083280d979e8fa1bc88959ae9e8339ee99 |
|
22-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Record variable debug info at ISel time directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a5595b02daae4641f7120b44ef05ba9c494bb461 |
|
20-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Reword a few comments for AnalyzeBranch and InsertBranch, and fix
a few typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d90183d25dcbc0eabde56319fed4e8d6ace2e6eb |
|
02-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Move the getInlineAsmLength virtual method from TAI to TII, where
the only real caller (GetFunctionSizeInBytes) uses it.
The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain. It should be removed
IMNSHO, but I'll leave that to ARMish folks to decide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b6bbfebdc683a6a123410bca1175e14d264d4bc2 |
|
02-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
move a virtual method body to its .cpp file to avoid a #include
in a header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77874 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2a3868849438a0a0ad4f9a50f2b94eb1639b554e |
|
29-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
inline the global 'getInstrOperandRegClass' function into its callers
now that TargetOperandInfo does the heavy lifting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77508 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 23ed52752bb40a9085c9d36bbc6603972c3e0080 |
|
24-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove unused member functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| fc6ad402fb267cba1625801444aad30da43d383a |
|
22-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Let each target determines whether a machine instruction is dead. If true, that allows late codeine passes to delete it.
This is considered a workaround. The problem is some targets are not modeling side effects correctly. PPC is apparently one of those. This patch allows ppc llvm-gcc to bootstrap on Darwin. Once we find out which instruction definitions are wrong, we can remove the PPCInstrInfo workaround.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 378445303b10b092a898a75131141a8259cff50b |
|
16-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Let callers decide the sub-register index on the def operand of rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c23197a26f34f559ea9797de51e187087c039c42 |
|
14-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c25e7581b9b8088910da31702d4ca21c4734c6d7 |
|
11-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 261ce1d5f89155d2e6f914f281db2004c89ee839 |
|
10-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Remove TargetInstrInfo::CommuteChangesDestination and added findCommutedOpIndices which returns the operand indices which are swapped (when applicable). This allows for some code clean up and future enhancements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d923fc621ff5b5e500977edf9236c9e34e8d7ebc |
|
05-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c781a243a3d17e7e763515794168d8fa6043f565 |
|
03-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.
VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.
Not yet enabled. This is part 1. More coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70787 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 88c7af096b09ad26cbcebfdf40151e04094b7460 |
|
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f8c7394781f7cf27ac52ca087e289436d36844da |
|
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
This will be used to replace things like X86's MOV32to32_.
Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.
Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 73099b105869f02ece79c2cea982286744635c4a |
|
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add comments to INSERT_SUBREG, EXTRACT_SURBEG, SUBREG_TO_REG,
and IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68949 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c1c9d7e6a95e2090d74f271209fc9337e74ab9bf |
|
19-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Describe tail merging's use of InsertBranch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65062 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| dc54d317e7a381ef8e4aca80d54ad1466bb85dda |
|
09-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 770bcc7b15adbc978800db70dbb1c3c22913b52c |
|
06-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4350eb86a7cdc83fa6a5f4819a7f0534ace5cd58 |
|
06-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 04ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1 |
|
20-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2b00aebda9705b7d76e90e632a5de511e59c739d |
|
15-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61035 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c54baa2d43730f1804acfb4f4e738fba72f966bd |
|
03-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Split foldMemoryOperand into public non-virtual and protected virtual
parts, and add target-independent code to add/preserve
MachineMemOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2 |
|
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add more const qualifiers. This fixes build breakage from r59540.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 23066288fdf4867f53f208f9aaf2952b1c049394 |
|
27-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58230 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 95a3f0d99e9551404c217f62d0991b922ead22a9 |
|
26-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add storeRegTo{StackSlot|Addr} and loadRegFrom{StackSlot|Addr} descriptions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8c8b2a89f9173aaa06e91ff43c3a46276f23b355 |
|
20-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8e8b8a223c2b0e69f44c0639f846260c8011668f |
|
16-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Const-ify several TargetInstrInfo methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a6548d0f29d848ce5e2c10ebd6aae196ce3d8651 |
|
13-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
Clarify meaning of copyRegToReg's return value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57449 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c93457053cfecb24105ee3800c8e53921b950d8f |
|
26-Aug-2008 |
Cedric Venet <cedric.venet@laposte.net> |
- small bug corrected: incorrect iterator type.
- fix to please VS: add a return after an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 940f83e772ca2007d62faffc83094bd7e8da6401 |
|
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 44eb65cf58e3ab9b5621ce72256d1621a18aeed7 |
|
15-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 61e804f22bde414b2e8a8da22daf575a7e8ad816 |
|
16-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Clarify the comments here, to make slightly more clear the
difference in purpose of TargetInstrInfo and TargetInstrDesc,
which isn't immediately obvious from the name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53683 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f660c171c838793b87b7e58e91609cecf256378d |
|
03-Jul-2008 |
Owen Anderson <resistor@mac.com> |
Make LiveVariables even more optional, by making it optional in the call to TargetInstrInfo::convertToThreeAddressInstruction
Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53058 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4406604047423576e36657c7ede266ca42e79642 |
|
01-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 58dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6 |
|
16-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add option to commuteInstruction() which forces it to create a new (commuted) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9f8fea3531f8f8d04d1e183ff570be37d41d13f5 |
|
12-May-2008 |
Bill Wendling <isanbard@gmail.com> |
Constify the machine instruction passed into the
"is{Trivially,Really}ReMaterializable" methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 52e724ad7e679ee590f4bd763d55280586a8f1bc |
|
16-Apr-2008 |
Nicolas Geoffray <nicolas.geoffray@lip6.fr> |
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ca1267c02b025cc719190b05f9e1a5d174a9caf7 |
|
31-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c9298235251b014e86a7368d92b589d093acb64a |
|
16-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| da47e6e0d003c873da960361549e57ee4617c301 |
|
15-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6634e26aa11b0e2eabde8b3b463bb943364f8d9d |
|
13-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f20db159541bf27f5d2fdf8d4ba1c8b270b936df |
|
15-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Added CommuteChangesDestination(). This returns true if commuting the specified
machine instr will change its definition register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47166 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5fd79d0560570fed977788a86fa038b898564dfa |
|
08-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a844bdeab31ef04221e7ef59a8467893584cc14d |
|
02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a22edc82cab86be4cb8876da1e6e78f82bb47a3e |
|
11-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Simplify the side effect stuff a bit more and make licm/sinking
both work right according to the new flags.
This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad.
It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags. Now the clients
can decide everything they need.
I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45843 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d3f99e2bbf5e62261c8948127aacfe9a7d3b2456 |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
split TargetInstrDesc out into its own header file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45696 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 749c6f6b5ed301c84aac562e414486549d7b98eb |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 682b8aed0779ac0c9a6a13d79ccc1cff3e9730cf |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
remove a dead method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45694 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0ff23966feb90618bec4d085095ffbc28426e691 |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Rename all the M_* flags to be namespace qualified enums, and switch
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e32d765f99f7ee0b8f50e419a2e1beb41003c99f |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
add more and significantly better comments to the rest of the machineinstr
flags that can be set. Add predicates for the ones lacking it, and switch
some clients over to using the predicates instead of Flags directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45690 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 13cea0bcefa892b6b73c39fd4d30d8bb42392e1f |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
add some mroe comments, add a isImplicitDef() method, add
isConditionalBranch() and isUnconditionalBranch() methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8f707e15fbd09ca948b86419bcb0c92470827ac9 |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename hasVariableOperands() -> isVariadic(). Add some comments.
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4764189298b17432f79f01f4b707fc0a0ba33a3c |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Move M_* flags down in the file. Move SchedClass up in the
TargetInstrDescriptor class and shrink to 16-bits, saving a
word in TargetInstrDescriptor. Add some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45686 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 349c4952009525b27383e2120a6b3c998f39bd09 |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45680 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| cc8cd0cbf12c12916d4b38ef0de5be5501c8270e |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
remove MachineOpCode typedef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ba6da5d5b72618c836ebc3a7613583a16bc8ceac |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
remove some uses of MachineOpCode, move getSchedClass
into TargetInstrDescriptor from TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8ca5c67c6e95fdcf5ddb2f06586873c843dd0cde |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Add predicates methods to TargetOperandInfo, and switch all clients
over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 69244300b8a0112efb44b6273ecea4ca6264b8cf |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 43dbe05279b753aabda571d9c83eaeb36987001a |
|
07-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move even more functionality from MRegisterInfo into TargetInstrInfo.
Some day I'll get it all moved over...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 834f1ce0312e3d00d836f9560cb63182c2c4570f |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2e48a70b35635165703838fc8d3796b664207aa1 |
|
06-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename isStore -> mayStore to more accurately reflect what it captures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8ed9c1a6d92083102867d0886dc0b6ed0fb05461 |
|
06-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
describe isStore and simplify the implementation of hasUnmodelledSideEffects.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45651 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d94b6a16fec7d5021e3922b0e34f9ddb268d54b1 |
|
05-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move some more functionality from MRegisterInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f6372aa1cc568df19da7c5023e83c75aa9404a07 |
|
01-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move some more instruction creation methods from RegisterInfo into InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 641055225092833197efe8e5bce01d50bcf1daae |
|
01-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d10fd9791c20fd8368fa0ce94b626b769c6c8ba0 |
|
31-Dec-2007 |
Owen Anderson <resistor@mac.com> |
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 7ed47a13356daed2a34cd2209a31f92552e3bdd8 |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Don't attribute in file headers anymore. See llvmdev for the
discussion of this change. Boy are my fingers tired. ;-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4be2f7fe57896142ffd81432eab4dc31d21d689b |
|
18-Dec-2007 |
Bill Wendling <isanbard@gmail.com> |
s/hasSideEffects/hasUnmodelledSideEffects/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 882d2914871de826bb0c564c7db8a942f3c44a96 |
|
17-Dec-2007 |
Bill Wendling <isanbard@gmail.com> |
Add "hasSideEffects" method to MachineInstrInfo class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45126 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 7d9e97c2ac6f47473b2cb34971c53db30e5e9c27 |
|
17-Dec-2007 |
Bill Wendling <isanbard@gmail.com> |
As per feedback, revised comments to (hopefully) make the different side effect
flags clearer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6b1da9c39f0731d15cb743441bea6d4089efd9f8 |
|
14-Dec-2007 |
Bill Wendling <isanbard@gmail.com> |
Add flags to indicate that there are "never" side effects or that there "may be"
side effects for machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45022 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6e141fd04897e5eb4925bb6351297170ebd8a756 |
|
13-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8d2ed33f6f16850a7062d1fb5ab66fd025f301e8 |
|
12-Dec-2007 |
Dan Gohman <gohman@apple.com> |
Remove a forward-declaration for a non-existant class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44955 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8245aab33021f31888c7436af9fb1fe2360be791 |
|
12-Dec-2007 |
Bill Wendling <isanbard@gmail.com> |
Bit masks conflicted. Needed to bump them by one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 041b3f835682588cb63df7e609d726369dd6b7d3 |
|
09-Dec-2007 |
Bill Wendling <isanbard@gmail.com> |
Reverting 44702. It wasn't correct to rename them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44727 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 320c630c1b55e17fa00249d499f974cb1a4238f8 |
|
08-Dec-2007 |
Bill Wendling <isanbard@gmail.com> |
Renaming:
isTriviallyReMaterializable -> hasNoSideEffects
isReallyTriviallyReMaterializable -> isTriviallyReMaterializable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44702 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 20ab29068d8a8ec31f26f022634f1e0bc4b1da56 |
|
12-Nov-2007 |
Owen Anderson <resistor@mac.com> |
Add a flag for indirect branch instructions.
Target maintainers: please check that the instructions for your target are correctly marked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ffddf97e5dd1fc222cec049c30ca5d9018a741f8 |
|
13-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added getNumDefs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b5910820ce8608b75cb88e6c4efd2d1a5858159a |
|
02-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added TargetInstrDescriptor::numDefs - num of results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 08d52071bae2f8cc2e9aa6a451118b83d043813b |
|
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ed80ef6089ef83bd1c79f1477d7a12a949474af5 |
|
10-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add OptionalDefOperand. Remove clobbersPred. Also add DefinesPredicate to be used by if-converter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38499 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2c8c3e2e31e641085060edce0ddde3833ffa53da |
|
09-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d45eddd214061bf12ad1e6b86497a41725e61d75 |
|
26-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 82a87a01723c095176c6940bcc63d3a7c8007b4b |
|
19-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4e6b1e1d999a224d932c466118aad577f27cdd56 |
|
19-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Replace CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 61a2598ebe007091e054325f568d1cc50c9ff3d2 |
|
15-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added CanBeDuplicated(). It returns true if an instruction can be safely duplicated (e.g. during ifcvt).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37605 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 318093b6f8d21ac8eab34573b0526984895fe941 |
|
15-Jun-2007 |
Dale Johannesen <dalej@apple.com> |
Do not treat FP_REG_KILL as terminator in branch analysis (X86).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c101e95cb6aae1fd6a0727ba4b518a7894ae3089 |
|
14-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Add a target hook to allow loads from constant pools to be rematerialized, and an
implementation for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37576 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8 |
|
08-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a utility routine to check for unpredicated terminator instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37528 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f94ab6a6620d4a629f46fd764742db0331e6470f |
|
06-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a machine instruction flag indicating the instruction can clobber condition code / register(s) used to predicate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f277ee4be7edabb759a7f78138b693d72d0c263f |
|
29-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add missing const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37341 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4f85cd77046d76bd9091aa6caa06e767bd22f64c |
|
23-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a couple of target hooks for predication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37306 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d46a8ea5d5383c16554a86105a43f63fa3786efb |
|
22-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b5cdaa257e167a08a8a54ea9249d847ccc415ce0 |
|
18-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37192 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d9e9efb253978ce4a3683085d1f75c5734143bf9 |
|
17-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove. Not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37139 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d60483ef99a15630abba934001b1ff7d16a33b18 |
|
17-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add target hook to specify block size limit for if-conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37134 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 02c602b333ed2a1a13a17981f3c3f2f5463d5e5c |
|
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
PredicateInstruction returns true if the operation was successful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 1bccb49082a8049d296dcdb2a741929437b6176f |
|
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Rename M_PREDICATED to M_PREDICABLE; Move TargetInstrInfo::isPredicatable() to MachineInstr::isPredicable().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37115 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6c1d2b90e31ea3337705372d1757727d6764686d |
|
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0402e170e8058cc5256e0c7b94ae37484253d73d |
|
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add TargetInstrInfo predication hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37091 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5de723c1189c596a9c1b90ce4ee90c137f198ad4 |
|
15-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
All operands that made up of the predicate operands are maked M_PREDICATE_OPERAND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37062 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5d5c93f659dd3f09375ea0fbe5d6c2df64791f73 |
|
19-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a TargetInstrDescriptor flag to mark an instruction as "re-materializable".
It means the instruction can be easily re-materialized at any point. e.g.
constant generation, load from constantpool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2864eee7a322610a8dc5f01e450a5e1ca477f7e7 |
|
16-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
These forward declarations are not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| fb062ece96092e70a835c0d462613b07228d60a3 |
|
14-Mar-2007 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix for VS 2005 problem supplied by Morten Ofstad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 1ee29257428960fede862fcfdbe80d5d007927e9 |
|
26-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Make LABEL a builtin opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f2f6a1baf78f3bdf375b258996abd567c20496bc |
|
15-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Silly assertion. Forgot variable_ops instructions can have arbitrary number of
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32592 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| cc22a7a2adfea3fc318a6d8ca0c692a8e892105b |
|
08-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Move findTiedToSrcOperand to TargetInstrDescriptor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3cc3816cd4dc92fbb0a2de93bdebb68dfcea31d5 |
|
08-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Use MI's TargetInstrDescriptor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32352 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6c14147d934bd644fc9d24a3b36f3c38799a3401 |
|
01-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Add getOperandConstraint() to TargetInstrDescriptor.
- convertToThreeAddress() change to allow single two-address MI to be converted
into one or more 3-address MIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 33247d537ddce29e65bc324bf8d40a15d2d88c01 |
|
17-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add opcode to TargetInstrDescriptor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a1fd6504aaf62b87530e8230517957bad3facc96 |
|
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove M_2_ADDR_FLAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f6e8e6bace845cbbb6c1f6d859ffd8a3a154222b |
|
07-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Add a new operand flag to mark which operand is the first predicate operand
of an M_PREDICATED instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 1b1b737d7dc7b3330331cf65514719d719f88a43 |
|
06-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
add a flag so that predicated instructions can be recognized by branch
folding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e6ae14e1f413987f3de31a7cad1b20a7893f8cae |
|
02-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31364 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 981b5bd7080db6dbbac6931863d8a2e6d1fc5a0c |
|
02-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added getTiedToSrcOperand() to check for two-address'ness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31360 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e2ba8975883874633a1035c245af3b948b940b25 |
|
01-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add operand constraints to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c24ff8ed12d01a1b1d2fac57876fc7580024ec49 |
|
28-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
add another target hook for branch folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31262 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 33644ba8d22a91b8fe0f0da3d73fc7cf38a46b06 |
|
24-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
update comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31165 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 24321d7e23a482cbd0b7502f43e9026f87a3684d |
|
24-Oct-2006 |
Rafael Espindola <rafael.espindola@gmail.com> |
fix assert comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31154 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ae1dc403274d3a64bcee31f15e2d25e4b7178811 |
|
18-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 72dc5852684bd56af68b3f344b295d9ff5c3a13f |
|
18-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
update comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31023 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d51c87f22f9b666204b27b301af771bc5badc142 |
|
13-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
it is easier to implement these when they are virtual
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30944 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5f1e4dbdf77de6887441af20857967a3d24c01ab |
|
13-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
allow branch reversal to fail
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b2cd26127973b97c3ed8d74a063e70a259369e44 |
|
13-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
replace the existing branch inspection/modification APIs with something more
useful and general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30940 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 60f09928a0d22d5927ff0a40fe9163cf1ba1014a |
|
21-Jul-2006 |
Jim Laskey <jlaskey@mac.com> |
Use an enumeration to eliminate data relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29249 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 61496683b3c688032328119c83ea87df3093bc08 |
|
17-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Clean up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28851 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f4432fac1425a590dd0e725ed3dd626cf37e1a37 |
|
15-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Avoid undesirable behavior when assert is not enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28793 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8d3af5e7d082dbd029c3987ceadbdcf9e49af6d7 |
|
15-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Instructions with variable operands (variable_ops) can have a number required
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
"call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.
Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 21d03f2de0087d60dbf575d95924404a97852879 |
|
18-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
lib/Target/Target.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28386 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 13d41b9d721f98372b97d2ec119e6c91932ab0ae |
|
12-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add capability to scheduler to commute nodes for profit.
If a two-address code whose first operand has uses below, it should be commuted
when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f7fb31ea33c78f1bc46c23d9edbf9580b7756bbe |
|
20-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Remove a bunch of dead stuff, shrinkifying TargetInstrDescriptor significantly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27897 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 65e9f3969bec427f14d41f0aaef12ed689ca85b5 |
|
06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add a hook to insert a noop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| af9fa2bd0c1ee25f3adda96b3e5d7129fbab393a |
|
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,
a far more logical place. Other methods should also be moved if anyone
is interested. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25912 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4ed88eb8229848cd6add06a1ec90e497e382306f |
|
27-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add a common INLINEASM opcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6cee630070b1a7183ed56a8404e812629f5ca538 |
|
01-Nov-2005 |
Jim Laskey <jlaskey@mac.com> |
Allow itineraries to be passed through the Target Machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0271077eba5f62796f4c725baa8e7fc88bf97650 |
|
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Move a bunch of non-deprecated methods above the "deprecated line"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23216 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 09321dcf5a3d8acb89dfcad2191c630a54938458 |
|
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new instruction flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ae72f4a642192abab5a2d10592200a94fcba61de |
|
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new field to TargetInstrDescriptor for tracking information about
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22908 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 00876a2808f1a8061f7e0852c7949fc5074ecb04 |
|
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Convert tabs to spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 34695381d626485a560594f162701088079589df |
|
21-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21412 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d7e2fe40e42dffa04a770191c3414446d5e8c30a |
|
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new method, described in the comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19683 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 15f63ad2e59998f0bf1a3a23547582074391f650 |
|
02-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add some bits that can be set on instructions. Renumber existing bits so
they are dense. Add a virtual method that targets can choose to implement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 1fca5ff62bb2ecb5bfc8974f4dbfc56e9d3ca721 |
|
27-Oct-2004 |
Chris Lattner <sabre@nondot.org> |
Convert 'struct' to 'class' in various places to adhere to the coding standards
and work better with VC++. Patch contributed by Morten Ofstad!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 49db6fe193168239be2f5aa8b4201614b739e840 |
|
28-Sep-2004 |
Chris Lattner <sabre@nondot.org> |
Be consistent with our naming
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16552 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| dcc4a6f705bacb66b98c58bb3b8c738d3e6df37b |
|
28-Sep-2004 |
Chris Lattner <sabre@nondot.org> |
Capture information about whether the target instructions have delay slots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16550 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 551ccae044b0ff658fe629dd67edd5ffe75d10e8 |
|
02-Sep-2004 |
Reid Spencer <rspencer@reidspencer.com> |
Changes For Bug 352
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d6640951c2425fd2fded86b380bbe5491c7940cd |
|
18-Aug-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
M_DUMMY_PHI_FLAG is no longer used to distinguish V9::PHI. Get rid of it and
its TargetInstrInfo accessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15907 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b406d84dd8f8faee31d891ab9af298c672f98256 |
|
18-Aug-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
M_PSEUDO_FLAG is no longer used. Get rid of it and its accessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 93ad2cf91092c4ff45ace5b87b97179202e3de06 |
|
04-Aug-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
getResultPos() is dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c2df129da9828406d97f708989b5151ed04dec6b |
|
01-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Fix warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e4d32f6cf96566f8d37e50212e4f67330150ee20 |
|
31-Jul-2004 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Change signature to take two basic blocks: the target and the one
where the goto will be appended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0cad9f53b15b7308e977864d681f710646e7d376 |
|
31-Jul-2004 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Doxygenify some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15360 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 096f58b09adb03b5b060e12b327cff57329909f7 |
|
31-Jul-2004 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Remove const from iterators passed by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 905f7af59cb85ea71b6c011f1e79f24f8db16efc |
|
31-Jul-2004 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Add declarations for insertGoto and reverseBranchCondition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2441d6a895c1aad171bfbdc84cd6e246171b101d |
|
31-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Add new M_BARRIER_FLAG flag, and isBarrier() method to TargetInstrInfo
opCode -> Opcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b2f30a3792c84790fcf7f20bf581b963bb0a25d3 |
|
28-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
TargetInstrInfo::hasOperandInterlock() is always true, because it is
never overridden by any target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| de0ceb58bac96a6df133a04cf92bb220a16e12fd |
|
27-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
ConstantTypeMustBeLoaded has been incorporated into SparcV9PreSelection, its
only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15294 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 1b4aeb5cec6b6732d0833bac388c20de04fab961 |
|
27-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
As it happens, none of these TargetInstrInfo methods which are only
used in the SparcV9 backend really have anything to do with
TargetInstrInfo, so we're converting them into regular old global
functions and moving their declarations to SparcV9InstrSelectionSupport.h.
(They're mostly used as helper functions for SparcV9InstrSelection.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15277 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| bceb68807fdb86c794bc8d8f8aef0940f12c2ceb |
|
29-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Eliminate the distinction between "real" and "unreal" instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 450b6d29988fa01e828e5b7917a47726a4dd46ec |
|
29-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Scrap a huge layer of cruft out of this interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11980 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| ab8672c8bb83e722b856eac67863542ea7e0cbb2 |
|
12-Feb-2004 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Add parent pointer to MachineInstr that points to owning
MachineBasicBlock. Also change opcode to a short and numImplicitRefs
to an unsigned char so that overall MachineInstr's size stays the
same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e28adaa633393d5beea7f8e97951cbe1e3cd1646 |
|
11-Feb-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix typos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5e30002af70ef09a42cac155d9196f7f0f3b1695 |
|
28-Dec-2003 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Add TargetInstrInfo::isMoveInstr() to support coalescing in register
allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10633 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d0fde30ce850b78371fd1386338350591f9ff494 |
|
11-Nov-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Put all LLVM code into the llvm namespace, as per bug 109.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 6fbcc26f1460eaee4e0eb8b426fc1ff0c7af11be |
|
20-Oct-2003 |
John Criswell <criswell@uiuc.edu> |
Added LLVM copyright header (for lack of a better term).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9ca5a2a33e98b0a93dc335a00f4d63aeb9a192b8 |
|
03-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
The NOOP instruction is no longer needed. Instead, use the
TargetInstrInfo::isNOPinstr method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7530 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 588668d4681bf928e09534c373b1bcf86757f899 |
|
29-Jul-2003 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Unify all constant evaluations that depend on register size
in TargetInstrInfo::ConvertConstantToIntType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7398 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| be67780f31958b05ad3c510ca3a973d327517e86 |
|
25-Jul-2003 |
Chris Lattner <sabre@nondot.org> |
#include <cassert> as necessary...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 7a73b80b9052136c8cd2234eb3433a07df7cf38e |
|
30-Jun-2003 |
John Criswell <criswell@uiuc.edu> |
Merged in autoconf branch. This provides configuration via the autoconf
system.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7014 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d7908f679eeadc108e09e2aca5faba0b5410ea4a |
|
27-Jun-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Nice tasty llc fixes. These should fix LLC for x86 for everything in
SingleSource except oopack and Oscar. (Sorry, Oscar.)
include/llvm/Target/TargetInstrInfo.h: Remove virtual print method. Add
accessors for ImplicitUses/Defs.
lib/Target/TargetInstrInfo.cpp: Remove virtual print method. If you
really wanted this, just use MI->print(O, TM); instead...
lib/Target/X86:
FloatingPoint.cpp: ...like this.
X86InstrInfo.h: Remove virtual print method. Define the PrintImplUses
target-specific flag bit.
X86InstrInfo.def: Add the PrintImplUses flag to all the instructions
which implicitly use CL, because the assembler needs to see the CL in
order to generate the right instruction.
Printer.cpp: Ditch fnIndex at Chris's request. Now we use CurrentFnName
to name constants in the constant pool for each function instead. This
avoids keeping state between runOnMachineFunction() invocations, which
is a no-no. Having MangledGlobals be global is a bogon I'd like to get
rid of too, but making it a static member of Printer causes link errors
(why???).
Make NumberForBB into a member of Printer instead of a global, too.
Make printOp and printMemReference into methods of Printer.
X86InstrInfo::print is now Printer::printMachineInstruction, because
TargetInstrInfo::print is history. (Because of this, we have to qualify
the names of some TargetInstrInfo methods we call.)
Print out the ImplicitUses field of any instruction we print that has
the PrintImplUses bit set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6924 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| be583b914d8156b99d3da264d5adca37fee8dbc9 |
|
11-Jun-2003 |
John Criswell <criswell@uiuc.edu> |
Included assert.h so that the code compiles under newer versions of GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6682 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 12745c55e1d5a6e76d41684f1b507ea7c6b888ac |
|
24-May-2003 |
Misha Brukman <brukman+llvm@gmail.com> |
Reword to remove reference to how things worked in the past.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6323 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 00b05bd703b0d50133aecf4ce9f48e96d14504b3 |
|
24-May-2003 |
Misha Brukman <brukman+llvm@gmail.com> |
NOP instructions are pseudo-instructions. We should not have them explicitly in
our representation, since they are usually special cases of already-existing
instructions.
This abstracts away methods that let a pass create and verify a NOP instruction,
without relying on a `NOP' enum to be in existence in the target's instruction
info descriptor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6319 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 3501feab811c86c9659248a4875fc31a3165f84d |
|
14-Jan-2003 |
Chris Lattner <sabre@nondot.org> |
Rename MachineInstrInfo -> TargetInstrInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 075b4a066db31f48e0f6daec34b1ff463523cd3f |
|
13-Jan-2003 |
Chris Lattner <sabre@nondot.org> |
* Start renaming MachineInstrInfo -> TargetInstrInfo
* Add new M_TERMINATOR_FLAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5213 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5fa01b9c7a33ecd0e006427ae2a44170cf60422d |
|
28-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Sparc specific methods default to abort rather than being pure virtual
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 13a6e1e5a1483db8f88d38dd7dcd48b9ca8e945a |
|
25-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Add comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5141 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 70535c608d88ce25fb992dba3b6d3d0176153a09 |
|
15-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Export well known instruction opcodes usable by target independant passes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9ada014ec09579a7dd3833f779a1de82bd71bce1 |
|
13-Dec-2002 |
Misha Brukman <brukman+llvm@gmail.com> |
Define the 2-address flag used by X86 instructions (add,sub,and,or,xor) that
need to be declared as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4975 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f6d12fbd9cc0355978a739f5ab213eff85b75a19 |
|
03-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Add entries to track information about implicit uses and definitions of
the instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| fe30dd3f2390c26fe1f83868cd57a1e6b27d3075 |
|
18-Nov-2002 |
Chris Lattner <sabre@nondot.org> |
Make sure that print gets a targetmachine
CVS: ----------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9bca50d6ddb8b53659a8db1dfa91a8b239178fe9 |
|
17-Nov-2002 |
Chris Lattner <sabre@nondot.org> |
Add machine independant printer interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4729 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 75e961ae6b2e2801160e560057ad97ece4443986 |
|
30-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
* Add new "Target Specific Flags" field to instruction descriptor
* Rename iclass to Flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4439 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f1757c414cbf7d1b7a11cc8287fd26c2ce13fb41 |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Move TargetInstrDescriptors extern to the one .cpp file that refers to it:
MachineInstr.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4683f9bfb4dc2f5557e8a7a229912e7f2ed366ca |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Rename opCodeString to Name, add new getName() method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4388 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e30eeaaf72b461aebf3dfcdd7c119eea76458561 |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Rename MachineInstrInfo::getDescriptor to MachineInstrInfo::get
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4387 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d020801aeaacbee4dc139bb08f81e44bc53b872e |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
MachineInstrInfo doesn't need a TargetMachine member
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4371 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 2cc214c06cbb94f95928636981c9805d6300cff1 |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Strip a bunch of #includes from the file, move some virtual functions to
.cpp file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4364 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9a8e4121aa4121100fb562134c098aeb38f70b37 |
|
28-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Remove all traces of the "Opcode Mask" field in the MachineInstr class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c7e65fb7d850d010a141420d7b1d8ddad484d3b3 |
|
28-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
* s/unsigned int/unsigned
* Make MachineInstrDescriptor only keep a const char * instead of a string
for the opcode name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4335 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c188b733babbcdb0ff51613d0bb133e0496963b6 |
|
28-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Make scheduling class variables be 'unsigned' instead of 'int'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| fce1143bcfa73f61845002fa50473d1a01384202 |
|
28-Oct-2002 |
Misha Brukman <brukman+llvm@gmail.com> |
Changed `MachineCodeForMethod' to `MachineFunction'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4301 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 502374a58fcd1c28065170a8c4a210be002ff190 |
|
25-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
* Remove unneccesary #includes
* Fix typeo in the (unused) MachineInstrInfo::isArith method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 9d0168d2d54008729632f676475ce710448cf8a8 |
|
29-Sep-2002 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Minor change to interface for Create{Zero,Sign}ExtensionsInstructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3979 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| d55697cf136150b697b9bbddce9088e87a1be963 |
|
20-Sep-2002 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Added class MachineOptInfo as interface to target-specific
routines supporting machine code optimization.
Also added method MachineInstrInfo::getNOPOpCode().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4900116ab0c17252bdca2e66b87d8b6da1839b54 |
|
16-Sep-2002 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Add methods to query about the representation of LLVM quantities (e.g.,
constants). Useful for target-dependent LLVM transformations like
Preselection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3743 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 68f716190baa08675793adba428605797eb658a4 |
|
05-Sep-2002 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Add new function MachineInstrInfo::CreateZeroExtensionInstructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3582 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| bba2485c709adecd65526fbcfea77f2344d29d69 |
|
10-Jul-2002 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Minor change in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2853 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c864fde15c68fe56d2af48ddeaddfd4e13006f4a |
|
19-May-2002 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
New function CreateSignExtensionInstructions.
Methods now take MachineCodeForInstruction& as an argument and record
temporary values in it directly, instead of return the temps.
Really simplifies callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2651 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e7506a366e8bd56c97d10beb68e4db953aebaeca |
|
23-Mar-2002 |
Chris Lattner <sabre@nondot.org> |
Rename Method to Function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1957 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 851597c3b34a03b700f48d284fb9b186ccf9ef91 |
|
18-Mar-2002 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Added machine-independent value for INVALID_MACHINE_OPCODE.
Just cosmetic changes otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| f3aaadf48277acddc3f6fdc4cc8d18b13d313595 |
|
03-Feb-2002 |
Chris Lattner <sabre@nondot.org> |
Remove #include
move typedefs here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1639 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 697954c15da58bd8b186dbafdedd8b06db770201 |
|
20-Jan-2002 |
Chris Lattner <sabre@nondot.org> |
Changes to build successfully with GCC 3.02
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| c1a29f10a6f0bc3d219db9594ed8d3ec20efd8a4 |
|
07-Jan-2002 |
Ruchira Sasanka <sasanka@students.uiuc.edu> |
MachineRegInfo: Added a method to get the size of a register pushed on to stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1492 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| e9bb2df410f7a22decad9a883f7139d5857c1520 |
|
03-Dec-2001 |
Chris Lattner <sabre@nondot.org> |
Rename ConstPoolVal -> Constant
Rename ConstPool* -> Constant*
Rename ConstPoolVals.h -> ConstantVals.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1407 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 360e17eaf1a2abda82b02235dc57d26d8f83c937 |
|
27-Nov-2001 |
Chris Lattner <sabre@nondot.org> |
Move DataTypes.h from llvm/Support to just Support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4c5fe2d3ed4043c34f3305c081297ba4ca26ddc2 |
|
14-Nov-2001 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Add function returning which operand holds immediate constant
for a given opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| b9f550ddfbaf963a0aced2df8cd40c71021fd3e5 |
|
14-Nov-2001 |
Ruchira Sasanka <sasanka@students.uiuc.edu> |
added isPseudoInstr()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1302 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 8486cdd3f9850eb08fceea05deb6a0315e962574 |
|
12-Nov-2001 |
Ruchira Sasanka <sasanka@students.uiuc.edu> |
Changed for adding Phi Elimination code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 984adc25c981155040f3a7e3801d2292e18880b1 |
|
10-Nov-2001 |
Ruchira Sasanka <sasanka@students.uiuc.edu> |
Made isPhi const
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 4938d4528f80dd015c58dec9d6d72bc27bf26bbd |
|
09-Nov-2001 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Added class MachineCacheInfo.
Also added function to convert float to int by copying via memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1221 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 44508e333cc1d36e699aa330d84312d1c8fc655a |
|
08-Nov-2001 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Add method CreateCodeToCopyIntToFloat.
Include handle to TargetMachine in each Machine...Info object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1200 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 0d3ea0268f44f8fd4ddf7a15f3624b384b0691db |
|
03-Nov-2001 |
Ruchira Sasanka <sasanka@students.uiuc.edu> |
Moved InsertCallerSaveInstr to the SparcRegInfo.cpp and made machine independent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1107 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| 5684c4e2b41f1d6ddf70b116a84f438040f66297 |
|
18-Oct-2001 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Added virtual function to generate an instruction sequence to
load a constant into a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@862 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|
| a578a6d054e8219c730840700d8d5fd29f15a962 |
|
18-Sep-2001 |
Vikram S. Adve <vadve@cs.uiuc.edu> |
Make class TargetMachine the common interface to all target-dependent
information, including instr, sched, and reg information.
Rename files to match the primary classes they provide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@602 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/Target/TargetInstrInfo.h
|