Searched refs:DL (Results 101 - 125 of 179) sorted by relevance

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/external/llvm/lib/Target/Mips/
H A DMips16ISelLowering.cpp420 DebugLoc DL = MI->getDebugLoc(); local
452 BuildMI(BB, DL, TII->get(Opc)).addReg(MI->getOperand(3).getReg())
468 BuildMI(*BB, BB->begin(), DL,
483 DebugLoc DL = MI->getDebugLoc(); local
515 BuildMI(BB, DL, TII->get(Opc2)).addReg(MI->getOperand(3).getReg())
517 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
532 BuildMI(*BB, BB->begin(), DL,
548 DebugLoc DL = MI->getDebugLoc(); local
580 BuildMI(BB, DL, TII->get(Opc2)).addReg(MI->getOperand(3).getReg())
582 BuildMI(BB, DL, TI
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H A DMipsISelLowering.h350 void copyByValRegs(SDValue Chain, DebugLoc DL,
358 void passByValArg(SDValue Chain, DebugLoc DL,
369 SDValue Chain, DebugLoc DL, SelectionDAG &DAG) const;
379 SDValue Arg, DebugLoc DL, bool IsTailCall,
H A DMipsTargetMachine.cpp46 DL(isLittle ?
/external/llvm/lib/Transforms/Utils/
H A DInlineFunction.cpp441 static DebugLoc updateInlinedAtInfo(const DebugLoc &DL, argument
444 if (MDNode *IA = DL.getInlinedAt(Ctx)) {
447 return DebugLoc::get(DL.getLine(), DL.getCol(), DL.getScope(Ctx),
451 return DebugLoc::get(DL.getLine(), DL.getCol(), DL.getScope(Ctx),
466 DebugLoc DL = BI->getDebugLoc(); local
467 if (!DL
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/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp299 DebugLoc DL = Op.getDebugLoc(); local
304 return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, getPointerTy(), Result);
417 DebugLoc DL = Op.getDebugLoc(); local
427 return DAG.getLoad(getPointerTy(), DL, Chain, BasePtr,
442 SDValue LowAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, Base, LowOffset);
443 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, Base, HighOffset);
445 SDValue Low = DAG.getLoad(getPointerTy(), DL, Chain,
448 SDValue High = DAG.getLoad(getPointerTy(), DL, Chain,
451 SDValue LowShifted = DAG.getNode(ISD::SRL, DL, MVT::i32, Low, LowShift);
452 SDValue HighShifted = DAG.getNode(ISD::SHL, DL, MV
868 DebugLoc DL = Op.getDebugLoc(); local
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/external/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp403 DebugLoc DL) const {
419 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB).addImm(ARMCC::AL).addReg(0);
421 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
423 BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB)
429 BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB)
432 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB).addImm(ARMCC::AL).addReg(0);
434 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB);
653 MachineBasicBlock::iterator I, DebugLoc DL,
660 AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::MOVr), DestReg)
681 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, ge
652 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
767 DebugLoc DL; local
948 DebugLoc DL; local
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H A DARMBaseInstrInfo.h69 DebugLoc DL) const;
110 MachineBasicBlock::iterator I, DebugLoc DL,
132 DebugLoc DL) const;
H A DARMTargetMachine.cpp77 DL(Subtarget.isAPCS_ABI() ?
104 DL(Subtarget.isAPCS_ABI() ?
/external/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp118 DebugLoc DL) const{
150 return InsertBranch(MBB, TBB, 0, Cond, DL);
153 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
155 BuildMI(&MBB, DL,
161 BuildMI(&MBB, DL, get(BccOpc)).addReg(Cond[regPos].getReg()).addMBB(TBB);
162 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB);
391 MachineBasicBlock::iterator I, DebugLoc DL,
395 BuildMI(MBB, I, DL, get(Hexagon::TFR), DestReg).addReg(SrcReg);
399 BuildMI(MBB, I, DL, get(Hexagon::TFR64), DestReg).addReg(SrcReg);
404 BuildMI(MBB, I, DL, ge
390 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
452 DebugLoc DL = MBB.findDebugLoc(I); local
498 DebugLoc DL = MBB.findDebugLoc(I); local
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H A DHexagonTargetMachine.cpp71 DL("e-p:32:32:32-"
H A DHexagonInstrInfo.h67 DebugLoc DL) const;
74 MachineBasicBlock::iterator I, DebugLoc DL,
/external/llvm/lib/Transforms/Scalar/
H A DLICM.cpp666 DebugLoc DL; member in class:__anon9928::LoopPromoter
679 AST(ast), DL(dl), Alignment(alignment), TBAATag(TBAATag) {}
702 NewSI->setDebugLoc(DL);
841 DebugLoc DL = LoopUses[0]->getDebugLoc(); local
856 InsertPts, *CurAST, DL, Alignment, TBAATag);
864 PreheaderLoad->setDebugLoc(DL);
H A DSROA.cpp453 PartitionBuilder(const DataLayout &DL, AllocaInst &AI, AllocaPartitioning &P) argument
454 : PtrUseVisitor<PartitionBuilder>(DL),
455 AllocSize(DL.getTypeAllocSize(AI.getAllocatedType())),
517 uint64_t Size = DL.getTypeStoreSize(LI.getType());
528 uint64_t Size = DL.getTypeStoreSize(ValOp->getType());
679 Size = std::max(Size, DL.getTypeStoreSize(LI->getType()));
686 Size = std::max(Size, DL.getTypeStoreSize(Op->getType()));
851 uint64_t Size = DL.getTypeStoreSize(LI.getType());
857 uint64_t Size = DL.getTypeStoreSize(SI.getOperand(0)->getType());
1932 static bool canConvertValue(const DataLayout &DL, Typ
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/external/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.h88 MVT VT, DebugLoc DL);
H A DSelectionDAGBuilder.cpp90 static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL,
99 static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL, argument
105 return getCopyFromPartsVector(DAG, DL, Parts, NumParts,
129 Lo = getCopyFromParts(DAG, DL, Parts, RoundParts / 2,
131 Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2,
134 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
135 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
141 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
147 Hi = getCopyFromParts(DAG, DL,
155 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalV
220 getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V) argument
337 getCopyToParts(SelectionDAG &DAG, DebugLoc DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, ISD::NodeType ExtendKind = ISD::ANY_EXTEND) argument
469 getCopyToPartsVector(SelectionDAG &DAG, DebugLoc DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V) argument
1990 DebugLoc DL = getCurDebugLoc(); local
2663 DebugLoc DL = getCurDebugLoc(); local
4287 ExpandPowI(DebugLoc DL, SDValue LHS, SDValue RHS, SelectionDAG &DAG) argument
5736 GetRegistersForValue(SelectionDAG &DAG, const TargetLowering &TLI, DebugLoc DL, SDISelAsmOperandInfo &OpInfo) argument
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/external/llvm/lib/Target/PowerPC/
H A DPPCTargetMachine.cpp43 DL(Subtarget.getDataLayoutString()), InstrInfo(*this),
/external/llvm/lib/Target/R600/
H A DAMDILCFGStructurizer.cpp1541 DebugLoc DL = branchInstr->getDebugLoc(); local
1562 CFGTraits::insertCondBranchBefore(branchInstrPos, AMDGPU::PREDICATED_BREAK, passRep, DL);
1567 CFGTraits::insertCondBranchBefore(branchInstrPos, AMDGPU::PREDICATED_BREAK, passRep, DL);
1609 DebugLoc DL = branchInstr->getDebugLoc(); local
1629 CFGTraits::insertCondBranchBefore(branchInstrPos, branchOpcode, passRep, DL);
1634 CFGTraits::insertInstrEnd(contingBlk, AMDGPU::BREAK, passRep, DL);
1637 CFGTraits::insertInstrEnd(contingBlk, AMDGPU::CONTINUE, passRep, DL);
1640 CFGTraits::insertInstrEnd(contingBlk, AMDGPU::ENDIF, passRep, DL);
1646 CFGTraits::insertCondBranchBefore(branchInstrPos, branchOpcode, passRep, DL);
1793 DebugLoc DL; local
2684 DebugLoc DL; local
2792 insertInstrBefore(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument
2815 insertInstrEnd(MachineBasicBlock *blk, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument
2844 insertCondBranchBefore(MachineBasicBlock::iterator instrPos, int newOpcode, AMDGPUCFGStructurizer *passRep, DebugLoc DL) argument
2862 insertCondBranchBefore(MachineBasicBlock *blk, MachineBasicBlock::iterator insertPos, int newOpcode, AMDGPUCFGStructurizer *passRep, RegiT regNum, DebugLoc DL) argument
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H A DAMDGPUInstrInfo.h75 MachineBasicBlock::iterator MI, DebugLoc DL,
197 DebugLoc DL) const;
/external/clang/unittests/Lex/
H A DPPCallbacksTest.cpp113 DirectoryLookup DL(DE, SrcMgr::C_User, false);
114 HeaderInfo.AddSearchPath(DL, IsSystemHeader);
/external/llvm/include/llvm/MC/
H A DMCRegisterInfo.h240 const MCPhysReg *DL,
250 DiffLists = DL;
235 InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass *C, unsigned NC, const uint16_t (*RURoots)[2], unsigned NRU, const MCPhysReg *DL, const char *Strings, const uint16_t *SubIndices, unsigned NumIndices, const uint16_t *RET) argument
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h147 DebugLoc DL, SDValue &Chain) const;
210 SDValue LowerTLSDescCall(SDValue SymAddr, SDValue DescAddr, DebugLoc DL,
/external/llvm/lib/Target/MBlaze/
H A DMBlazeFrameLowering.cpp348 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); local
366 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADDIK), MBlaze::R1)
371 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
377 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
381 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADD), MBlaze::R19)
/external/llvm/lib/CodeGen/
H A DLiveDebugVariables.cpp78 DebugLoc DL; member in class:__anon9465::UserValueScopes
83 UserValueScopes(DebugLoc D, LexicalScopes &L) : DL(D), LS(L) {}
89 LS.getMachineBasicBlocks(DL, LBlocks);
90 if (LBlocks.count(MBB) != 0 || LS.dominates(DL, MBB))
302 UserValue *getUserValue(const MDNode *Var, unsigned Offset, DebugLoc DL);
417 DebugLoc DL) {
427 UserValue *UV = new UserValue(Var, Offset, DL, allocator);
416 getUserValue(const MDNode *Var, unsigned Offset, DebugLoc DL) argument
/external/llvm/lib/ExecutionEngine/JIT/
H A DJITEmitter.cpp446 virtual void processDebugLoc(DebugLoc DL, bool BeforePrintingInsn);
744 void JITEmitter::processDebugLoc(DebugLoc DL, bool BeforePrintingInsn) { argument
745 if (DL.isUnknown()) return;
750 if (DL.getScope(Context) != 0 && PrevDL != DL) {
753 NextLine.Loc = DL;
757 PrevDL = DL;
/external/llvm/lib/IR/
H A DDebugInfo.cpp1164 static void printDebugLoc(DebugLoc DL, raw_ostream &CommentOS, argument
1166 if (!DL.isUnknown()) { // Print source line info.
1167 DIScope Scope(DL.getScope(Ctx));
1173 CommentOS << ':' << DL.getLine();
1174 if (DL.getCol() != 0)
1175 CommentOS << ':' << DL.getCol();
1176 DebugLoc InlinedAtDL = DebugLoc::getFromDILocation(DL.getInlinedAt(Ctx));

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