/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCasts.cpp | 892 Value *Op0 = ICI->getOperand(0), *Op1 = ICI->getOperand(1); local 901 Value *Sh = ConstantInt::get(Op0->getType(), 902 Op0->getType()->getScalarSizeInBits()-1); 903 Value *In = Builder->CreateAShr(Op0, Sh, Op0->getName()+".lobit"); 919 ComputeMaskedBits(Op0, KnownZero, KnownOne); 971 Op0->getType() == CI.getType()) { 976 Value *In = Builder->CreateAShr(Op0, VSh, Op0->getName()+".lobit");
|
H A D | InstCombine.h | 165 Instruction *FoldShiftByConstant(Value *Op0, ConstantInt *Op1,
|
H A D | InstCombineVectorOps.cpp | 28 Constant *Op0 = C->getAggregateElement(0U); 30 if (C->getAggregateElement(i) != Op0)
|
H A D | InstCombineCalls.cpp | 598 Value *Op0 = Builder->CreateBitCast(II->getArgOperand(0), local 602 Value *Result = UndefValue::get(Op0->getType()); 617 Builder->CreateExtractElement(Idx < 16 ? Op0 : Op1,
|
/external/llvm/lib/AsmParser/ |
H A D | LLParser.cpp | 3371 Value *Op0; 3373 if (ParseTypeAndValue(Op0, Loc, PFS)) return true; 3375 if (BasicBlock *BB = dyn_cast<BasicBlock>(Op0)) { 3380 if (Op0->getType() != Type::getInt1Ty(Context)) 3389 Inst = BranchInst::Create(Op1, Op2, Op0); 3707 Value *Op0, *Op1, *Op2; 3708 if (ParseTypeAndValue(Op0, Loc, PFS) || 3715 if (const char *Reason = SelectInst::areInvalidOperands(Op0, Op1, Op2)) 3718 Inst = SelectInst::Create(Op0, Op1, Op2); 3744 Value *Op0, *Op [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 2022 SDValue Op0 = Node->getOperand(0); 2024 for (SDNode::use_iterator UI = Op0.getNode()->use_begin(), 2025 UE = Op0.getNode()->use_end(); UI != UE; ++UI) { 2030 User->getOperand(0) == Op0 && 2134 SDValue Op0 = Node->getOperand(0); 2135 for (SDNode::use_iterator UI = Op0.getNode()->use_begin(), 2136 UE = Op0.getNode()->use_end(); UI != UE; ++UI) { 2219 SDValue Op0, 2222 if (Op0.getValueType() == MVT::i32 && TLI.isTypeLegal(MVT::f64)) { 2242 Op0Mapped = DAG.getNode(ISD::XOR, dl, MVT::i32, Op0, SignBi [all...] |
H A D | LegalizeVectorTypes.cpp | 136 SDValue Op0 = GetScalarizedVector(N->getOperand(0)); local 140 Op0.getValueType(), Op0, Op1, Op2); 167 SDValue Op0 = GetScalarizedVector(N->getOperand(0)); local 169 Op0, DAG.getValueType(NewVT), 170 DAG.getValueType(Op0.getValueType()), 1006 SDValue Op0 = Inputs[InputUsed[0]]; local 1011 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
|
H A D | DAGCombiner.cpp | 297 bool isAlias(LSBaseSDNode *Op0, LSBaseSDNode *Op1); 2600 ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get(); local 2603 if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 && 2634 ISD::CondCode Result = ISD::getSetCCAndOperation(Op0, Op1, isInteger); 3115 ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get(); local 3118 if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 && 3146 ISD::CondCode Result = ISD::getSetCCOrOperation(Op0, Op1, isInteger); 4534 SDValue Op0 = N->getOperand(0); 4536 assert(Op0.getValueType() == Op1.getValueType()); 4538 ConstantSDNode *COp0 = dyn_cast<ConstantSDNode>(Op0); 6747 SDValue Op0 = N1.getOperand(0); local 6794 SDValue Op0 = TheXor->getOperand(0); local 7018 SDValue Op0 = Use->getOperand(0), Op1 = Use->getOperand(1); local 9946 isAlias(LSBaseSDNode *Op0, LSBaseSDNode *Op1) argument [all...] |
H A D | SelectionDAGBuilder.cpp | 3064 const Value *Op0 = I.getOperand(0); local 3068 bool IntoUndef = isa<UndefValue>(Op0); 3082 SDValue Agg = getValue(Op0); 3106 const Value *Op0 = I.getOperand(0); local 3107 Type *AggTy = Op0->getType(); 3109 bool OutOfUndef = isa<UndefValue>(Op0); 3126 SDValue Agg = getValue(Op0);
|
/external/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 714 void InitOperands(SDUse *Ops, const SDValue &Op0) { 716 Ops[0].setInitial(Op0); 723 void InitOperands(SDUse *Ops, const SDValue &Op0, const SDValue &Op1) { 725 Ops[0].setInitial(Op0); 734 void InitOperands(SDUse *Ops, const SDValue &Op0, const SDValue &Op1, 737 Ops[0].setInitial(Op0); 748 void InitOperands(SDUse *Ops, const SDValue &Op0, const SDValue &Op1, 751 Ops[0].setInitial(Op0);
|
/external/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 539 /// SymbolicallyEvaluateBinop - One of Op0/Op1 is a constant expression. 543 static Constant *SymbolicallyEvaluateBinop(unsigned Opc, Constant *Op0, argument 553 unsigned BitWidth = DL->getTypeSizeInBits(Op0->getType()); 556 ComputeMaskedBits(Op0, KnownZero0, KnownOne0, DL); 559 // All the bits of Op0 that the 'and' could be masking are already zero. 560 return Op0; 570 return ConstantInt::get(Op0->getType(), KnownOne); 579 unsigned OpSize = DL->getTypeSizeInBits(Op0->getType()); 582 if (IsConstantOffsetFromGlobal(Op0, GV1, Offs1, *DL)) 588 return ConstantInt::get(Op0 [all...] |
H A D | ValueTracking.cpp | 46 static void ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW, argument 51 if (ConstantInt *CLHS = dyn_cast<ConstantInt>(Op0)) { 81 llvm::ComputeMaskedBits(Op0, LHSKnownZero, LHSKnownOne, TD, Depth+1); 132 static void ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW, argument 138 ComputeMaskedBits(Op0, KnownZero2, KnownOne2, TD, Depth+1); 146 if (Op0 == Op1) { 161 isKnownNonZero(Op0, TD, Depth)) || 1311 Value *Op0 = I->getOperand(0); local 1317 // Turn Op0 << Op1 into Op0 * [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 404 SDValue Op0 = N->getOperand(0); local 409 CurDAG->ComputeMaskedBits(Op0, LKZ, LKO); 416 unsigned Op0Opc = Op0.getOpcode(); 425 if (Op0.getOperand(0).getOpcode() == ISD::SHL || 426 Op0.getOperand(0).getOpcode() == ISD::SRL) { 429 std::swap(Op0, Op1); 437 std::swap(Op0, Op1); 464 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB),
|
/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 897 bool X86FastISel::X86FastEmitCompare(const Value *Op0, const Value *Op1, argument 899 unsigned Op0Reg = getRegForValue(Op0); 904 Op1 = Constant::getNullValue(TD.getIntPtrType(Op0->getContext())); 939 bool SwapArgs; // false -> compare Op0, Op1. true -> compare Op1, Op0. 995 const Value *Op0 = CI->getOperand(0), *Op1 = CI->getOperand(1); local 997 std::swap(Op0, Op1); 999 // Emit a compare of Op0/Op1. 1000 if (!X86FastEmitCompare(Op0, Op1, VT)) 1059 bool SwapArgs; // false -> compare Op0, Op 1095 const Value *Op0 = CI->getOperand(0), *Op1 = CI->getOperand(1); local [all...] |
H A D | X86ISelLowering.h | 924 /// Emit nodes that will be selected as "test Op0,Op0", or something 926 SDValue EmitTest(SDValue Op0, unsigned X86CC, SelectionDAG &DAG) const; 928 /// Emit nodes that will be selected as "cmp Op0,Op1", or something 930 SDValue EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC,
|
H A D | X86ISelLowering.cpp | 3653 SDValue Op0 = SVOp->getOperand(0); local 3663 Op0 = DAG.getVectorShuffle(VT, dl, Op0, UndefNode, ShiftLeftMask); 3666 return DAG.getVectorShuffle(VT, dl, Op0, Op1, BlendMask); 6357 SDValue Op0 = Extract128BitVector(SVOp->getOperand(InputUsed[0] / 2), local 6365 Output[l] = DAG.getVectorShuffle(NVT, dl, Op0, Op1, &Mask[0]); 8687 SDValue Op0 = Op.getOperand(0); local 8729 // Op0 is MVT::f32, Op1 is MVT::f64. 8758 SDValue Val = DAG.getNode(X86ISD::FAND, dl, VT, Op0, Mask2); 8868 /// Emit nodes that will be selected as "test Op0,Op 9081 EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC, SelectionDAG &DAG) const argument 9132 SDValue Op0 = And.getOperand(0); local 9243 SDValue Op0 = Op.getOperand(0); local 9401 SDValue Op0 = Op.getOperand(0); local 16412 SDValue Op0 = N0.getOperand(0); local 17420 SDValue Op0 = N->getOperand(0); local 17518 SDValue Op0 = N->getOperand(0); local 17532 SDValue Op0 = N->getOperand(0); local [all...] |
H A D | X86ISelDAGToDAG.cpp | 2701 SDValue Op0, Op1, Op2, Op3, Op4; local 2707 if (!SelectAddr(0, Op, Op0, Op1, Op2, Op3, Op4)) 2712 OutOps.push_back(Op0);
|
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 1228 SDValue Op0, Op1; local 1232 if (SelectDirectAddr(Op, Op0)) { 1233 OutOps.push_back(Op0); 1237 if (SelectADDRri(Op.getNode(), Op, Op0, Op1)) { 1238 OutOps.push_back(Op0);
|
/external/llvm/lib/Bitcode/Reader/ |
H A D | BitcodeReader.cpp | 1272 Constant *Op0 = ValueList.getConstantFwdRef(Record[1], OpTy); 1275 V = ConstantExpr::getExtractElement(Op0, Op1); 1282 Constant *Op0 = ValueList.getConstantFwdRef(Record[0], OpTy); 1287 V = ConstantExpr::getInsertElement(Op0, Op1, Op2); 1294 Constant *Op0 = ValueList.getConstantFwdRef(Record[0], OpTy); 1299 V = ConstantExpr::getShuffleVector(Op0, Op1, Op2); 1308 Constant *Op0 = ValueList.getConstantFwdRef(Record[1], OpTy); 1313 V = ConstantExpr::getShuffleVector(Op0, Op1, Op2); 1320 Constant *Op0 = ValueList.getConstantFwdRef(Record[1], OpTy); 1324 V = ConstantExpr::getFCmp(Record[3], Op0, Op [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1432 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, local 1437 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, 3776 SDValue Op0 = Op.getOperand(0); local 3805 TmpOp0 = Op0; 3808 Op0 = DAG.getNode(ARMISD::VCGT, dl, VT, TmpOp1, TmpOp0); 3814 TmpOp0 = Op0; 3817 Op0 = DAG.getNode(ARMISD::VCGT, dl, VT, TmpOp1, TmpOp0); 3842 AndOp = Op0; 3843 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) 3852 Op0 5032 SDValue Op0 = Op.getOperand(0); local 5286 SDValue Op0; local 8324 SDValue Op0 = N->getOperand(0); local 8564 SDValue Op0 = N->getOperand(0); local [all...] |
/external/llvm/lib/IR/ |
H A D | Instructions.cpp | 62 const char *SelectInst::areInvalidOperands(Value *Op0, Value *Op1, Value *Op2) { argument 66 if (VectorType *VT = dyn_cast<VectorType>(Op0->getType())) { 68 if (VT->getElementType() != Type::getInt1Ty(Op0->getContext())) 76 } else if (Op0->getType() != Type::getInt1Ty(Op0->getContext())) { 1972 Value *Op0 = BO->getOperand(0); local 1974 if (isConstantAllOnes(Op0)) return Op1; 1977 return Op0;
|
H A D | Verifier.cpp | 1897 Value *Op0 = MD->getOperand(0); local 1898 if (ConstantFP *CFP0 = dyn_cast_or_null<ConstantFP>(Op0)) {
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 1532 SDValue Op0, Op1; local 1539 if (!SelectAddr(Op.getNode(), Op, Op0, Op1)) 1544 OutOps.push_back(Op0);
|
/external/llvm/lib/Transforms/Scalar/ |
H A D | GVN.cpp | 2110 Value *Op0 = Cmp->getOperand(0), *Op1 = Cmp->getOperand(1); local 2116 Worklist.push_back(std::make_pair(Op0, Op1)); 2125 uint32_t Num = VN.lookup_or_add_cmp(Cmp->getOpcode(), NotPred, Op0, Op1);
|
H A D | LoopStrengthReduce.cpp | 3079 if (const SCEVConstant *Op0 = 3081 C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
|