/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/asn1/ |
H A D | ASN1Encoding.java | 6 static final String DL = "DL"; field in interface:ASN1Encoding
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/external/llvm/include/llvm/Support/ |
H A D | DebugLoc.h | 32 DebugLoc DL; local 33 DL.LineCol = 1; 34 return DL; 40 DebugLoc DL; local 41 DL.LineCol = 2; 42 return DL; 95 bool operator==(const DebugLoc &DL) const { 96 return LineCol == DL.LineCol && ScopeIdx == DL.ScopeIdx; 98 bool operator!=(const DebugLoc &DL) cons [all...] |
/external/llvm/lib/Target/R600/ |
H A D | AMDGPUISelLowering.cpp | 84 DebugLoc DL, SelectionDAG &DAG) const { 85 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain); 115 DebugLoc DL = Op.getDebugLoc(); local 123 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); 127 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); 129 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1), 132 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1), 135 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1), 138 return DAG.getNode(AMDGPUISD::FMIN, DL, VT, Op.getOperand(1), 141 return DAG.getNode(AMDGPUISD::SMIN, DL, V 78 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, DebugLoc DL, SelectionDAG &DAG) const argument 155 DebugLoc DL = Op.getDebugLoc(); local 167 DebugLoc DL = Op.getDebugLoc(); local 182 DebugLoc DL = Op.getDebugLoc(); local 243 DebugLoc DL = Op.getDebugLoc(); local [all...] |
H A D | SILowerControlFlow.cpp | 138 DebugLoc DL = From.getDebugLoc(); 139 BuildMI(*From.getParent(), &From, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ)) 147 DebugLoc DL = MI.getDebugLoc(); local 156 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ)) 161 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::EXP)) 173 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_ENDPGM)); 178 DebugLoc DL = MI.getDebugLoc(); local 182 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), Reg) 185 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), Reg) 196 DebugLoc DL local 214 DebugLoc DL = MI.getDebugLoc(); local 228 DebugLoc DL = MI.getDebugLoc(); local 243 DebugLoc DL = MI.getDebugLoc(); local 258 DebugLoc DL = MI.getDebugLoc(); local 274 DebugLoc DL = MI.getDebugLoc(); local 297 DebugLoc DL = MI.getDebugLoc(); local 314 DebugLoc DL = MI.getDebugLoc(); local 375 DebugLoc DL = MI.getDebugLoc(); local 393 DebugLoc DL = MI.getDebugLoc(); local [all...] |
H A D | AMDILISelLowering.cpp | 334 DebugLoc DL = Op.getDebugLoc(); local 344 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data); 350 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift); 352 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift); 356 Data = DAG.getSExtOrTrunc(Data, DL, Op.getOperand(0).getValueType()); 398 DebugLoc DL = Op.getDebugLoc(); local 416 SDValue jq = DAG.getNode(ISD::XOR, DL, OVT, LHS, RHS); 419 jq = DAG.getNode(ISD::SRA, DL, OVT, jq, DAG.getConstant(bitsize - 2, OVT)); 422 jq = DAG.getNode(ISD::OR, DL, OVT, jq, DAG.getConstant(1, OVT)); 425 jq = DAG.getSExtOrTrunc(jq, DL, INTT 479 DebugLoc DL = Op.getDebugLoc(); local 550 DebugLoc DL = Op.getDebugLoc(); local 567 DebugLoc DL = Op.getDebugLoc(); local 584 DebugLoc DL = Op.getDebugLoc(); local [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | Thumb1InstrInfo.cpp | 42 MachineBasicBlock::iterator I, DebugLoc DL, 45 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg) 63 DebugLoc DL; local 64 if (I != MBB.end()) DL = I->getDebugLoc(); 73 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi)) 91 DebugLoc DL; local 92 if (I != MBB.end()) DL = I->getDebugLoc(); 101 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg) 41 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
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H A D | A15SDOptimizer.cpp | 72 DebugLoc DL, 78 DebugLoc DL, 84 DebugLoc DL, 89 DebugLoc DL, 94 DebugLoc DL, unsigned DReg, unsigned Lane, 99 DebugLoc DL); 433 DebugLoc DL, 439 DL, 452 DebugLoc DL, 458 DL, 431 createDupLane(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL, unsigned Reg, unsigned Lane, bool QPR) argument 450 createExtractSubreg(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL, unsigned DReg, unsigned Lane, const TargetRegisterClass *TRC) argument 467 createRegSequence(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL, unsigned Reg1, unsigned Reg2) argument 486 createVExt(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL, unsigned Ssub0, unsigned Ssub1) argument 502 createInsertSubreg(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL, unsigned DReg, unsigned Lane, unsigned ToInsert) argument 519 createImplicitDef(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL) argument 536 DebugLoc DL = MI->getDebugLoc(); local [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SDNodeDbgValue.h | 49 DebugLoc DL; member in class:llvm::SDDbgValue 55 unsigned O) : mdPtr(mdP), Offset(off), DL(dl), Order(O), 65 mdPtr(mdP), Offset(off), DL(dl), Order(O), Invalid(false) { 72 mdPtr(mdP), Offset(off), DL(dl), Order(O), Invalid(false) { 99 DebugLoc getDebugLoc() { return DL; }
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/external/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.cpp | 69 MachineBasicBlock::iterator I, DebugLoc DL, 91 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc)); 105 DebugLoc DL; local 106 if (I != MBB.end()) DL = I->getDebugLoc(); 112 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) 121 DebugLoc DL; local 122 if (I != MBB.end()) DL = I->getDebugLoc(); 129 BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(0) 177 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); local 180 BuildMI(MBB, I, DL, ge 68 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 219 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); local 267 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); local 309 loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned &NewImm) const argument 412 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); local [all...] |
H A D | MipsISelLowering.cpp | 99 DebugLoc DL = Op.getDebugLoc(); local 103 return DAG.getNode(ISD::ADD, DL, Ty, 104 DAG.getNode(MipsISD::Hi, DL, Ty, Hi), 105 DAG.getNode(MipsISD::Lo, DL, Ty, Lo)); 110 DebugLoc DL = Op.getDebugLoc(); local 113 SDValue GOT = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty), 115 SDValue Load = DAG.getLoad(Ty, DL, DAG.getEntryNode(), GOT, 119 SDValue Lo = DAG.getNode(MipsISD::Lo, DL, Ty, getTargetNode(Op, DAG, LoFlag)); 120 return DAG.getNode(ISD::ADD, DL, Ty, Load, Lo); 125 DebugLoc DL local 136 DebugLoc DL = Op.getDebugLoc(); local 456 DebugLoc DL = ADDENode->getDebugLoc(); local 529 DebugLoc DL = SUBENode->getDebugLoc(); local 594 DebugLoc DL = N->getDebugLoc(); local 671 DebugLoc DL = Op.getDebugLoc(); local 682 createCMovFP(SelectionDAG &DAG, SDValue Cond, SDValue True, SDValue False, DebugLoc DL) argument 715 const DebugLoc DL = N->getDebugLoc(); local 839 DebugLoc DL = N->getDebugLoc(); local 1078 DebugLoc DL = MI->getDebugLoc(); local 1166 DebugLoc DL = MI->getDebugLoc(); local 1318 DebugLoc DL = MI->getDebugLoc(); local 1401 DebugLoc DL = MI->getDebugLoc(); local 1540 DebugLoc DL = Op.getDebugLoc(); local 1573 DebugLoc DL = Op.getDebugLoc(); local 1606 DebugLoc DL = Op.getDebugLoc(); local 1631 DebugLoc DL = Op.getDebugLoc(); local 1679 DebugLoc DL = GA->getDebugLoc(); local 1784 DebugLoc DL = Op.getDebugLoc(); local 1800 DebugLoc DL = Op.getDebugLoc(); local 1845 DebugLoc DL = Op.getDebugLoc(); local 1898 DebugLoc DL = Op.getDebugLoc(); local 1927 DebugLoc DL = Op.getDebugLoc(); local 1962 DebugLoc DL = Op.getDebugLoc(); local 1998 DebugLoc DL = Op.getDebugLoc(); local 2017 DebugLoc DL = Op.getDebugLoc(); local 2027 DebugLoc DL = Op.getDebugLoc(); local 2034 DebugLoc DL = Op.getDebugLoc(); local 2065 DebugLoc DL = Op.getDebugLoc(); local 2109 DebugLoc DL = LD->getDebugLoc(); local 2175 DebugLoc DL = LD->getDebugLoc(); local 2187 DebugLoc DL = SD->getDebugLoc(); local 2250 DebugLoc DL = Op.getDebugLoc(); local 2519 passArgOnStack(SDValue StackPtr, unsigned Offset, SDValue Chain, SDValue Arg, DebugLoc DL, bool IsTailCall, SelectionDAG &DAG) const argument 2586 DebugLoc &DL = CLI.DL; local 2781 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, const SDNode *CallNode, const Type *RetTy) const argument 2819 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2985 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, DebugLoc DL, SelectionDAG &DAG) const argument 3578 copyByValRegs(SDValue Chain, DebugLoc DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, const MipsCC &CC, const ByValArgInfo &ByVal) const argument 3622 passByValArg(SDValue Chain, DebugLoc DL, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, const MipsCC &CC, const ByValArgInfo &ByVal, const ISD::ArgFlagsTy &Flags, bool isLittle) const argument 3718 writeVarArgRegs(std::vector<SDValue> &OutChains, const MipsCC &CC, SDValue Chain, DebugLoc DL, SelectionDAG &DAG) const argument [all...] |
H A D | MipsSEISelDAGToDAG.cpp | 87 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); local 107 BuildMI(MBB, I, DL, TII.get(Mips::LUi64), V0) 109 BuildMI(MBB, I, DL, TII.get(Mips::DADDu), V1).addReg(V0) 111 BuildMI(MBB, I, DL, TII.get(Mips::DADDiu), GlobalBaseReg).addReg(V1) 121 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0) 123 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0) 136 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0) 138 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), V1).addReg(V0).addReg(Mips::T9); 139 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V1) 165 BuildMI(MBB, I, DL, TI 182 selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty, bool HasLo, bool HasHi) argument 201 selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, DebugLoc DL, SDNode *Node) const argument 304 DebugLoc DL = Node->getDebugLoc(); local 402 DebugLoc DL = CN->getDebugLoc(); local [all...] |
H A D | MipsLongBranch.cpp | 83 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL, 219 DebugLoc DL, MachineBasicBlock *MBBOpnd) { 223 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc); 245 DebugLoc DL = I.Br->getDebugLoc(); local 283 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) 285 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA) 289 .append(BuildMI(*MF, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB)) 290 .append(BuildMI(*MF, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi)); 294 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::AT) 296 BuildMI(*BalTgtMBB, Pos, DL, TI 218 replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL, MachineBasicBlock *MBBOpnd) argument 393 DebugLoc DL = MBB.findDebugLoc(MBB.begin()); local [all...] |
H A D | Mips16ISelDAGToDAG.cpp | 40 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty, argument 43 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0), 49 Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag); 54 Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag); 69 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); local 78 BuildMI(MBB, I, DL, TII.get(Mips::LiRxImmX16), V0) 80 BuildMI(MBB, I, DL, TII.get(Mips::AddiuRxPcImmX16), V1) 82 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16); 83 BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg) 99 DebugLoc DL local 233 DebugLoc DL = Node->getDebugLoc(); local [all...] |
H A D | Mips16RegisterInfo.cpp | 69 DebugLoc DL; local 70 TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true); 71 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); 135 DebugLoc DL = II->getDebugLoc(); local 137 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
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H A D | MipsInstrInfo.cpp | 50 DebugLoc DL; local 51 BuildMI(MBB, MI, DL, get(Mips::NOP)); 67 DebugLoc DL) const { 68 MachineInstrBuilder MIB = BuildMI(MF, DL, get(Mips::DBG_VALUE)) 104 MachineBasicBlock *TBB, DebugLoc DL, 109 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID); 126 DebugLoc DL) const { 140 BuildCondBr(MBB, TBB, DL, Cond); 141 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(FBB); 148 BuildMI(&MBB, DL, ge 103 BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL, const SmallVectorImpl<MachineOperand>& Cond) const argument [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430FrameLowering.cpp | 49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); local 66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) 70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW) 86 DL = MBBI->getDebugLoc(); 98 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW) 115 DebugLoc DL = MBBI->getDebugLoc(); local 135 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FPW); 148 DL = MBBI->getDebugLoc(); 156 BuildMI(MBB, MBBI, DL, 160 BuildMI(MBB, MBBI, DL, [all...] |
H A D | MSP430TargetMachine.h | 34 const DataLayout DL; // Calculates type size & alignment member in class:llvm::MSP430TargetMachine 50 virtual const DataLayout *getDataLayout() const { return &DL;}
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreInstrInfo.cpp | 278 DebugLoc DL)const{ 287 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB); 291 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) 300 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) 302 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB); 335 MachineBasicBlock::iterator I, DebugLoc DL, 342 BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg) 349 BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg).addImm(0); 354 BuildMI(MBB, I, DL, get(XCore::SETSP_1r)) 368 DebugLoc DL; local 334 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 382 DebugLoc DL; local [all...] |
H A D | XCoreTargetMachine.h | 29 const DataLayout DL; // Calculates type size & alignment member in class:llvm::XCoreTargetMachine 56 virtual const DataLayout *getDataLayout() const { return &DL; }
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H A D | XCoreInstrInfo.h | 60 DebugLoc DL) const; 65 MachineBasicBlock::iterator I, DebugLoc DL, 85 DebugLoc DL) const;
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXInstrInfo.cpp | 37 MachineBasicBlock::iterator I, DebugLoc DL, 42 BuildMI(MBB, I, DL, get(NVPTX::IMOV32rr), DestReg) 46 BuildMI(MBB, I, DL, get(NVPTX::IMOV8rr), DestReg) 50 BuildMI(MBB, I, DL, get(NVPTX::IMOV1rr), DestReg) 54 BuildMI(MBB, I, DL, get(NVPTX::FMOV32rr), DestReg) 58 BuildMI(MBB, I, DL, get(NVPTX::IMOV16rr), DestReg) 62 BuildMI(MBB, I, DL, get(NVPTX::IMOV64rr), DestReg) 66 BuildMI(MBB, I, DL, get(NVPTX::FMOV64rr), DestReg) 265 DebugLoc DL) const { 274 BuildMI(&MBB, DL, ge 36 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetMachine.h | 30 const DataLayout DL; member in class:llvm::AArch64TargetMachine 59 const DataLayout *getDataLayout() const { return &DL; }
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/external/llvm/include/llvm/CodeGen/ |
H A D | MachineInstrBuilder.h | 224 DebugLoc DL, 226 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); 233 DebugLoc DL, 236 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) 246 DebugLoc DL, 250 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); 257 DebugLoc DL, 261 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); 268 DebugLoc DL, 273 return BuildMI(BB, MII, DL, MCI 223 BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID) argument 232 BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID, unsigned DestReg) argument 244 BuildMI(MachineBasicBlock &BB, MachineBasicBlock::iterator I, DebugLoc DL, const MCInstrDesc &MCID, unsigned DestReg) argument 255 BuildMI(MachineBasicBlock &BB, MachineBasicBlock::instr_iterator I, DebugLoc DL, const MCInstrDesc &MCID, unsigned DestReg) argument 266 BuildMI(MachineBasicBlock &BB, MachineInstr *I, DebugLoc DL, const MCInstrDesc &MCID, unsigned DestReg) argument 284 BuildMI(MachineBasicBlock &BB, MachineBasicBlock::iterator I, DebugLoc DL, const MCInstrDesc &MCID) argument 294 BuildMI(MachineBasicBlock &BB, MachineBasicBlock::instr_iterator I, DebugLoc DL, const MCInstrDesc &MCID) argument 304 BuildMI(MachineBasicBlock &BB, MachineInstr *I, DebugLoc DL, const MCInstrDesc &MCID) argument 321 BuildMI(MachineBasicBlock *BB, DebugLoc DL, const MCInstrDesc &MCID) argument 331 BuildMI(MachineBasicBlock *BB, DebugLoc DL, const MCInstrDesc &MCID, unsigned DestReg) argument [all...] |
/external/llvm/include/llvm/Analysis/ |
H A D | PtrUseVisitor.h | 105 const DataLayout &DL; member in class:llvm::detail::PtrUseVisitorBase 151 PtrUseVisitorBase(const DataLayout &DL) : DL(DL) {} argument 199 PtrUseVisitor(const DataLayout &DL) : PtrUseVisitorBase(DL) {} argument 208 IntegerType *IntPtrTy = cast<IntegerType>(DL.getIntPtrType(I.getType()));
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/external/llvm/tools/llvm-dis/ |
H A D | llvm-dis.cpp | 56 static void printDebugLoc(const DebugLoc &DL, formatted_raw_ostream &OS) { argument 57 OS << DL.getLine() << ":" << DL.getCol(); 58 if (MDNode *N = DL.getInlinedAt(getGlobalContext())) { 81 const DebugLoc &DL = I->getDebugLoc(); local 82 if (!DL.isUnknown()) { 89 printDebugLoc(DL,OS);
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