/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 400 SmallVector<SDValue, 8> MemOpChains; local 441 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 458 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 491 MemOpChains.push_back(DAG.getStore(Chain, dl, Lo, PtrOff, 501 MemOpChains.push_back(DAG.getStore(Chain, dl, Hi, PtrOff, 507 MemOpChains.push_back(DAG.getStore(Chain, dl, Lo, PtrOff, 532 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 539 if (!MemOpChains.empty()) 541 &MemOpChains[0], MemOpChains [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 2922 SmallVector<SDValue, 8> &MemOpChains, 2929 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, FIN, 3045 bool isVector, SmallVector<SDValue, 8> &MemOpChains, 3059 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 3560 SmallVector<SDValue, 8> MemOpChains; local 3619 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 3630 if (!MemOpChains.empty()) 3632 &MemOpChains[0], MemOpChains.size()); 3769 SmallVector<SDValue, 8> MemOpChains; local 2919 StoreTailCallArgumentsToStackSlot(SelectionDAG &DAG, SDValue Chain, const SmallVector<TailCallArgumentInfo, 8> &TailCallArgs, SmallVector<SDValue, 8> &MemOpChains, DebugLoc dl) argument 3042 LowerMemOpCallTo(SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue Arg, SDValue PtrOff, int SPDiff, unsigned ArgOffset, bool isPPC64, bool isTailCall, bool isVector, SmallVector<SDValue, 8> &MemOpChains, SmallVector<TailCallArgumentInfo, 8> &TailCallArguments, DebugLoc dl) argument 4150 SmallVector<SDValue, 8> MemOpChains; local [all...] |
/external/llvm/lib/Target/MBlaze/ |
H A D | MBlazeISelLowering.cpp | 725 SmallVector<SDValue, 8> MemOpChains; local 770 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 783 if (!MemOpChains.empty()) 785 &MemOpChains[0], MemOpChains.size());
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 482 SmallVector<SDValue, 12> MemOpChains; local 536 MemOpChains.push_back(MemOp); 542 if (!MemOpChains.empty()) 544 &MemOpChains[0], MemOpChains.size());
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 450 SmallVector<SDValue, 8> MemOpChains; local 488 MemOpChains.push_back(CreateCopyOfByValArgument(Arg, PtrOff, Chain, 493 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 509 if (!MemOpChains.empty()) { 510 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0], 511 MemOpChains.size());
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 420 SmallVector<SDValue, 8> &MemOpChains,
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H A D | ARMISelLowering.cpp | 1319 SmallVector<SDValue, 8> &MemOpChains, 1333 MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, fmrrd.getValue(1), 1399 SmallVector<SDValue, 8> MemOpChains; local 1438 VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); 1443 VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); 1447 MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Op1, 1452 StackPtr, MemOpChains, Flags); 1471 MemOpChains.push_back(Load.getValue(1)); 1491 MemOpChains.push_back(DAG.getNode(ARMISD::COPY_STRUCT_BYVAL, dl, VTs, 1497 MemOpChains 1314 PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVector<SDValue, 8> &MemOpChains, ISD::ArgFlagsTy Flags) const argument [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.h | 360 SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr,
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H A D | MipsISelLowering.cpp | 2639 SmallVector<SDValue, 8> MemOpChains; local 2656 passByValArg(Chain, DL, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg, 2709 MemOpChains.push_back(passArgOnStack(StackPtr, VA.getLocMemOffset(), 2715 if (!MemOpChains.empty()) 2717 &MemOpChains[0], MemOpChains.size()); 3624 SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr, 3646 MemOpChains.push_back(LoadVal.getValue(1)); 3675 MemOpChains.push_back(LoadVal.getValue(1)); 3714 MemOpChains 3622 passByValArg(SDValue Chain, DebugLoc DL, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, SmallVector<SDValue, 8> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, const MipsCC &CC, const ByValArgInfo &ByVal, const ISD::ArgFlagsTy &Flags, bool isLittle) const argument [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 955 SmallVector<SDValue, 12> MemOpChains; local 986 MemOpChains.push_back(DAG.getNode(XCoreISD::STWSP, dl, MVT::Other, 994 if (!MemOpChains.empty()) 996 &MemOpChains[0], MemOpChains.size());
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1154 SmallVector<SDValue, 8> MemOpChains; local 1236 MemOpChains.push_back(Cpy); 1241 MemOpChains.push_back(Store); 1248 if (!MemOpChains.empty()) 1250 &MemOpChains[0], MemOpChains.size());
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2364 SmallVector<SDValue, 8> MemOpChains; local 2430 MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Arg, 2435 if (!MemOpChains.empty()) 2437 &MemOpChains[0], MemOpChains.size());
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