History log of /external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
d113448c1dd5f40522c3c02db96e87a9eb59eaf4 06-Aug-2013 Tim Northover <tnorthover@apple.com> Refactor isInTailCallPosition handling

This change came about primarily because of two issues in the existing code.
Niether of:

define i64 @test1(i64 %val) {
%in = trunc i64 %val to i32
tail call i32 @ret32(i32 returned %in)
ret i64 %val
}

define i64 @test2(i64 %val) {
tail call i32 @ret32(i32 returned undef)
ret i32 42
}

should be tail calls, and the function sameNoopInput is responsible. The main
problem is that it is completely symmetric in the "tail call" and "ret" value,
but in reality different things are allowed on each side.

For these cases:
1. Any truncation should lead to a larger value being generated by "tail call"
than needed by "ret".
2. Undef should only be allowed as a source for ret, not as a result of the
call.

Along the way I noticed that a mismatch between what this function treats as a
valid truncation and what the backends see can lead to invalid calls as well
(see x86-32 test case).

This patch refactors the code so that instead of being based primarily on
values which it recurses into when necessary, it starts by inspecting the type
and considers each fundamental slot that the backend will see in turn. For
example, given a pathological function that returned {{}, {{}, i32, {}}, i32}
we would consider each "real" i32 in turn, and ask if it passes through
unchanged. This is much closer to what the backend sees as a result of
ComputeValueVTs.

Aside from the bug fixes, this eliminates the recursion that's going on and, I
believe, makes the bulk of the code significantly easier to understand. The
trade-off is the nasty iterators needed to find the real types inside a
returned value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187787 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
a0ec3f9b7b826b9b40b80199923b664bad808cce 14-Jul-2013 Craig Topper <craig.topper@gmail.com> Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
f349a6e9e6ee0b589c403e0c5785266da121d05c 04-Jul-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.

These exception-related opcodes are not used any longer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
c93822901aef17aaf8bb1303f27b47025fd1d582 04-Jul-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Revert r185595-185596 which broke buildbots.

Revert "Simplify landing pad lowering."
Revert "Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
62204220e1dc2dc21256adf765728ae257b33eac 04-Jul-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.

These exception-related opcodes are not used any longer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185596 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
5b3fca50a08865f0db55fc92ad1c037a04e12177 22-Jun-2013 Chad Rosier <mcrosier@apple.com> The getRegForInlineAsmConstraint function should only accept MVT value types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
6e0b2a0cb0d398f175a5294bf0ad5488c714e8c2 30-May-2013 Andrew Trick <atrick@apple.com> Order CALLSEQ_START and CALLSEQ_END nodes.

Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.

Patch by Xiaoyi Guo!

This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
ac6d9bec671252dd1e596fa71180ff6b39d06b5d 25-May-2013 Andrew Trick <atrick@apple.com> Track IR ordering of SelectionDAG nodes 2/4.

Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
b4b14070a46d8de683231e95067fffde6aa36750 21-May-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: SelectionDAG should not use MVT::Other to check the legality of BR_CC.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182390 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
f931f691ee23d431135481fcf23a58658824ca67 07-May-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: Fix Small Data support to handle -G 0 correctly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
ddcf3ee768d41f16c6f10c38f7faee440d6b9f55 07-May-2013 Jyotsna Verma <jverma@codeaurora.org> Reverting r181331.
Missing file, HexagonSplitConst32AndConst64.cpp, from lib/Target/Hexagon/CMakeLists.txt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
81fda3b4d55886ba40093e818125679bec126866 07-May-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: Fix Small Data support to handle -G 0 correctly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
6ea706e40e841c148bc47bcac4dcca5e0f0245eb 01-May-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: Use multiclass for Jump instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
6265d5c91a18b2fb6499eb581c488315880c044d 20-Apr-2013 Tim Northover <Tim.Northover@arm.com> Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
0e58d92628486aee7e4745d451c37a9b409adf7a 04-Apr-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: Expand br_cc.

It fixes following tests for Hexagon:

CodeGen/Generic/2003-07-29-BadConstSbyte.ll
CodeGen/Generic/2005-10-21-longlonggtu.ll
CodeGen/Generic/2009-04-28-i128-cmp-crash.ll
CodeGen/Generic/MachineBranchProb.ll
CodeGen/Generic/builtin-expect.ll
CodeGen/Generic/pr12507.ll



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178794 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
3ef5383b3537a420c5e2ab3e657c378e5185549d 08-Mar-2013 Tom Stellard <thomas.stellard@amd.com> DAGCombiner: Use correct value type for checking legality of BR_CC v3

LegalizeDAG.cpp uses the value of the comparison operands when checking
the legality of BR_CC, so DAGCombiner should do the same.

v2:
- Expand more BR_CC value types for NVPTX

v3:
- Expand correct BR_CC value types for Hexagon, Mips, and XCore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176694 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
a4dd8d67320d86ca7dfd88cb3d0c189cab713a88 07-Mar-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: Handle i8, i16 and i1 Var Args.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176647 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
b6716187ca8cc33817fb7446d9d9bdcb708c3f35 07-Mar-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: Add support to lower block address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176637 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
0d44328ce89b19602074676378a92c3b36bb0d83 05-Mar-2013 Jyotsna Verma <jverma@codeaurora.org> reverting patch 176508.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
c34f17140fb3bc66ba48af9beb5060d4064b353f 05-Mar-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: Add support for lowering block address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176508 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
18daead3ff41902a61ff3344cfa77ac8aba5586d 05-Mar-2013 Jyotsna Verma <jverma@codeaurora.org> Hexagon: Expand addc, adde, subc and sube.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176505 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
6585d3b64b04b788faad79ba6cf4e592ebf4658d 21-Feb-2013 Anshuman Dasgupta <adasgupt@codeaurora.org> Hexagon: Expand cttz, ctlz, and ctpop for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
3450f800aa65c91f0496816ba6061a422a74c1fe 20-Feb-2013 Jim Grosbach <grosbach@apple.com> Update TargetLowering ivars for name policy.

http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly

ivars should be camel-case and start with an upper-case letter. A few in
TargetLowering were starting with a lower-case letter.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
87b87ad8fb8671efb5577dbfd40c02248862cc8d 05-Feb-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Move MRI liveouts to Hexagon return instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174407 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
8688a58c53b46d2dda9bf50dafd5195790a7ed58 29-Jan-2013 Evan Cheng <evan.cheng@apple.com> Teach SDISel to combine fsin / fcos into a fsincos node if the following
conditions are met:
1. They share the same operand and are in the same BB.
2. Both outputs are used.
3. The target has a native instruction that maps to ISD::FSINCOS node or
the target provides a sincos library call.

Implemented the generic optimization in sdisel and enabled it for
Mac OSX. Also added an additional optimization for x86_64 Mac OSX by
using an alternative entry point __sincos_stret which returns the two
results in xmm0 / xmm1.

rdar://13087969
PR13204


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
510db8bcb959fa69a93c42b58cb3e0ab28d03825 14-Jan-2013 Dmitri Gribenko <gribozavr@gmail.com> Improve r172468: const_cast is not needed here


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172483 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
ef44c353599e0e2fd5b2ec2ae5d9bc0e2a355cad 14-Jan-2013 David Greene <greened@obbligato.org> Fix Another Cast

Properly cast code to eliminate cast-away-const errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
0b8c9a80f20772c3793201ab5b251d3520b9cea3 02-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
d04a8d4b33ff316ca4cf961e06c9e312eff8e64f 03-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
6ee1e0867d24dff28683ec3525e61472c597b6af 21-Nov-2012 Rafael Espindola <rafael.espindola@gmail.com> Finish the renaming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168437 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
1a37d7e807ad6cc71fe3cffdf6674644c46a60eb 25-Sep-2012 Sebastian Pop <spop@codeaurora.org> TargetLowering interface to set/get minimum block entries for jump tables.

Provide interface in TargetLowering to set or get the minimum number of basic
blocks whereby jump tables are generated for switch statements rather than an
if sequence.

getMinimumJumpTableEntries() defaults to 4.
setMinimumJumpTableEntries() allows target configuration.

This patch changes the default for the Hexagon architecture to 5
as it improves performance on some benchmarks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
56cb2298663017eb77aa4f4dda8db7ecd1b58173 19-Jul-2012 Bill Wendling <isanbard@gmail.com> Remove tabs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160477 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
d9b0b025612992a0b724eeca8bdf10b1d7a5c355 02-Jun-2012 Benjamin Kramer <benny.kra@googlemail.com> Fix typos found by http://github.com/lyda/misspell-check

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
d2ea0e10cbd158c93fb870cdd03001b9cd1156b8 25-May-2012 Justin Holewinski <jholewinski@nvidia.com> Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall
to pass around a struct instead of a large set of individual values. This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.

NV_CONTRIB

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
7517bbc91ae1c60d3c7df8b11642c7a5bb3d5a71 10-May-2012 Sirish Pande <spande@codeaurora.org> Hexagon V5 FP Support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
d410eaba04211d53a523a518a5e315eb24c1072f 23-Apr-2012 Chandler Carruth <chandlerc@gmail.com> Revert r155365, r155366, and r155367. All three of these have regression
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
15e56ad8855ff2d135a79efa71b540852acf3b97 23-Apr-2012 Sirish Pande <spande@codeaurora.org> Hexagon V5 (floating point) support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
8959393533bfbdcbbfe3c5f336729394896100ce 21-Apr-2012 NAKAMURA Takumi <geek4civic@gmail.com> llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build on MSVC.

Thanks to Andy Gibbs, to report the issue.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
d2f16a292baed68a42f3db8e3c9d84030e3f4d09 21-Apr-2012 NAKAMURA Takumi <geek4civic@gmail.com> HexagonISelLowering.cpp: Reorder #includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155286 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
420761a0f193e87d08ee1c51b26bba23ab4bac7f 20-Apr-2012 Craig Topper <craig.topper@gmail.com> Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
37097623bbde5420f81ab8d1d056700f8f258025 18-Apr-2012 Chandler Carruth <chandlerc@gmail.com> This reverts a long string of commits to the Hexagon backend. These
commits have had several major issues pointed out in review, and those
issues are not being addressed in a timely fashion. Furthermore, this
was all committed leading up to the v3.1 branch, and we don't need piles
of code with outstanding issues in the branch.

It is possible that not all of these commits were necessary to revert to
get us back to a green state, but I'm going to let the Hexagon
maintainer sort that out. They can recommit, in order, after addressing
the feedback.

Reverted commits, with some notes:

Primary commit r154616: HexagonPacketizer
- There are lots of review comments here. This is the primary reason
for reverting. In particular, it introduced large amount of warnings
due to a bad construct in tablegen.
- Follow-up commits that should be folded back into this when
reposting:
- r154622: CMake fixes
- r154660: Fix numerous build warnings in release builds.
- Please don't resubmit this until the three commits above are
included, and the issues in review addressed.

Primary commit r154695: Pass to replace transfer/copy ...
- Reverted to minimize merge conflicts. I'm not aware of specific
issues with this patch.

Primary commit r154703: New Value Jump.
- Primarily reverted due to merge conflicts.
- Follow-up commits that should be folded back into this when
reposting:
- r154703: Remove iostream usage
- r154758: Fix CMake builds
- r154759: Fix build warnings in release builds
- Please incorporate these fixes and and review feedback before
resubmitting.

Primary commit r154829: Hexagon V5 (floating point) support.
- Primarily reverted due to merge conflicts.
- Follow-up commits that should be folded back into this when
reposting:
- r154841: Remove unused variable (fixing build warnings)

There are also accompanying Clang commits that will be reverted for
consistency.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
8834559626272c8c5fc5f941d933968354421a84 16-Apr-2012 David Blaikie <dblaikie@gmail.com> Remove unused variable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154841 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
87eb92d913c2e3cdeb08b0a22250cd6c3214a3ff 16-Apr-2012 Sirish Pande <spande@codeaurora.org> Hexagon V5 (Floating Point) Support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
79aa3417eb6f58d668aadfedf075240a41d35a26 17-Mar-2012 Craig Topper <craig.topper@gmail.com> Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
c5eaae4e9bc75b203b3a9922b480729bc4f340e2 11-Mar-2012 Craig Topper <craig.topper@gmail.com> Convert more static tables of registers used by calling convention to uint16_t to reduce space.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
4bfcd4acbc7d12aa55f8de9af84a38422f0f6d83 28-Feb-2012 Evan Cheng <evan.cheng@apple.com> Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
20bd5296cec8d8d597ab9db2aca7346a88e580c8 28-Feb-2012 Daniel Dunbar <daniel@zuster.org> Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
ec52aaa12f57896fc806e849fa21a61603050ac4 28-Feb-2012 Evan Cheng <evan.cheng@apple.com> Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.

Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.

rdar://8979299


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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
bc2198133a1836598b54b943420748e75d5dea94 07-Feb-2012 Craig Topper <craig.topper@gmail.com> Convert assert(0) to llvm_unreachable

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
ee498d3254b86bceb4f441741e9f442990647ce6 01-Feb-2012 Andrew Trick <atrick@apple.com> VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).

This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.

Patch by Sergei Larin!

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 20-Jan-2012 David Blaikie <dblaikie@gmail.com> More dead code removal (using -Wunreachable-code)

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
6da0ef9ca408ac39ba3af76f5571756792511134 06-Jan-2012 Chad Rosier <mcrosier@apple.com> Initializing to false makes better sense. Thanks, David.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
99eecd367662a5333555540dc2cbc5a515410302 06-Jan-2012 Chad Rosier <mcrosier@apple.com> Fix uninitialized variable warning.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
4c1ea552c54eefceeb7489a794a6d18b01c29900 18-Dec-2011 Benjamin Kramer <benny.kra@googlemail.com> Hexagon: Remove unused variables.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
63974b2144c87c962effdc0508c27643c8ad98b6 13-Dec-2011 Chandler Carruth <chandlerc@gmail.com> Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.

Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.

Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
b4b54153ad760c69a00a08531abef4ed434a5092 12-Dec-2011 Tony Linthicum <tlinth@codeaurora.org> Hexagon backend support

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/external/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp