| c18f4efc5dd24adcc653806455fc7ae8508e9c66 |
|
28-Jul-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Added encoding prefixes for KNL instructions (EVEX).
Added 512-bit operands printing.
Added instruction formats for KNL instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| 46d7de7a192f43eb568c26c88e2dc2b804c09614 |
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21-Jun-2013 |
Kevin Enderby <enderby@apple.com> |
Update the X86 disassembler to use xacquire and xrelease when appropriate.
This is a bit tricky as the xacquire and xrelease hints use the same bytes,
0xf2 and 0xf3, as the repne and rep prefixes.
Fortunately llvm has different llvm MCInst Opcode enums for rep/xrelease
and repne/xacquire. So to make this work a boolean was added the
InternalInstruction struct as part of the Prefix state which is set with the
added logic in readPrefixes() when decoding an instruction to determine
if these prefix bytes are to be disassembled as xacquire or xrelease. Then
we let the matcher pick the normal prefix instructionID and we change the
Opcode after that when it is set into the MCInst being created.
rdar://11019859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| 9e6dc8b9e70c98fc269303a5a94f0476942fb35a |
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11-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Change unsigned to a uint16_t in static disassembler tables to reduce the table size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163594 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| b438615abdc826a2fef33895b50dc60e3f39f988 |
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05-Sep-2012 |
Roman Divacky <rdivacky@freebsd.org> |
Use const properly so that we dont remove const qualifier from region and MII
by casting. Found with gcc48.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163247 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| 5a2c607153993fb7f7e04f9482520b64dffe5757 |
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01-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161101 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| a40476f9cc87681fd30af66085797dc3e60f8a94 |
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31-Jul-2012 |
Craig Topper <craig.topper@gmail.com> |
Tidy up trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161027 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| 1f7a1b68a07ea6bdf521525a7928f4a8c5216713 |
|
26-Jun-2012 |
Manman Ren <mren@apple.com> |
X86: add GATHER intrinsics (AVX2) in LLVM
Support the following intrinsics:
llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd
llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256
llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps
llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256
Modified Disassembler to handle VSIB addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| b80d571ea85db5d52fafed0523cf59e693502198 |
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23-Feb-2012 |
Kevin Enderby <enderby@apple.com> |
Updated the llvm-mc disassembler C API to support for the X86 target.
rdar://10873652
As part of this I updated the llvm-mc disassembler C API to always call the
SymbolLookUp call back even if there is no getOpInfo call back. If there is a
getOpInfo call back that is tried first and then if that gets no information
then the SymbolLookUp is called. I also made the code more robust by
memset(3)'ing to zero the LLVMOpInfo1 struct before then setting
SymbolicOp.Value before for the call to getOpInfo. And also don't use any
values from the LLVMOpInfo1 struct if getOpInfo returns 0. And also don't
use any of the ReferenceType or ReferenceName values from SymbolLookUp if it
returns NULL. rdar://10873563 and rdar://10873683
For the X86 target also fixed bugs so the annotations get printed.
Also fixed a few places in the ARM target that was not producing symbolic
operands for some instructions. rdar://10878166
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151267 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| 31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| 6b30274e27fc65752abb2e1fe48b538ccd824a24 |
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11-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Don't mix declarations and code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150305 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| 953362cdfbf1088153f65376c86d22ee0176bcdf |
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11-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Reuse the enum names from X86Desc in the X86Disassembler.
This requires some gymnastics to make it available for C code. Remove the names
from the disassembler tables, making them relocation free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150303 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| ce8f4c58d8804ee2cfda7751cdc6520bc5f43dd7 |
|
09-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Flatten some of the arrays in the X86 disassembler tables to reduce space needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150161 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|
| 7a2bdde0a0eebcd2125055e0eacaca040f0b766c |
|
15-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
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| a21e2eae3def2fe39caed861dcb73c76c715569b |
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15-Mar-2011 |
Sean Callanan <scallanan@apple.com> |
X86 table-generator and disassembler support for the AVX
instruction set. This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures. Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|
| 89e59e6343303696e14d4c134582dda083cf7408 |
|
21-Feb-2011 |
Sean Callanan <scallanan@apple.com> |
Fixed a bug in the X86 disassembler where a member of the
X86 instruction decode structure was being interpreted as
being in units of bits, although it is actually stored in
units of bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126147 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|
| 4d1dca92bd6d4aad7121e28c7ffc93c0a6a187d7 |
|
23-Oct-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Make the disassembler tables const so they end up in read-only memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117206 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|
| 1a8b789a4b8290d263c1c75411788ca45bae3230 |
|
06-May-2010 |
Sean Callanan <scallanan@apple.com> |
Eliminated the classification of control registers into %ecr_
and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|
| a144c3f34dd8adc093d9be6cbc3e6f39d47c75dd |
|
02-Apr-2010 |
Sean Callanan <scallanan@apple.com> |
Fixes to the X86 disassembler. The disassembler will now
return an error status in all failure cases, printing
messages to debugs() only when debugging is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100229 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|
| 5227cc89f4af63488c7b4bcec306b5cfb706501d |
|
23-Dec-2009 |
Sean Callanan <scallanan@apple.com> |
More fixes for Visual C++. Replaced several very small
static inline functions with macros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91973 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|
| 06b766d1c0ff7373e911fe5f8c42f62aa2f67e92 |
|
22-Dec-2009 |
Sean Callanan <scallanan@apple.com> |
Changed REG_* to MODRM_REG_* to avoid conflicts
with symbols in AuroraUX's global namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|
| 8ed9f51663bc5533f36ca62e5668ae08e9a1313f |
|
19-Dec-2009 |
Sean Callanan <scallanan@apple.com> |
Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
incarnations), integrated into the MC framework.
The disassembler is table-driven, using a custom TableGen backend to
generate hierarchical tables optimized for fast decode. The disassembler
consumes MemoryObjects and produces arrays of MCInsts, adhering to the
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).
The disassembler is documented in detail in
- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)
You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets. Please let me know if you encounter any problems
with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91749 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
|