1/*===-- X86DisassemblerDecoderInternal.h - Disassembler decoder ---*- C -*-===* 2 * 3 * The LLVM Compiler Infrastructure 4 * 5 * This file is distributed under the University of Illinois Open Source 6 * License. See LICENSE.TXT for details. 7 * 8 *===----------------------------------------------------------------------===* 9 * 10 * This file is part of the X86 Disassembler. 11 * It contains the public interface of the instruction decoder. 12 * Documentation for the disassembler can be found in X86Disassembler.h. 13 * 14 *===----------------------------------------------------------------------===*/ 15 16#ifndef X86DISASSEMBLERDECODER_H 17#define X86DISASSEMBLERDECODER_H 18 19#ifdef __cplusplus 20extern "C" { 21#endif 22 23#define INSTRUCTION_SPECIFIER_FIELDS \ 24 uint16_t operands; 25 26#define INSTRUCTION_IDS \ 27 uint16_t instructionIDs; 28 29#include "X86DisassemblerDecoderCommon.h" 30 31#undef INSTRUCTION_SPECIFIER_FIELDS 32#undef INSTRUCTION_IDS 33 34/* 35 * Accessor functions for various fields of an Intel instruction 36 */ 37#define modFromModRM(modRM) (((modRM) & 0xc0) >> 6) 38#define regFromModRM(modRM) (((modRM) & 0x38) >> 3) 39#define rmFromModRM(modRM) ((modRM) & 0x7) 40#define scaleFromSIB(sib) (((sib) & 0xc0) >> 6) 41#define indexFromSIB(sib) (((sib) & 0x38) >> 3) 42#define baseFromSIB(sib) ((sib) & 0x7) 43#define wFromREX(rex) (((rex) & 0x8) >> 3) 44#define rFromREX(rex) (((rex) & 0x4) >> 2) 45#define xFromREX(rex) (((rex) & 0x2) >> 1) 46#define bFromREX(rex) ((rex) & 0x1) 47 48#define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7) 49#define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6) 50#define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5) 51#define mmmmmFromVEX2of3(vex) ((vex) & 0x1f) 52#define wFromVEX3of3(vex) (((vex) & 0x80) >> 7) 53#define vvvvFromVEX3of3(vex) (((~(vex)) & 0x78) >> 3) 54#define lFromVEX3of3(vex) (((vex) & 0x4) >> 2) 55#define ppFromVEX3of3(vex) ((vex) & 0x3) 56 57#define rFromVEX2of2(vex) (((~(vex)) & 0x80) >> 7) 58#define vvvvFromVEX2of2(vex) (((~(vex)) & 0x78) >> 3) 59#define lFromVEX2of2(vex) (((vex) & 0x4) >> 2) 60#define ppFromVEX2of2(vex) ((vex) & 0x3) 61 62/* 63 * These enums represent Intel registers for use by the decoder. 64 */ 65 66#define REGS_8BIT \ 67 ENTRY(AL) \ 68 ENTRY(CL) \ 69 ENTRY(DL) \ 70 ENTRY(BL) \ 71 ENTRY(AH) \ 72 ENTRY(CH) \ 73 ENTRY(DH) \ 74 ENTRY(BH) \ 75 ENTRY(R8B) \ 76 ENTRY(R9B) \ 77 ENTRY(R10B) \ 78 ENTRY(R11B) \ 79 ENTRY(R12B) \ 80 ENTRY(R13B) \ 81 ENTRY(R14B) \ 82 ENTRY(R15B) \ 83 ENTRY(SPL) \ 84 ENTRY(BPL) \ 85 ENTRY(SIL) \ 86 ENTRY(DIL) 87 88#define EA_BASES_16BIT \ 89 ENTRY(BX_SI) \ 90 ENTRY(BX_DI) \ 91 ENTRY(BP_SI) \ 92 ENTRY(BP_DI) \ 93 ENTRY(SI) \ 94 ENTRY(DI) \ 95 ENTRY(BP) \ 96 ENTRY(BX) \ 97 ENTRY(R8W) \ 98 ENTRY(R9W) \ 99 ENTRY(R10W) \ 100 ENTRY(R11W) \ 101 ENTRY(R12W) \ 102 ENTRY(R13W) \ 103 ENTRY(R14W) \ 104 ENTRY(R15W) 105 106#define REGS_16BIT \ 107 ENTRY(AX) \ 108 ENTRY(CX) \ 109 ENTRY(DX) \ 110 ENTRY(BX) \ 111 ENTRY(SP) \ 112 ENTRY(BP) \ 113 ENTRY(SI) \ 114 ENTRY(DI) \ 115 ENTRY(R8W) \ 116 ENTRY(R9W) \ 117 ENTRY(R10W) \ 118 ENTRY(R11W) \ 119 ENTRY(R12W) \ 120 ENTRY(R13W) \ 121 ENTRY(R14W) \ 122 ENTRY(R15W) 123 124#define EA_BASES_32BIT \ 125 ENTRY(EAX) \ 126 ENTRY(ECX) \ 127 ENTRY(EDX) \ 128 ENTRY(EBX) \ 129 ENTRY(sib) \ 130 ENTRY(EBP) \ 131 ENTRY(ESI) \ 132 ENTRY(EDI) \ 133 ENTRY(R8D) \ 134 ENTRY(R9D) \ 135 ENTRY(R10D) \ 136 ENTRY(R11D) \ 137 ENTRY(R12D) \ 138 ENTRY(R13D) \ 139 ENTRY(R14D) \ 140 ENTRY(R15D) 141 142#define REGS_32BIT \ 143 ENTRY(EAX) \ 144 ENTRY(ECX) \ 145 ENTRY(EDX) \ 146 ENTRY(EBX) \ 147 ENTRY(ESP) \ 148 ENTRY(EBP) \ 149 ENTRY(ESI) \ 150 ENTRY(EDI) \ 151 ENTRY(R8D) \ 152 ENTRY(R9D) \ 153 ENTRY(R10D) \ 154 ENTRY(R11D) \ 155 ENTRY(R12D) \ 156 ENTRY(R13D) \ 157 ENTRY(R14D) \ 158 ENTRY(R15D) 159 160#define EA_BASES_64BIT \ 161 ENTRY(RAX) \ 162 ENTRY(RCX) \ 163 ENTRY(RDX) \ 164 ENTRY(RBX) \ 165 ENTRY(sib64) \ 166 ENTRY(RBP) \ 167 ENTRY(RSI) \ 168 ENTRY(RDI) \ 169 ENTRY(R8) \ 170 ENTRY(R9) \ 171 ENTRY(R10) \ 172 ENTRY(R11) \ 173 ENTRY(R12) \ 174 ENTRY(R13) \ 175 ENTRY(R14) \ 176 ENTRY(R15) 177 178#define REGS_64BIT \ 179 ENTRY(RAX) \ 180 ENTRY(RCX) \ 181 ENTRY(RDX) \ 182 ENTRY(RBX) \ 183 ENTRY(RSP) \ 184 ENTRY(RBP) \ 185 ENTRY(RSI) \ 186 ENTRY(RDI) \ 187 ENTRY(R8) \ 188 ENTRY(R9) \ 189 ENTRY(R10) \ 190 ENTRY(R11) \ 191 ENTRY(R12) \ 192 ENTRY(R13) \ 193 ENTRY(R14) \ 194 ENTRY(R15) 195 196#define REGS_MMX \ 197 ENTRY(MM0) \ 198 ENTRY(MM1) \ 199 ENTRY(MM2) \ 200 ENTRY(MM3) \ 201 ENTRY(MM4) \ 202 ENTRY(MM5) \ 203 ENTRY(MM6) \ 204 ENTRY(MM7) 205 206#define REGS_XMM \ 207 ENTRY(XMM0) \ 208 ENTRY(XMM1) \ 209 ENTRY(XMM2) \ 210 ENTRY(XMM3) \ 211 ENTRY(XMM4) \ 212 ENTRY(XMM5) \ 213 ENTRY(XMM6) \ 214 ENTRY(XMM7) \ 215 ENTRY(XMM8) \ 216 ENTRY(XMM9) \ 217 ENTRY(XMM10) \ 218 ENTRY(XMM11) \ 219 ENTRY(XMM12) \ 220 ENTRY(XMM13) \ 221 ENTRY(XMM14) \ 222 ENTRY(XMM15) \ 223 ENTRY(XMM16) \ 224 ENTRY(XMM17) \ 225 ENTRY(XMM18) \ 226 ENTRY(XMM19) \ 227 ENTRY(XMM20) \ 228 ENTRY(XMM21) \ 229 ENTRY(XMM22) \ 230 ENTRY(XMM23) \ 231 ENTRY(XMM24) \ 232 ENTRY(XMM25) \ 233 ENTRY(XMM26) \ 234 ENTRY(XMM27) \ 235 ENTRY(XMM28) \ 236 ENTRY(XMM29) \ 237 ENTRY(XMM30) \ 238 ENTRY(XMM31) 239 240#define REGS_YMM \ 241 ENTRY(YMM0) \ 242 ENTRY(YMM1) \ 243 ENTRY(YMM2) \ 244 ENTRY(YMM3) \ 245 ENTRY(YMM4) \ 246 ENTRY(YMM5) \ 247 ENTRY(YMM6) \ 248 ENTRY(YMM7) \ 249 ENTRY(YMM8) \ 250 ENTRY(YMM9) \ 251 ENTRY(YMM10) \ 252 ENTRY(YMM11) \ 253 ENTRY(YMM12) \ 254 ENTRY(YMM13) \ 255 ENTRY(YMM14) \ 256 ENTRY(YMM15) \ 257 ENTRY(YMM16) \ 258 ENTRY(YMM17) \ 259 ENTRY(YMM18) \ 260 ENTRY(YMM19) \ 261 ENTRY(YMM20) \ 262 ENTRY(YMM21) \ 263 ENTRY(YMM22) \ 264 ENTRY(YMM23) \ 265 ENTRY(YMM24) \ 266 ENTRY(YMM25) \ 267 ENTRY(YMM26) \ 268 ENTRY(YMM27) \ 269 ENTRY(YMM28) \ 270 ENTRY(YMM29) \ 271 ENTRY(YMM30) \ 272 ENTRY(YMM31) 273 274#define REGS_ZMM \ 275 ENTRY(ZMM0) \ 276 ENTRY(ZMM1) \ 277 ENTRY(ZMM2) \ 278 ENTRY(ZMM3) \ 279 ENTRY(ZMM4) \ 280 ENTRY(ZMM5) \ 281 ENTRY(ZMM6) \ 282 ENTRY(ZMM7) \ 283 ENTRY(ZMM8) \ 284 ENTRY(ZMM9) \ 285 ENTRY(ZMM10) \ 286 ENTRY(ZMM11) \ 287 ENTRY(ZMM12) \ 288 ENTRY(ZMM13) \ 289 ENTRY(ZMM14) \ 290 ENTRY(ZMM15) \ 291 ENTRY(ZMM16) \ 292 ENTRY(ZMM17) \ 293 ENTRY(ZMM18) \ 294 ENTRY(ZMM19) \ 295 ENTRY(ZMM20) \ 296 ENTRY(ZMM21) \ 297 ENTRY(ZMM22) \ 298 ENTRY(ZMM23) \ 299 ENTRY(ZMM24) \ 300 ENTRY(ZMM25) \ 301 ENTRY(ZMM26) \ 302 ENTRY(ZMM27) \ 303 ENTRY(ZMM28) \ 304 ENTRY(ZMM29) \ 305 ENTRY(ZMM30) \ 306 ENTRY(ZMM31) 307 308#define REGS_SEGMENT \ 309 ENTRY(ES) \ 310 ENTRY(CS) \ 311 ENTRY(SS) \ 312 ENTRY(DS) \ 313 ENTRY(FS) \ 314 ENTRY(GS) 315 316#define REGS_DEBUG \ 317 ENTRY(DR0) \ 318 ENTRY(DR1) \ 319 ENTRY(DR2) \ 320 ENTRY(DR3) \ 321 ENTRY(DR4) \ 322 ENTRY(DR5) \ 323 ENTRY(DR6) \ 324 ENTRY(DR7) 325 326#define REGS_CONTROL \ 327 ENTRY(CR0) \ 328 ENTRY(CR1) \ 329 ENTRY(CR2) \ 330 ENTRY(CR3) \ 331 ENTRY(CR4) \ 332 ENTRY(CR5) \ 333 ENTRY(CR6) \ 334 ENTRY(CR7) \ 335 ENTRY(CR8) 336 337#define ALL_EA_BASES \ 338 EA_BASES_16BIT \ 339 EA_BASES_32BIT \ 340 EA_BASES_64BIT 341 342#define ALL_SIB_BASES \ 343 REGS_32BIT \ 344 REGS_64BIT 345 346#define ALL_REGS \ 347 REGS_8BIT \ 348 REGS_16BIT \ 349 REGS_32BIT \ 350 REGS_64BIT \ 351 REGS_MMX \ 352 REGS_XMM \ 353 REGS_YMM \ 354 REGS_ZMM \ 355 REGS_SEGMENT \ 356 REGS_DEBUG \ 357 REGS_CONTROL \ 358 ENTRY(RIP) 359 360/* 361 * EABase - All possible values of the base field for effective-address 362 * computations, a.k.a. the Mod and R/M fields of the ModR/M byte. We 363 * distinguish between bases (EA_BASE_*) and registers that just happen to be 364 * referred to when Mod == 0b11 (EA_REG_*). 365 */ 366typedef enum { 367 EA_BASE_NONE, 368#define ENTRY(x) EA_BASE_##x, 369 ALL_EA_BASES 370#undef ENTRY 371#define ENTRY(x) EA_REG_##x, 372 ALL_REGS 373#undef ENTRY 374 EA_max 375} EABase; 376 377/* 378 * SIBIndex - All possible values of the SIB index field. 379 * Borrows entries from ALL_EA_BASES with the special case that 380 * sib is synonymous with NONE. 381 * Vector SIB: index can be XMM or YMM. 382 */ 383typedef enum { 384 SIB_INDEX_NONE, 385#define ENTRY(x) SIB_INDEX_##x, 386 ALL_EA_BASES 387 REGS_XMM 388 REGS_YMM 389 REGS_ZMM 390#undef ENTRY 391 SIB_INDEX_max 392} SIBIndex; 393 394/* 395 * SIBBase - All possible values of the SIB base field. 396 */ 397typedef enum { 398 SIB_BASE_NONE, 399#define ENTRY(x) SIB_BASE_##x, 400 ALL_SIB_BASES 401#undef ENTRY 402 SIB_BASE_max 403} SIBBase; 404 405/* 406 * EADisplacement - Possible displacement types for effective-address 407 * computations. 408 */ 409typedef enum { 410 EA_DISP_NONE, 411 EA_DISP_8, 412 EA_DISP_16, 413 EA_DISP_32 414} EADisplacement; 415 416/* 417 * Reg - All possible values of the reg field in the ModR/M byte. 418 */ 419typedef enum { 420#define ENTRY(x) MODRM_REG_##x, 421 ALL_REGS 422#undef ENTRY 423 MODRM_REG_max 424} Reg; 425 426/* 427 * SegmentOverride - All possible segment overrides. 428 */ 429typedef enum { 430 SEG_OVERRIDE_NONE, 431 SEG_OVERRIDE_CS, 432 SEG_OVERRIDE_SS, 433 SEG_OVERRIDE_DS, 434 SEG_OVERRIDE_ES, 435 SEG_OVERRIDE_FS, 436 SEG_OVERRIDE_GS, 437 SEG_OVERRIDE_max 438} SegmentOverride; 439 440/* 441 * VEXLeadingOpcodeByte - Possible values for the VEX.m-mmmm field 442 */ 443 444typedef enum { 445 VEX_LOB_0F = 0x1, 446 VEX_LOB_0F38 = 0x2, 447 VEX_LOB_0F3A = 0x3 448} VEXLeadingOpcodeByte; 449 450/* 451 * VEXPrefixCode - Possible values for the VEX.pp field 452 */ 453 454typedef enum { 455 VEX_PREFIX_NONE = 0x0, 456 VEX_PREFIX_66 = 0x1, 457 VEX_PREFIX_F3 = 0x2, 458 VEX_PREFIX_F2 = 0x3 459} VEXPrefixCode; 460 461typedef uint8_t BOOL; 462 463/* 464 * byteReader_t - Type for the byte reader that the consumer must provide to 465 * the decoder. Reads a single byte from the instruction's address space. 466 * @param arg - A baton that the consumer can associate with any internal 467 * state that it needs. 468 * @param byte - A pointer to a single byte in memory that should be set to 469 * contain the value at address. 470 * @param address - The address in the instruction's address space that should 471 * be read from. 472 * @return - -1 if the byte cannot be read for any reason; 0 otherwise. 473 */ 474typedef int (*byteReader_t)(const void* arg, uint8_t* byte, uint64_t address); 475 476/* 477 * dlog_t - Type for the logging function that the consumer can provide to 478 * get debugging output from the decoder. 479 * @param arg - A baton that the consumer can associate with any internal 480 * state that it needs. 481 * @param log - A string that contains the message. Will be reused after 482 * the logger returns. 483 */ 484typedef void (*dlog_t)(void* arg, const char *log); 485 486/* 487 * The x86 internal instruction, which is produced by the decoder. 488 */ 489struct InternalInstruction { 490 /* Reader interface (C) */ 491 byteReader_t reader; 492 /* Opaque value passed to the reader */ 493 const void* readerArg; 494 /* The address of the next byte to read via the reader */ 495 uint64_t readerCursor; 496 497 /* Logger interface (C) */ 498 dlog_t dlog; 499 /* Opaque value passed to the logger */ 500 void* dlogArg; 501 502 /* General instruction information */ 503 504 /* The mode to disassemble for (64-bit, protected, real) */ 505 DisassemblerMode mode; 506 /* The start of the instruction, usable with the reader */ 507 uint64_t startLocation; 508 /* The length of the instruction, in bytes */ 509 size_t length; 510 511 /* Prefix state */ 512 513 /* 1 if the prefix byte corresponding to the entry is present; 0 if not */ 514 uint8_t prefixPresent[0x100]; 515 /* contains the location (for use with the reader) of the prefix byte */ 516 uint64_t prefixLocations[0x100]; 517 /* The value of the VEX prefix, if present */ 518 uint8_t vexPrefix[3]; 519 /* The length of the VEX prefix (0 if not present) */ 520 uint8_t vexSize; 521 /* The value of the REX prefix, if present */ 522 uint8_t rexPrefix; 523 /* The location where a mandatory prefix would have to be (i.e., right before 524 the opcode, or right before the REX prefix if one is present) */ 525 uint64_t necessaryPrefixLocation; 526 /* The segment override type */ 527 SegmentOverride segmentOverride; 528 /* 1 if the prefix byte, 0xf2 or 0xf3 is xacquire or xrelease */ 529 BOOL xAcquireRelease; 530 531 /* Sizes of various critical pieces of data, in bytes */ 532 uint8_t registerSize; 533 uint8_t addressSize; 534 uint8_t displacementSize; 535 uint8_t immediateSize; 536 537 /* Offsets from the start of the instruction to the pieces of data, which is 538 needed to find relocation entries for adding symbolic operands */ 539 uint8_t displacementOffset; 540 uint8_t immediateOffset; 541 542 /* opcode state */ 543 544 /* The value of the two-byte escape prefix (usually 0x0f) */ 545 uint8_t twoByteEscape; 546 /* The value of the three-byte escape prefix (usually 0x38 or 0x3a) */ 547 uint8_t threeByteEscape; 548 /* The last byte of the opcode, not counting any ModR/M extension */ 549 uint8_t opcode; 550 /* The ModR/M byte of the instruction, if it is an opcode extension */ 551 uint8_t modRMExtension; 552 553 /* decode state */ 554 555 /* The type of opcode, used for indexing into the array of decode tables */ 556 OpcodeType opcodeType; 557 /* The instruction ID, extracted from the decode table */ 558 uint16_t instructionID; 559 /* The specifier for the instruction, from the instruction info table */ 560 const struct InstructionSpecifier *spec; 561 562 /* state for additional bytes, consumed during operand decode. Pattern: 563 consumed___ indicates that the byte was already consumed and does not 564 need to be consumed again */ 565 566 /* The VEX.vvvv field, which contains a third register operand for some AVX 567 instructions */ 568 Reg vvvv; 569 570 /* The ModR/M byte, which contains most register operands and some portion of 571 all memory operands */ 572 BOOL consumedModRM; 573 uint8_t modRM; 574 575 /* The SIB byte, used for more complex 32- or 64-bit memory operands */ 576 BOOL consumedSIB; 577 uint8_t sib; 578 579 /* The displacement, used for memory operands */ 580 BOOL consumedDisplacement; 581 int32_t displacement; 582 583 /* Immediates. There can be two in some cases */ 584 uint8_t numImmediatesConsumed; 585 uint8_t numImmediatesTranslated; 586 uint64_t immediates[2]; 587 588 /* A register or immediate operand encoded into the opcode */ 589 BOOL consumedOpcodeModifier; 590 uint8_t opcodeModifier; 591 Reg opcodeRegister; 592 593 /* Portions of the ModR/M byte */ 594 595 /* These fields determine the allowable values for the ModR/M fields, which 596 depend on operand and address widths */ 597 EABase eaBaseBase; 598 EABase eaRegBase; 599 Reg regBase; 600 601 /* The Mod and R/M fields can encode a base for an effective address, or a 602 register. These are separated into two fields here */ 603 EABase eaBase; 604 EADisplacement eaDisplacement; 605 /* The reg field always encodes a register */ 606 Reg reg; 607 608 /* SIB state */ 609 SIBIndex sibIndex; 610 uint8_t sibScale; 611 SIBBase sibBase; 612 613 const struct OperandSpecifier *operands; 614}; 615 616/* decodeInstruction - Decode one instruction and store the decoding results in 617 * a buffer provided by the consumer. 618 * @param insn - The buffer to store the instruction in. Allocated by the 619 * consumer. 620 * @param reader - The byteReader_t for the bytes to be read. 621 * @param readerArg - An argument to pass to the reader for storing context 622 * specific to the consumer. May be NULL. 623 * @param logger - The dlog_t to be used in printing status messages from the 624 * disassembler. May be NULL. 625 * @param loggerArg - An argument to pass to the logger for storing context 626 * specific to the logger. May be NULL. 627 * @param startLoc - The address (in the reader's address space) of the first 628 * byte in the instruction. 629 * @param mode - The mode (16-bit, 32-bit, 64-bit) to decode in. 630 * @return - Nonzero if there was an error during decode, 0 otherwise. 631 */ 632int decodeInstruction(struct InternalInstruction* insn, 633 byteReader_t reader, 634 const void* readerArg, 635 dlog_t logger, 636 void* loggerArg, 637 const void* miiArg, 638 uint64_t startLoc, 639 DisassemblerMode mode); 640 641/* x86DisassemblerDebug - C-accessible function for printing a message to 642 * debugs() 643 * @param file - The name of the file printing the debug message. 644 * @param line - The line number that printed the debug message. 645 * @param s - The message to print. 646 */ 647 648void x86DisassemblerDebug(const char *file, 649 unsigned line, 650 const char *s); 651 652const char *x86DisassemblerGetInstrName(unsigned Opcode, const void *mii); 653 654#ifdef __cplusplus 655} 656#endif 657 658#endif 659