Searched defs:MO (Results 26 - 50 of 139) sorted by relevance

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/external/llvm/lib/Target/SystemZ/InstPrinter/
H A DSystemZInstPrinter.cpp33 void SystemZInstPrinter::printOperand(const MCOperand &MO, raw_ostream &O) { argument
34 if (MO.isReg())
35 O << '%' << getRegisterName(MO.getReg());
36 else if (MO.isImm())
37 O << MO.getImm();
38 else if (MO.isExpr())
39 O << *MO.getExpr();
119 const MCOperand &MO = MI->getOperand(OpNum);
120 if (MO.isImm()) {
122 O.write_hex(MO
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/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUAsmPrinter.cpp70 MachineOperand & MO = MI.getOperand(op_idx); local
76 if (!MO.isReg()) {
79 reg = MO.getReg();
/external/llvm/include/llvm/CodeGen/
H A DLiveVariables.h214 MachineOperand &MO = MI->getOperand(i); local
215 if (MO.isReg() && MO.isKill() && MO.getReg() == reg) {
216 MO.setIsKill(false);
250 MachineOperand &MO = MI->getOperand(i); local
251 if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
252 MO
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/external/llvm/lib/CodeGen/
H A DLiveRangeCalc.cpp69 MachineOperand &MO = I.getOperand(); local
72 if (MO.isUse())
73 MO.setIsKill(false);
74 if (!MO.readsReg())
83 assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
92 if (MO.isDef()) {
93 if (MO.isEarlyClobber())
H A DMachineCopyPropagation.cpp236 MachineOperand &MO = MI->getOperand(i); local
237 if (MO.isRegMask())
239 if (!MO.isReg())
241 unsigned Reg = MO.getReg();
249 if (MO.isDef()) {
H A DCriticalAntiDepBreaker.cpp170 MachineOperand &MO = MI->getOperand(i); local
171 if (!MO.isReg()) continue;
172 unsigned Reg = MO.getReg();
200 RegRefs.insert(std::make_pair(Reg, &MO));
202 if (MO.isUse() && Special) {
222 MachineOperand &MO = MI->getOperand(i); local
224 if (MO.isRegMask())
226 if (MO.clobbersPhysReg(i)) {
234 if (!MO.isReg()) continue;
235 unsigned Reg = MO
264 MachineOperand &MO = MI->getOperand(i); local
577 MachineOperand &MO = MI->getOperand(i); local
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H A DLiveRangeEdit.cpp83 const MachineOperand &MO = OrigMI->getOperand(i); local
84 if (!MO.isReg() || !MO.getReg() || !MO.readsReg())
88 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
89 if (MRI.isConstantPhysReg(MO.getReg(), *OrigMI->getParent()->getParent()))
94 LiveInterval &li = LIS.getInterval(MO.getReg());
166 MachineOperand &MO = I.getOperand(); local
167 MachineInstr *MI = MO.getParent();
168 if (MO
301 const MachineOperand &MO = MI->getOperand(i-1); local
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H A DMachineInstrBundle.cpp53 MachineOperand &MO = MII->getOperand(i); local
54 if (MO.isReg() && MO.isInternalRead())
55 MO.setIsInternalRead(false);
125 MachineOperand &MO = FirstMI->getOperand(i); local
126 if (!MO.isReg())
128 if (MO.isDef()) {
129 Defs.push_back(&MO);
133 unsigned Reg = MO.getReg();
138 MO
155 MachineOperand &MO = *Defs[i]; local
256 MachineOperand &MO = deref(); local
289 MachineOperand &MO = deref(); local
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H A DMachineRegisterInfo.cpp132 MachineOperand *MO = &I.getOperand(); local
133 MachineInstr *MI = MO->getParent();
136 << " use list MachineOperand " << MO
142 if (!(MO >= MO0 && MO < MO0+NumOps)) {
144 << " use list MachineOperand " << MO
148 if (!MO->isReg()) {
150 << " MachineOperand " << MO << ": " << *MO local
154 if (MO
157 << *MO << " is the wrong register\\n"; local
175 addRegOperandToUseList(MachineOperand *MO) argument
214 removeRegOperandFromUseList(MachineOperand *MO) argument
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/external/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp33 static bool printModifiedFPRAsmOperand(const MachineOperand &MO, argument
37 if (!MO.isReg())
40 for (MCRegAliasIterator AR(MO.getReg(), TRI, true); AR.isValid(); ++AR) {
51 static bool printModifiedGPRAsmOperand(const MachineOperand &MO, argument
57 if (MO.isImm() && MO.getImm() == 0) {
60 } else if (MO.isReg()) {
61 if (MO.getReg() == AArch64::XSP || MO.getReg() == AArch64::WSP) {
66 for (MCRegAliasIterator AR(MO
77 printSymbolicAddress(const MachineOperand &MO, bool PrintImmediatePrefix, StringRef Suffix, raw_ostream &O) argument
151 const MachineOperand &MO = MI->getOperand(OpNum); local
258 const MachineOperand &MO = MI->getOperand(OpNum); local
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/external/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp77 const MachineOperand &MO = MI->getOperand(OpNo); local
79 switch (MO.getType()) {
82 O << HexagonInstPrinter::getRegisterName(MO.getReg());
85 O << MO.getImm();
88 O << *MO.getMBB()->getSymbol();
91 O << *GetJTISymbol(MO.getIndex());
95 O << *GetCPISymbol(MO.getIndex());
98 O << *GetExternalSymbolSymbol(MO.getSymbolName());
102 O << *Mang->getSymbol(MO.getGlobal());
103 printOffset(MO
266 const MachineOperand &MO = MI->getOperand(OpNo); local
279 const MachineOperand &MO = MI->getOperand(OpNo); local
289 const MachineOperand &MO = MI->getOperand(OpNo); local
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/external/llvm/lib/Target/Hexagon/InstPrinter/
H A DHexagonInstPrinter.cpp91 const MCOperand& MO = MI->getOperand(OpNo); local
93 if (MO.isReg()) {
94 O << getRegisterName(MO.getReg());
95 } else if(MO.isExpr()) {
96 O << *MO.getExpr();
97 } else if(MO.isImm()) {
106 const MCOperand& MO = MI->getOperand(OpNo); local
108 if(MO.isExpr()) {
109 O << *MO.getExpr();
110 } else if(MO
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInst.cpp97 const MCOperand& MO = getOperand(ExtOpNum); local
105 if (MO.isExpr())
110 assert(MO.isImm() && "Extendable operand must be Immediate type");
112 int ImmValue = MO.getImm();
/external/llvm/lib/Target/Mips/InstPrinter/
H A DMipsInstPrinter.cpp180 const MCOperand &MO = MI->getOperand(opNum); local
181 if (MO.isImm())
182 O << (unsigned short int)MO.getImm();
210 const MCOperand& MO = MI->getOperand(opNum); local
211 O << MipsFCCToString((Mips::CondCode)MO.getImm());
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp70 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
112 const MCOperand &MO = MI.getOperand(OpNo); local
113 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
116 Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
123 const MCOperand &MO = MI.getOperand(OpNo); local
124 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixup
135 const MCOperand &MO = MI.getOperand(OpNo); local
147 const MCOperand &MO = MI.getOperand(OpNo); local
158 const MCOperand &MO = MI.getOperand(OpNo); local
174 const MCOperand &MO = MI.getOperand(OpNo); local
192 const MCOperand &MO = MI.getOperand(OpNo); local
205 const MCOperand &MO = MI.getOperand(OpNo); local
221 const MCOperand &MO = MI.getOperand(OpNo+1); local
230 const MCOperand &MO = MI.getOperand(OpNo); local
239 getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups) const argument
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/external/llvm/lib/Target/PowerPC/
H A DPPCCodeEmitter.cpp56 MachineRelocation GetRelocation(const MachineOperand &MO,
61 const MachineOperand &MO) const;
144 const MachineOperand &MO = MI.getOperand(OpNo); local
147 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
148 return 0x80 >> TM.getRegisterInfo()->getEncodingValue(MO.getReg());
151 MachineRelocation PPCCodeEmitter::GetRelocation(const MachineOperand &MO, argument
164 if (MO.isGlobal())
166 const_cast<GlobalValue *>(MO.getGlobal()),
167 Cst, isa<Function>(MO
186 const MachineOperand &MO = MI.getOperand(OpNo); local
195 const MachineOperand &MO = MI.getOperand(OpNo); local
202 const MachineOperand &MO = MI.getOperand(OpNo); local
215 const MachineOperand &MO = MI.getOperand(OpNo); local
236 const MachineOperand &MO = MI.getOperand(OpNo); local
252 const MachineOperand &MO = MI.getOperand(OpNo); local
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/external/llvm/lib/Target/R600/MCTargetDesc/
H A DSIMCCodeEmitter.cpp47 uint32_t getLitEncoding(const MCOperand &MO) const;
61 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
84 uint32_t SIMCCodeEmitter::getLitEncoding(const MCOperand &MO) const {
87 if (MO.isImm())
88 Imm.I = MO.getImm();
89 else if (MO.isFPImm())
90 Imm.F = MO.getFPImm();
170 const MCOperand &MO,
172 if (MO.isReg())
173 return MRI.getEncodingValue(MO
169 getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups) const argument
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/external/llvm/lib/Target/R600/
H A DR600EmitClauseMarkers.cpp58 MachineOperand &MO = *It; local
59 if (MO.isReg() && MO.getReg() == AMDGPU::ALU_LITERAL_X)
/external/llvm/lib/Target/Sparc/
H A DSparcAsmPrinter.cpp73 const MachineOperand &MO = MI->getOperand (opNum); local
74 unsigned TF = MO.getTargetFlags();
77 if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
107 switch (MO.getType()) {
109 O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
113 O << (int)MO.getImm();
116 O << *MO.getMBB()->getSymbol();
119 O << *Mang->getSymbol(MO
162 const MachineOperand &MO = MI->getOperand(opNum); local
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp47 // MO in MI. Fixups is the list of fixups against MI.
48 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
114 getMachineOpValue(const MCInst &MI, const MCOperand &MO, argument
116 if (MO.isReg())
117 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
118 if (MO.isImm())
119 return static_cast<uint64_t>(MO.getImm());
176 const MCOperand &MO = MI.getOperand(OpNum); local
178 if (MO.isImm())
179 Expr = MCConstantExpr::Create(MO
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/external/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp122 MachineOperand &MO = MBBI->getOperand(i); local
123 if (!MO.isReg() || MO.isDef())
125 unsigned Reg = MO.getReg();
1649 const MachineOperand &MO = MI->getOperand(0);
1652 if (!MO.isGlobal())
1655 const Function *F = dyn_cast<Function>(MO.getGlobal());
H A DX86VZeroUpper.cpp124 static bool clobbersAllYmmRegs(const MachineOperand &MO) { argument
126 if (!MO.clobbersPhysReg(reg))
130 if (!MO.clobbersPhysReg(reg))
138 const MachineOperand &MO = MI->getOperand(i); local
139 if (MI->isCall() && MO.isRegMask() && !clobbersAllYmmRegs(MO))
141 if (!MO.isReg())
143 if (MO.isDebug())
145 if (isYmmReg(MO.getReg()))
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPUInstrInfo.cpp245 MachineOperand &MO = MI.getOperand(i); local
247 if (MO.isReg() && MO.isDef()) {
248 if (TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
249 const TargetRegisterClass * oldRegClass = MRI.getRegClass(MO.getReg());
254 MRI.setRegClass(MO.getReg(), newRegClass);
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/
H A DSIMCCodeEmitter.cpp78 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
141 const MCOperand &MO,
143 if (MO.isReg()) {
144 return getRegBinaryCode(MO.getReg());
145 } else if (MO.isImm()) {
146 return MO.getImm();
147 } else if (MO.isFPImm()) {
234 const MCOperand &MO = MI.getOperand(opIdx); local
235 if (MO.isReg()) {
241 } else if (MO
140 getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups) const argument
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/external/llvm/lib/CodeGen/AsmPrinter/
H A DAsmPrinterInlineAsm.cpp528 const MachineOperand &MO = MI->getOperand(OpNo); local
533 if (MO.getType() != MachineOperand::MO_Immediate)
535 O << MO.getImm();
538 if (MO.getType() != MachineOperand::MO_Immediate)
540 O << -MO.getImm();

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