Searched refs:NewMI (Results 1 - 25 of 37) sorted by relevance

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/external/llvm/lib/Target/X86/
H A DX86FixupLEAs.cpp98 MachineInstr* NewMI; local
104 NewMI = BuildMI(*MF, MI->getDebugLoc(),
108 MFI->insert(MBBI, NewMI); // Insert the new inst
109 return NewMI;
233 MachineInstr* NewMI = postRAConvertToLEA(MFI, MBI); local
234 if (NewMI) {
238 DEBUG(dbgs() << "Replaced by: "; NewMI->dump(););
241 static_cast<MachineBasicBlock::iterator> (NewMI);
H A DX86InstrInfo.cpp1728 MachineInstr *NewMI = prior(I); local
1729 NewMI->substituteRegister(Orig->getOperand(0).getReg(), DestReg, SubIdx, TRI);
1930 MachineInstr *NewMI = MIB; local
1938 LV->getVarInfo(leaInReg).Kills.push_back(NewMI);
1976 MachineInstr *NewMI = NULL; local
1993 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::PSHUFDri))
2009 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::PSHUFDri))
2024 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::LEA64r))
2051 NewMI = MIB;
2062 NewMI
3671 MachineInstr *NewMI = commuteInstruction(MI, false); local
3742 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), local
3769 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode), local
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DR600ExpandSpecialInstrs.cpp150 MachineInstr *NewMI = local
156 NewMI->setIsInsideBundle(Chan != 0);
157 TII->addFlag(NewMI, 0, Flags);
H A DR600ISelLowering.cpp64 MachineInstr *NewMI = local
70 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
75 MachineInstr *NewMI = local
81 TII->addFlag(NewMI, 1, MO_FLAG_ABS);
87 MachineInstr *NewMI = local
93 TII->addFlag(NewMI, 1, MO_FLAG_NEG);
206 MachineInstr *NewMI = local
212 TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
220 MachineInstr *NewMI = local
226 TII->addFlag(NewMI,
[all...]
/external/mesa3d/src/gallium/drivers/radeon/
H A DR600ExpandSpecialInstrs.cpp150 MachineInstr *NewMI = local
156 NewMI->setIsInsideBundle(Chan != 0);
157 TII->addFlag(NewMI, 0, Flags);
H A DR600ISelLowering.cpp64 MachineInstr *NewMI = local
70 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
75 MachineInstr *NewMI = local
81 TII->addFlag(NewMI, 1, MO_FLAG_ABS);
87 MachineInstr *NewMI = local
93 TII->addFlag(NewMI, 1, MO_FLAG_NEG);
206 MachineInstr *NewMI = local
212 TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
220 MachineInstr *NewMI = local
226 TII->addFlag(NewMI,
[all...]
/external/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp119 bool NewMI) const {
157 if (NewMI) {
366 if (MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FI)) {
369 NewMI->mayStore()) &&
372 NewMI->mayLoad()) &&
380 NewMI->addMemOperand(MF, MMO);
382 // FIXME: change foldMemoryOperandImpl semantics to also insert NewMI.
383 return MBB->insert(MI, NewMI);
421 MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, LoadMI); local
422 if (!NewMI) retur
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H A DRegisterCoalescer.cpp646 MachineInstr *NewMI = TII->commuteInstruction(DefMI); local
647 if (!NewMI)
653 if (NewMI != DefMI) {
654 LIS->ReplaceMachineInstrInMaps(DefMI, NewMI);
656 MBB->insert(Pos, NewMI);
659 unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false);
660 NewMI->getOperand(OpIdx).setIsKill();
800 MachineInstr *NewMI = prior(MII); local
802 LIS->ReplaceMachineInstrInMaps(CopyMI, NewMI);
806 // NewMI ma
[all...]
H A DTwoAddressInstructionPass.cpp579 MachineInstr *NewMI = TII->commuteInstruction(MI); local
581 if (NewMI == 0) {
586 DEBUG(dbgs() << "2addr: COMMUTED TO: " << *NewMI);
587 assert(NewMI == MI &&
627 MachineInstr *NewMI = TII->convertToThreeAddress(MFI, mi, LV); local
629 if (!NewMI)
633 DEBUG(dbgs() << "2addr: TO 3-ADDR: " << *NewMI);
637 LIS->ReplaceMachineInstrInMaps(mi, NewMI);
639 if (NewMI->findRegisterUseOperand(RegB, false, TRI))
643 Sunk = sink3AddrInstruction(NewMI, Reg
1223 MachineBasicBlock::iterator NewMI = NewMIs[1]; local
[all...]
H A DMachineCSE.cpp462 MachineInstr *NewMI = TII->commuteInstruction(MI); local
463 if (NewMI) {
465 FoundCSE = VNT.count(NewMI);
466 if (NewMI != MI) {
468 NewMI->eraseFromParent();
H A DTailDuplication.cpp422 MachineInstr *NewMI = TII->duplicate(MI, MF); local
423 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
424 MachineOperand &MO = NewMI->getOperand(i);
445 PredBB->insert(PredBB->instr_end(), NewMI);
/external/llvm/lib/Target/R600/
H A DSIInstrInfo.h41 bool NewMI=false) const;
H A DR600ExpandSpecialInstrs.cpp300 MachineInstr *NewMI = local
304 NewMI->bundleWithPred();
306 TII->addFlag(NewMI, 0, MO_FLAG_MASK);
309 TII->addFlag(NewMI, 0, MO_FLAG_NOT_LAST);
H A DSIInstrInfo.cpp186 bool NewMI) const {
192 MI = TargetInstrInfo::commuteInstruction(MI, NewMI);
H A DR600ISelLowering.cpp116 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I, local
120 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
125 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I, local
129 TII->addFlag(NewMI, 0, MO_FLAG_ABS);
134 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I, local
138 TII->addFlag(NewMI, 0, MO_FLAG_NEG);
151 MachineInstrBuilder NewMI = BuildMI(*BB, I, BB->findDebugLoc(I), local
155 NewMI.addOperand(MI->getOperand(i));
173 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, MI, AMDGPU::MOV, local
175 TII->setImmOperand(NewMI, AMDGP
401 MachineInstr *NewMI = local
415 MachineInstr *NewMI = local
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H A DAMDILCFGStructurizer.cpp502 MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL); local
503 MBB->insert(I, NewMI);
504 MachineInstrBuilder MIB(*MF, NewMI);
506 SHOWNEWINSTR(NewMI);
1688 MachineInstr *NewMI = insertInstrBefore(I, AMDGPU::BRANCH_COND_i32); local
1689 MachineInstrBuilder MIB(*FuncRep, NewMI);
1692 SHOWNEWINSTR(NewMI);
/external/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp599 MachineInstr *NewMI; local
610 NewMI = BuildMI(*MBB, jmpPos, dl,
621 NewMI = BuildMI(*MBB, jmpPos, dl,
627 NewMI = BuildMI(*MBB, jmpPos, dl,
633 assert(NewMI && "New Value Jump Instruction Not created!");
634 (void)NewMI;
/external/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp240 MachineInstr *NewMI = prior(MBBI); local
242 MBBI = NewMI;
461 MachineInstrBuilder NewMI; local
476 NewMI = BuildMI(MBB, MBBI, DL, TII.get(PossClasses[ClassIdx].PairOpcode))
490 NewMI = BuildMI(MBB, MBBI, DL,
507 NewMI.addFrameIndex(FrameIdx)
512 NewMI.setMIFlags(MachineInstr::FrameSetup);
H A DAArch64InstrInfo.cpp352 MachineInstr *NewMI = local
357 llvm::finalizeBundle(MBB, NewMI, *++MBBI);
406 MachineInstrBuilder NewMI = BuildMI(MBB, MBBI, DL, get(StoreOp)); local
407 NewMI.addReg(SrcReg, getKillRegState(isKill))
452 MachineInstrBuilder NewMI = BuildMI(MBB, MBBI, DL, get(LoadOp), DestReg); local
453 NewMI.addFrameIndex(FrameIdx)
/external/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp388 MachineInstr *NewMI = MRI->getVRegDef(Reg); local
389 if (!NewMI)
391 Front.push_back(NewMI);
396 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg()); local
397 if (!NewMI)
399 Front.push_back(NewMI);
H A DARMBaseInstrInfo.cpp244 MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI; local
246 LV->addVirtualRegisterDead(Reg, NewMI);
251 MachineInstr *NewMI = NewMIs[j]; local
252 if (!NewMI->readsRegister(Reg))
254 LV->addVirtualRegisterKilled(Reg, NewMI);
256 VI.Kills.push_back(NewMI);
1604 ARMBaseInstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
1614 MI = TargetInstrInfo::commuteInstruction(MI, NewMI);
1623 return TargetInstrInfo::commuteInstruction(MI, NewMI);
1699 MachineInstrBuilder NewMI
[all...]
/external/llvm/include/llvm/CodeGen/
H A DLiveIntervalAnalysis.h232 void ReplaceMachineInstrInMaps(MachineInstr *MI, MachineInstr *NewMI) { argument
233 Indexes->replaceMachineInstrInMaps(MI, NewMI);
H A DLiveVariables.h192 MachineInstr *NewMI);
/external/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h107 virtual MachineInstr *commuteInstruction(MachineInstr *MI, bool NewMI) const;
/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp257 MCInst NewMI; local
259 NewMI.setOpcode(Opcode);
262 NewMI.addOperand(MI->getOperand(0));
265 NewMI.addOperand(NewReg);
267 // Copy the rest operands into NewMI.
269 NewMI.addOperand(MI->getOperand(i));
270 printInstruction(&NewMI, O);

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