Searched refs:isSubClassOf (Results 1 - 23 of 23) sorted by relevance

/external/llvm/utils/TableGen/
H A DCallingConvEmitter.cpp82 if (Action->isSubClassOf("CCPredicateAction")) {
85 if (Action->isSubClassOf("CCIfType")) {
93 } else if (Action->isSubClassOf("CCIf")) {
104 if (Action->isSubClassOf("CCDelegateTo")) {
109 } else if (Action->isSubClassOf("CCAssignToReg")) {
130 } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) {
172 } else if (Action->isSubClassOf("CCAssignToStack")) {
188 if (Action->isSubClassOf("CCAssignToStackWithShadow"))
194 } else if (Action->isSubClassOf("CCPromoteToType")) {
203 } else if (Action->isSubClassOf("CCBitConvertToTyp
[all...]
H A DCodeGenInstruction.cpp73 if (Rec->isSubClassOf("RegisterOperand")) {
75 } else if (Rec->isSubClassOf("Operand")) {
93 if (Rec->isSubClassOf("PredicateOperand"))
95 else if (Rec->isSubClassOf("OptionalDefOperand"))
100 } else if (Rec->isSubClassOf("RegisterClass")) {
102 } else if (!Rec->isSubClassOf("PointerLikeRegClass") &&
103 !Rec->isSubClassOf("unknown_class"))
350 assert(FirstImplicitDef->isSubClassOf("Register"));
434 if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) {
435 if (!InstOpRec->isSubClassOf("RegisterClas
[all...]
H A DDAGISelMatcherGen.cpp230 if (LeafRec->isSubClassOf("ValueType")) {
239 LeafRec->isSubClassOf("RegisterClass") ||
240 LeafRec->isSubClassOf("RegisterOperand") ||
241 LeafRec->isSubClassOf("PointerLikeRegClass") ||
242 LeafRec->isSubClassOf("SubRegIndex") ||
249 if (LeafRec->isSubClassOf("Register")) {
256 if (LeafRec->isSubClassOf("CondCode"))
259 if (LeafRec->isSubClassOf("ComplexPattern")) {
594 if (Def->isSubClassOf("Register")) {
610 if (Def->isSubClassOf("RegisterOperan
[all...]
H A DCodeGenTarget.cpp467 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
469 if (TyEl->isSubClassOf("LLVMMatchType")) {
477 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
478 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
501 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
503 if (TyEl->isSubClassOf("LLVMMatchType")) {
511 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
512 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
535 assert(Property->isSubClassOf("IntrinsicProperty") &&
552 else if (Property->isSubClassOf("NoCaptur
[all...]
H A DCodeGenDAGPatterns.cpp784 if (!Def->isSubClassOf("Predicate")) {
806 if (R->isSubClassOf("SDTCisVT")) {
812 } else if (R->isSubClassOf("SDTCisPtrTy")) {
814 } else if (R->isSubClassOf("SDTCisInt")) {
816 } else if (R->isSubClassOf("SDTCisFP")) {
818 } else if (R->isSubClassOf("SDTCisVec")) {
820 } else if (R->isSubClassOf("SDTCisSameAs")) {
823 } else if (R->isSubClassOf("SDTCisVTSmallerThanOp")) {
827 } else if (R->isSubClassOf("SDTCisOpSmallerThanOp")) {
831 } else if (R->isSubClassOf("SDTCisEltOfVe
[all...]
H A DDAGISelEmitter.cpp45 if (Op->isSubClassOf("Instruction")) {
64 if (Op->isSubClassOf("Instruction")) {
H A DCodeGenSchedule.h64 IsRead = Def->isSubClassOf("SchedRead");
65 HasVariants = Def->isSubClassOf("SchedVariant");
72 IsSequence = Def->isSubClassOf("WriteSequence");
303 bool IsRead = Def->isSubClassOf("SchedRead");
H A DPseudoLoweringEmitter.cpp80 if (DI->getDef()->isSubClassOf("Register") ||
135 if (!Operator->isSubClassOf("Instruction"))
278 if (I->second->isSubClassOf(ExpansionClass) &&
279 I->second->isSubClassOf(InstructionClass))
H A DCodeGenSchedule.cpp166 if (ModelKey->isSubClassOf("SchedMachineModel")) {
189 if (RWDef->isSubClassOf("WriteSequence")) {
194 else if (RWDef->isSubClassOf("SchedVariant")) {
224 if ((*RWI)->isSubClassOf("SchedWrite"))
227 assert((*RWI)->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
239 if ((*RWI)->isSubClassOf("SchedWrite"))
242 assert((*RWI)->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
254 if ((*RWI)->isSubClassOf("SchedWrite"))
257 assert((*RWI)->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
269 if (MatchDef->isSubClassOf("SchedWrit
[all...]
H A DInstrInfoEmitter.cpp117 if (OpR->isSubClassOf("RegisterOperand"))
119 if (OpR->isSubClassOf("RegisterClass"))
121 else if (OpR->isSubClassOf("PointerLikeRegClass"))
131 if (OpR->isSubClassOf("PointerLikeRegClass"))
136 if (Inst.Operands[i].Rec->isSubClassOf("PredicateOperand"))
141 if (Inst.Operands[i].Rec->isSubClassOf("OptionalDefOperand"))
H A DFastISelEmitter.cpp256 if (OpLeafRec->isSubClassOf("RegisterOperand"))
258 if (OpLeafRec->isSubClassOf("RegisterClass"))
260 else if (OpLeafRec->isSubClassOf("Register"))
262 else if (OpLeafRec->isSubClassOf("ValueType")) {
413 if (!OpLeafRec->isSubClassOf("Register"))
440 if (!Op->isSubClassOf("Instruction"))
452 if (ChildOp->getOperator()->isSubClassOf("Instruction")) {
466 if (Op0Rec->isSubClassOf("RegisterOperand"))
468 if (!Op0Rec->isSubClassOf("RegisterClass"))
H A DIntrinsicEmitter.cpp300 if (R->isSubClassOf("LLVMMatchType")) {
303 if (R->isSubClassOf("LLVMExtendedElementVectorType"))
305 else if (R->isSubClassOf("LLVMTruncatedElementVectorType"))
335 if (R->isSubClassOf("LLVMQualPointerType")) {
H A DSubtargetEmitter.cpp638 if (PRDef->isSubClassOf("ProcResGroup")) {
676 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes"))
695 if (AliasDef && AliasDef->isSubClassOf("SchedWriteRes"))
702 if (!(*WRI)->isSubClassOf("WriteRes"))
729 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance"))
749 if (AliasDef && AliasDef->isSubClassOf("SchedReadAdvance"))
756 if (!(*RAI)->isSubClassOf("ReadAdvance"))
788 if (PRDef->isSubClassOf("ProcResGroup"))
795 if (SubDef->isSubClassOf("ProcResGroup")) {
810 if (*PRI == PRDef || !(*PRI)->isSubClassOf("ProcResGrou
[all...]
H A DAsmWriterEmitter.cpp837 if (Rec->isSubClassOf("RegisterOperand"))
839 if (Rec->isSubClassOf("RegisterClass")) {
846 if (R->isSubClassOf("RegisterOperand"))
859 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
H A DAsmMatcherEmitter.cpp665 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
1009 if (Rec->isSubClassOf("RegisterOperand")) {
1034 if (Rec->isSubClassOf("RegisterClass")) {
1040 if (!Rec->isSubClassOf("Operand"))
1487 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
H A DX86RecognizableInstr.cpp220 if (!Rec->isSubClassOf("X86Inst")) {
486 assert(Rec->isSubClassOf("X86Inst") && "Can only filter X86 instructions");
H A DFixedLenDecoderEmitter.cpp1769 if (TypeRecord->isSubClassOf("RegisterOperand"))
1771 if (TypeRecord->isSubClassOf("RegisterClass")) {
H A DCodeGenRegisters.cpp676 if (!Type->isSubClassOf("ValueType"))
/external/clang/utils/TableGen/
H A DClangAttrEmitter.cpp1124 if ((*i)->isSubClassOf(InhParamClass))
1126 else if ((*i)->isSubClassOf(MSInheritanceClass))
1128 else if ((*i)->isSubClassOf(InhClass))
1169 if (R.isSubClassOf(InhClass))
1184 if (R.isSubClassOf(InhClass))
1210 if (R.isSubClassOf(InhClass) || !Args.empty())
1213 if (R.isSubClassOf(InhClass))
/external/llvm/lib/TableGen/
H A DRecord.cpp344 if (!DI->getDef()->isSubClassOf(Rec))
352 if (RRT->getRecord()->isSubClassOf(getRecord()) ||
363 if (Rec == RTy->getRecord() || RTy->getRecord()->isSubClassOf(Rec))
368 if (RTy->getRecord()->isSubClassOf(SC[i]))
2016 if (I->second->isSubClassOf(Class))
H A DTGParser.cpp191 if (CurRec->isSubClassOf(SCs[i]))
197 if (CurRec->isSubClassOf(SC))
/external/llvm/include/llvm/TableGen/
H A DRecord.h1513 bool isSubClassOf(const Record *R) const { function in class:llvm::Record
1520 bool isSubClassOf(StringRef Name) const { function in class:llvm::Record
1528 assert(!isSubClassOf(R) && "Already subclassing record!");
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/
H A Dorg.eclipse.jdt.apt.core_3.3.401.R36_v20100727-0110.jarMETA-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ...

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