SparcInstrFormats.td revision d4f2ab5e0059f8398a7882d6c6be50341641b97b
1//===- SparcV8InstrFormats.td - SparcV8 Instr Formats ------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Format #2 instruction classes in the SparcV8 12//===----------------------------------------------------------------------===// 13 14class F2 : InstV8 { // Format 2 instructions 15 bits<3> op2; 16 bits<22> imm22; 17 let op = 0; // op = 0 18 let Inst{24-22} = op2; 19 let Inst{21-0} = imm22; 20} 21 22// Specific F2 classes: SparcV8 manual, page 44 23// 24class F2_1<bits<3> op2Val, string name> : F2 { 25 bits<5> rd; 26 27 let op2 = op2Val; 28 let Name = name; 29 30 let Inst{29-25} = rd; 31} 32 33class F2_2<bits<4> condVal, bits<3> op2Val, string name> : F2 { 34 bits<4> cond; 35 bit annul = 0; // currently unused 36 37 let cond = condVal; 38 let op2 = op2Val; 39 let Name = name; 40 41 let Inst{29} = annul; 42 let Inst{28-25} = cond; 43} 44 45//===----------------------------------------------------------------------===// 46// Format #3 instruction classes in the SparcV8 47//===----------------------------------------------------------------------===// 48 49class F3 : InstV8 { 50 bits<5> rd; 51 bits<6> op3; 52 bits<5> rs1; 53 let op{1} = 1; // Op = 2 or 3 54 let Inst{29-25} = rd; 55 let Inst{24-19} = op3; 56 let Inst{18-14} = rs1; 57} 58 59// Specific F3 classes: SparcV8 manual, page 44 60// 61class F3_1<bits<2> opVal, bits<6> op3val, dag ops, string asmstr> : F3 { 62 bits<8> asi = 0; // asi not currently used in SparcV8 63 bits<5> rs2; 64 65 dag OperandList = ops; 66 let AsmString = asmstr; 67 68 let op = opVal; 69 let op3 = op3val; 70 71 let Inst{13} = 0; // i field = 0 72 let Inst{12-5} = asi; // address space identifier 73 let Inst{4-0} = rs2; 74} 75 76class F3_2<bits<2> opVal, bits<6> op3val, dag ops, string asmstr> : F3 { 77 bits<13> simm13; 78 79 dag OperandList = ops; 80 let AsmString = asmstr; 81 82 let op = opVal; 83 let op3 = op3val; 84 85 let Inst{13} = 1; // i field = 1 86 let Inst{12-0} = simm13; 87} 88 89// floating-point 90class F3_3<bits<2> opVal, bits<6> op3val, bits<9> opfval, string name> : F3 { 91 bits<5> rs2; 92 93 let op = opVal; 94 let op3 = op3val; 95 let Name = name; 96 97 let Inst{13-5} = opfval; // fp opcode 98 let Inst{4-0} = rs2; 99} 100