1e06bcbd633175d75d13aaa5695ca0633ba86068 |
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04-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: No functionality change. Cleanup whitespaces, comment formatting etc., git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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d9f88da7b329c54ccb0d2ebd3b3a4b0e4b1e2b06 |
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14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use i32 for all SPARC shift amounts, even in 64-bit mode. Test case by llvm-stress. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179477 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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c3ff3f42ee9a9fb755b0eb0718a31d701b93b3e0 |
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02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add 64-bit shift instructions. SPARC v9 defines new 64-bit shift instructions. The 32-bit shift right instructions are still usable as zero and sign extensions. This adds new F3_Sr and F3_Si instruction formats that probably should be used for the 32-bit shifts as well. They don't really encode an simm13 field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178525 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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4ee451de366474b9c228b4e5fa573795a715216d |
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29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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64d80e3387f328d21cd9cc06464b5de7861e3f27 |
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19-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Change instruction description to split OperandList into OutOperandList and InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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aca36b932958a7e4a27786dd76e37259fbaa67e0 |
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02-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Use a couple of multiclass patterns to factor some integer ops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30039 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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7c90f73a1b06040d971a3dd95a491031ae6238d5 |
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05-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Rename SPARC V8 target to be the LLVM SPARC target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25985 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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eee99bd459ab17a498d076f27de313398b9d3d4d |
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18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Push ops list, asm string, and pattern all the way up to InstV8. Move the InstV8 class to the InstrFormats file where it belongs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24824 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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4d55aca87aeac108980005912d8ea8733d6226e1 |
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18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add initial conditional branch support. This doesn't actually work yet due to a bug in the scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24807 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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558bfe0cf5392d7f8d48647ed1d88fd0f530c4c3 |
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18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Give patterns to F3_3 instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24800 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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57dd3bc46049c528858cdd02f76149d9525199fa |
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17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Use sethi to build large immediates with zeros at the bottom git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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e33a3ff942d33edfb619867c84b1d4589d3a582d |
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17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add empty patterns to all F3_1 instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24776 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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f3bf50d2c80da2d45b22e5c2458048c860754736 |
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17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add empty patterns for F3_2 instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24771 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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0d8fcd3218ed93e338a2e7b845f358f1c6f74d58 |
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17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Convert the remaining instructions over, branches and calls. Fix a couple minor bugs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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dc6938ac23f49c35ac551b6f5541e926a357de1b |
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17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
convert FP instructions to use an asmstring and operand list, allowing FP programs to work on V8 again git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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13e1501c91e3e56740a59eb7dab173c1d0cf5765 |
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16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add a couple more instrs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24744 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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d4f2ab5e0059f8398a7882d6c6be50341641b97b |
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16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Autogenerate asmprinter for F3_2 instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24741 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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1c4f4356032195f05c715b113b4ee5e2d4909915 |
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16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Switch F3_1 instructions over to use AsmStrings git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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96b84beb77d5209d2d5db4db9a6dc07461de2f7e |
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16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add operand info for F3_[12] instructions, getting V8 back to basic functionality. With this, Regression/CodeGen/SparcV8/basictest.ll now passes. Lets hear it for regression tests :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24738 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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45a68268a40310dac90d751d40c74c5e81e15a01 |
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15-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Class F2_1 already inherits the imm22 field from class F2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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17187e936a37171260b81b838a411db128fb1690 |
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14-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
* In the F3_1 class, default asi to 0 because it's not currently used * In the F3_3 class, remove mention of asi because it's not part of the format git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16999 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
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c42077d37194a1872dc402522d4d7a0e81f83047 |
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22-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Combine the F2 and F3 instruction classes into one file for simplicity git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Sparc/SparcInstrFormats.td
|