Searched defs:V1 (Results 51 - 75 of 80) sorted by relevance

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/external/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp935 const Value *V1 = Load->getSrcValue(); local
937 if (!V1 || !V2)
942 return !AA->alias(AliasAnalysis::Location(V1, End1, Load->getTBAAInfo()),
/external/llvm/lib/Transforms/Scalar/
H A DReassociate.cpp209 Value *V1 = I->getOperand(1); local
211 std::swap(V0, V1);
213 if (ConstantInt *C = dyn_cast<ConstantInt>(V1)) {
989 Value *V1 = Ops.back();
992 return BinaryOperator::CreateAdd(V2, V1, "tmp", I);
H A DCodeGenPrepare.cpp363 const Value *V1 = PN->getIncomingValueForBlock(Pred); local
372 if (V1 != V2) return false;
/external/opencv/cvaux/src/
H A Dcveigenobjects.cpp82 float *V1 = V, *A1 = A; local
85 for( p = 0; p < n - 1; p++, A1 += n, V1 += n )
118 Vpi = V1[i];
122 V1[i] = (float) (Vpi * c - Vqi * s);
129 Vpi = V1[i];
133 V1[i] = (float) (Vpi * c - Vqi * s);
140 Vpi = V1[i];
144 V1[i] = (float) (Vpi * c - Vqi * s);
/external/chromium_org/third_party/libwebp/dsp/
H A Dlossless.c297 const __m128i V1 = _mm_add_epi16(C0, C1); local
298 const __m128i V2 = _mm_sub_epi16(V1, C2);
/external/llvm/lib/IR/
H A DConstants.cpp1806 Constant *ConstantExpr::getSelect(Constant *C, Constant *V1, Constant *V2) { argument
1807 assert(!SelectInst::areInvalidOperands(C, V1, V2)&&"Invalid select operands");
1809 if (Constant *SC = ConstantFoldSelectInstruction(C, V1, V2))
1812 Constant *ArgVec[] = { C, V1, V2 };
1816 return pImpl->ExprConstants.getOrCreate(V1->getType(), Key);
1935 Constant *ConstantExpr::getShuffleVector(Constant *V1, Constant *V2, argument
1937 assert(ShuffleVectorInst::isValidOperands(V1, V2, Mask) &&
1940 if (Constant *FC = ConstantFoldShuffleVectorInstruction(V1, V2, Mask))
1944 Type *EltTy = V1->getType()->getVectorElementType();
1948 Constant *ArgVec[] = { V1, V
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H A DVerifier.cpp353 const Value *V1 = 0, const Value *V2 = 0,
356 WriteValue(V1);
363 void CheckFailed(const Twine &Message, const Value *V1, argument
366 WriteValue(V1);
392 #define Assert1(C, M, V1) \
393 do { if (!(C)) { CheckFailed(M, V1); return; } } while (0)
394 #define Assert2(C, M, V1, V2) \
395 do { if (!(C)) { CheckFailed(M, V1, V2); return; } } while (0)
396 #define Assert3(C, M, V1, V2, V3) \
397 do { if (!(C)) { CheckFailed(M, V1, V
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H A DInstructions.cpp1528 ShuffleVectorInst::ShuffleVectorInst(Value *V1, Value *V2, Value *Mask, argument
1531 : Instruction(VectorType::get(cast<VectorType>(V1->getType())->getElementType(),
1537 assert(isValidOperands(V1, V2, Mask) &&
1539 Op<0>() = V1;
1545 ShuffleVectorInst::ShuffleVectorInst(Value *V1, Value *V2, Value *Mask, argument
1548 : Instruction(VectorType::get(cast<VectorType>(V1->getType())->getElementType(),
1554 assert(isValidOperands(V1, V2, Mask) &&
1557 Op<0>() = V1;
1563 bool ShuffleVectorInst::isValidOperands(const Value *V1, const Value *V2, argument
1565 // V1 an
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H A DCore.cpp2365 LLVMValueRef LLVMBuildShuffleVector(LLVMBuilderRef B, LLVMValueRef V1, argument
2368 return wrap(unwrap(B)->CreateShuffleVector(unwrap(V1), unwrap(V2),
/external/llvm/lib/Target/ARM/
H A DARMCodeEmitter.cpp784 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO1.getImm()); local
799 Binary |= getMachineSoImmOpValue(V1);
H A DARMISelDAGToDAG.cpp273 SDNode *createGPRPairNode(EVT VT, SDValue V0, SDValue V1);
274 SDNode *createSRegPairNode(EVT VT, SDValue V0, SDValue V1);
275 SDNode *createDRegPairNode(EVT VT, SDValue V0, SDValue V1);
276 SDNode *createQRegPairNode(EVT VT, SDValue V0, SDValue V1);
279 SDNode *createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
280 SDNode *createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
281 SDNode *createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
1578 SDNode *ARMDAGToDAGISel::createGPRPairNode(EVT VT, SDValue V0, SDValue V1) { argument
1584 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 };
1589 SDNode *ARMDAGToDAGISel::createSRegPairNode(EVT VT, SDValue V0, SDValue V1) { argument
1600 createDRegPairNode(EVT VT, SDValue V0, SDValue V1) argument
1610 createQRegPairNode(EVT VT, SDValue V0, SDValue V1) argument
1620 createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1635 createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1649 createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1919 SDValue V1 = N->getOperand(Vec0Idx + 1); local
1971 SDValue V1 = N->getOperand(Vec0Idx + 1); local
2083 SDValue V1 = N->getOperand(Vec0Idx + 1); local
2219 SDValue V1 = N->getOperand(FirstTblReg + 1); local
3446 SDValue V1 = N->getOperand(1); local
3556 SDValue V1 = N->getOperand(i+2); local
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H A DARMISelLowering.cpp5070 SDValue V1 = Op.getOperand(0); local
5080 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1,
5084 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2,
5107 SDValue V1 = Op.getOperand(0); local
5128 // Test if V1 is a SCALAR_TO_VECTOR.
5129 if (Lane == 0 && V1.getOpcode() == ISD::SCALAR_TO_VECTOR) {
5130 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0));
5132 // Test if V1 is a BUILD_VECTOR which is equivalent to a SCALAR_TO_VECTOR
5135 if (Lane == 0 && V1.getOpcode() == ISD::BUILD_VECTOR &&
5136 !isa<ConstantSDNode>(V1
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/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineAddSub.cpp394 Value *V1 = I->getOperand(1); local
396 Addend0.set(C, V1);
400 if (ConstantFP *C = dyn_cast<ConstantFP>(V1)) {
544 Value *V1 = I->getOperand(1); local
546 (!isa<Constant>(V1) && V1->hasOneUse())) ? 2 : 1;
H A DInstCombineAndOrXor.cpp1765 Value *V1 = 0;
1767 if (!match(Op, m_And(m_Value(V1), m_ConstantInt(CI2)))) return 0;
1772 if (V1 == A || V1 == B) {
1773 Value *NewOp = Builder->CreateAnd((V1 == A) ? B : A, CI1);
1774 return BinaryOperator::CreateOr(NewOp, V1);
1863 Value *V1 = 0, *V2 = 0; local
1872 match(A, m_Add(m_Value(V1), m_Value(V2)))) {
1874 if (V1 == B && MaskedValueIsZero(V2, C2->getValue()))
1876 if (V2 == B && MaskedValueIsZero(V1, C
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/external/webp/src/dsp/
H A Dlossless.c297 const __m128i V1 = _mm_add_epi16(C0, C1); local
298 const __m128i V2 = _mm_sub_epi16(V1, C2);
/external/clang/lib/StaticAnalyzer/Core/
H A DExprEngine.cpp1553 llvm::APSInt V1 = Case->getLHS()->EvaluateKnownConstInt(getContext()); local
1554 assert(V1.getBitWidth() == getContext().getTypeSize(CondE->getType()));
1561 V2 = V1;
1568 nonloc::ConcreteInt CaseVal(getBasicVals().getValue(V1));
1597 if (V1 == V2)
1600 ++V1;
1601 assert (V1 <= V2);
/external/llvm/include/llvm/IR/
H A DIRBuilder.h1320 Value *CreateShuffleVector(Value *V1, Value *V2, Value *Mask, argument
1322 if (Constant *V1C = dyn_cast<Constant>(V1))
1326 return Insert(new ShuffleVectorInst(V1, V2, Mask), Name);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp2915 SDValue V1 = GetPromotedInteger(N->getOperand(1)); local
2918 return DAG.getVectorShuffle(OutVT, dl, V0, V1, &NewMask[0]);
3016 SDValue V1 = DAG.getZExtOrTrunc(N->getOperand(1), dl, TLI.getVectorIdxTy()); local
3018 V0->getValueType(0).getScalarType(), V0, V1);
H A DSelectionDAG.cpp2710 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I)); local
2712 if (!V1 || !V2) // Not a constant, bail.
2717 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
2720 Inputs.push_back(std::make_pair(V1, V2));
3115 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); local
3119 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3121 return getConstantFP(V1, VT);
3124 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3126 return getConstantFP(V1, VT);
3129 s = V1
3270 APFloat V1 = N1CFP->getValueAPF(); local
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/external/llvm/lib/Transforms/Instrumentation/
H A DMemorySanitizer.cpp977 // S = (S1 & S2) | (V1 & S2) | (S1 & V2)
980 Value *V1 = I.getOperand(0); local
982 if (V1->getType() != S1->getType()) {
983 V1 = IRB.CreateIntCast(V1, S1->getType(), false);
987 Value *V1S2 = IRB.CreateAnd(V1, S2);
999 // S = (S1 & S2) | (~V1 & S2) | (S1 & ~V2)
1002 Value *V1 = IRB.CreateNot(I.getOperand(0)); local
1004 if (V1->getType() != S1->getType()) {
1005 V1
1121 Value *V1 = IRB.CreateBitCast(V, Type::getIntNTy(*MS.C, srcSizeInBits)); local
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/external/clang/lib/CodeGen/
H A DCGExprScalar.cpp953 Value* V1 = CGF.EmitScalarExpr(E->getExpr(0)); local
967 return Builder.CreateShuffleVector(V1, V2, SV, "shuffle");
/external/llvm/bindings/ocaml/llvm/
H A Dllvm_ocaml.c1924 CAMLprim LLVMValueRef llvm_build_shufflevector(LLVMValueRef V1, LLVMValueRef V2, argument
1927 return LLVMBuildShuffleVector(Builder_val(B), V1, V2, Mask, String_val(Name));
/external/llvm/lib/Transforms/Utils/
H A DSimplifyCFG.cpp520 std::vector<ValueEqualityComparisonCase> *V1 = &C1, *V2 = &C2; local
522 // Make V1 be smaller than V2.
523 if (V1->size() > V2->size())
524 std::swap(V1, V2);
526 if (V1->size() == 0) return false;
527 if (V1->size() == 1) {
529 ConstantInt *TheVal = (*V1)[0].Value;
536 array_pod_sort(V1->begin(), V1->end());
538 unsigned i1 = 0, i2 = 0, e1 = V1
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/external/qemu/target-mips/
H A Dcpu.h33 uint_fast16_t V1:1; member in struct:r4k_tlb_t
/external/expat/lib/
H A Dxmlparse.c1981 /* V1 is used to string-ize the version number. However, it would
1983 substituted before being passed to V1. CPP is defined to expand
1985 the version macros, then CPP will expand the resulting V1() macro
1989 #define V1(a,b,c) XML_L(#a)XML_L(".")XML_L(#b)XML_L(".")XML_L(#c) macro
1990 #define V2(a,b,c) XML_L("expat_")V1(a,b,c)
1994 #undef V1 macro

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