| /external/valgrind/main/coregrind/ |
| H A D | pub_core_debuginfo.h | 113 struct { Addr r15; Addr r14; Addr r13; Addr r12; Addr r11; Addr r7; } member in struct:__anon28322
|
| H A D | pub_core_basics.h | 106 UInt r11; member in struct:__anon28311::__anon28312::__anon28317
|
| /external/chromium_org/third_party/tcmalloc/chromium/src/base/ |
| H A D | elfcore.h | 72 uint64_t r15,r14,r13,r12,rbp,rbx,r11,r10; member in struct:i386_regs
189 "mov %%r11,48(%%rax)\n" \
|
| /external/chromium_org/third_party/tcmalloc/vendor/src/base/ |
| H A D | elfcore.h | 72 uint64_t r15,r14,r13,r12,rbp,rbx,r11,r10; member in struct:i386_regs
189 "mov %%r11,48(%%rax)\n" \
|
| /external/opencv/cv/src/ |
| H A D | cvmatchcontours.cpp | 231 double match_v, d12, area1, area2, r11, r12, r21, r22, w1, w2; local
284 r11 = r12 = r21 = r22 = w1 = w2 = d12 = 0;
311 r11 = ptr11[j]->r1;
319 r11 = r21 = 0;
343 t0 = fabs( r11 * w1 + r21 * w2 );
348 t0 = fabs( r11 * w1 - r21 * w2 );
|
| /external/v8/src/x64/ |
| H A D | codegen-x64.cc | 307 __ AllocateInNewSpace(rdi, r14, r11, r15, fail, TAG_OBJECT);
313 __ movq(r11, r14);
316 r11,
322 __ Integer32ToSmi(r11, r9);
323 __ movq(FieldOperand(r14, FixedDoubleArray::kLengthOffset), r11); local
390 __ AllocateInNewSpace(rdi, r11, r14, r15, &gc_required, TAG_OBJECT);
391 // r11: destination FixedArray
393 __ movq(FieldOperand(r11, HeapObject::kMapOffset), rdi);
395 __ movq(FieldOperand(r11, FixedArray::kLengthOffset), r14);
425 __ movq(FieldOperand(r11,
452 __ movq(FieldOperand(rdx, JSObject::kElementsOffset), r11); local
[all...] |
| H A D | assembler-x64.h | 121 "r11",
193 const Register r11 = { kRegister_r11_Code }; member in namespace:v8::internal
|
| H A D | builtins-x64.cc | 1308 __ movq(r11, FieldOperand(rbx, HeapObject::kMapOffset));
1311 r11,
1315 __ movq(FieldOperand(rbx, HeapObject::kMapOffset), r11); local
1316 __ RecordWriteField(rbx, HeapObject::kMapOffset, r11, r8,
|
| H A D | code-stubs-x64.cc | 2463 __ Move(r11, factory->the_hole_value());
2468 // r11 = the hole value
2483 r11); local
2835 __ movq(r11, FieldOperand(rax, JSRegExp::kDataAsciiCodeOffset));
2842 __ movq(r11, FieldOperand(rax, JSRegExp::kDataUC16CodeOffset));
2849 __ JumpIfSmi(r11, &runtime);
2853 // r11: code
2861 // r11: code
2918 // r11: code
2955 __ addq(r11, Immediat
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| H A D | AMDILISelLowering.cpp | 580 // ilt r11, r1, 0
582 // iadd r1, r1, r11
584 // ixor r1, r1, r11
586 // ixor r10, r10, r11
603 // ilt r11, r1, 0
604 SDValue r11 = DAG.getSelectCC(DL, local
613 // iadd r1, r1, r11
614 r1 = DAG.getNode(ISD::ADD, DL, OVT, r1, r11);
619 // ixor r1, r1, r11
620 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11);
710 SDValue r11 = DAG.getSetCC(DL, OVT, r1, DAG.getConstant(0, OVT), ISD::SETLT); local
[all...] |
| /external/chromium_org/v8/src/x64/ |
| H A D | assembler-x64.h | 124 "r11",
196 const Register r11 = { kRegister_r11_Code }; member in namespace:v8::internal
|
| H A D | codegen-x64.cc | 348 __ Allocate(rdi, r14, r11, r15, fail, TAG_OBJECT);
354 __ movq(r11, r14);
357 r11,
363 __ Integer32ToSmi(r11, r9);
364 __ movq(FieldOperand(r14, FixedDoubleArray::kLengthOffset), r11); local
435 __ Allocate(rdi, r11, r14, r15, &gc_required, TAG_OBJECT);
436 // r11: destination FixedArray
438 __ movq(FieldOperand(r11, HeapObject::kMapOffset), rdi);
440 __ movq(FieldOperand(r11, FixedArray::kLengthOffset), r14);
470 __ movq(FieldOperand(r11,
497 __ movq(FieldOperand(rdx, JSObject::kElementsOffset), r11); local
[all...] |
| H A D | code-stubs-x64.cc | 1522 __ Move(r11, factory->the_hole_value());
1527 // r11 = the hole value
1542 r11); local
1871 __ movq(r11, FieldOperand(rax, JSRegExp::kDataAsciiCodeOffset));
1876 // r11: irregexp code
1880 __ JumpIfSmi(r11, &runtime);
1885 // r11: code
1900 // r11: code
1949 // r11: code
1990 __ addq(r11, Immediat
[all...] |
| /external/kernel-headers/original/asm-x86/ |
| H A D | ptrace.h | 79 unsigned long r11; member in struct:pt_regs
|
| H A D | sigcontext.h | 109 unsigned long r11; member in struct:sigcontext
|
| /external/llvm/lib/Target/R600/ |
| H A D | AMDILISelLowering.cpp | 482 // ilt r11, r1, 0
484 // iadd r1, r1, r11
486 // ixor r1, r1, r11
488 // ixor r10, r10, r11
505 // ilt r11, r1, 0
506 SDValue r11 = DAG.getSelectCC(DL, local
515 // iadd r1, r1, r11
516 r1 = DAG.getNode(ISD::ADD, DL, OVT, r1, r11);
521 // ixor r1, r1, r11
522 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11);
608 SDValue r11 = DAG.getSetCC(DL, OVT, r1, DAG.getConstant(0, OVT), ISD::SETLT); local
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDILISelLowering.cpp | 580 // ilt r11, r1, 0
582 // iadd r1, r1, r11
584 // ixor r1, r1, r11
586 // ixor r10, r10, r11
603 // ilt r11, r1, 0
604 SDValue r11 = DAG.getSelectCC(DL, local
613 // iadd r1, r1, r11
614 r1 = DAG.getNode(ISD::ADD, DL, OVT, r1, r11);
619 // ixor r1, r1, r11
620 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11);
710 SDValue r11 = DAG.getSetCC(DL, OVT, r1, DAG.getConstant(0, OVT), ISD::SETLT); local
[all...] |
| /external/v8/src/arm/ |
| H A D | simulator-arm.h | 133 r8, r9, r10, r11, r12, r13, r14, r15, enumerator in enum:v8::internal::Simulator::Register
|
| /external/chromium_org/v8/src/arm/ |
| H A D | simulator-arm.h | 133 r8, r9, r10, r11, r12, r13, r14, r15, enumerator in enum:v8::internal::Simulator::Register
|
| /external/clang/test/Sema/ |
| H A D | array-init.c | 191 int r11[0] = {}; //expected-warning{{zero size arrays are an extension}} expected-warning{{use of GNU empty initializer extension}} variable
|
| /external/qemu/android/config/linux-x86/asm/ |
| H A D | kvm.h | 88 __u64 r8, r9, r10, r11; member in struct:kvm_regs
|
| /external/qemu/android/config/linux-x86_64/asm/ |
| H A D | kvm.h | 88 __u64 r8, r9, r10, r11; member in struct:kvm_regs
|
| /external/valgrind/main/VEX/priv/ |
| H A D | host_amd64_defs.c | 52 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" };
1084 vex_printf("movabsq $0x%llx,%%r11; ", i->Ain.XDirect.dstGA);
1085 vex_printf("movq %%r11,");
1088 vex_printf("movabsq $disp_cp_chain_me_to_%sEP,%%r11; call *%%r11 }",
1099 vex_printf("; movabsq $disp_indir,%%r11; jmp *%%r11 }");
1111 vex_printf("; movabsq $disp_assisted,%%r11; jmp *%%r11 }");
1317 vex_printf("(profInc) movabsq $NotKnownYet, %%r11; inc
2705 HReg r11 = hregAMD64_R11(); local
[all...] |
| H A D | host_s390_isel.c | 653 HReg r10, r11, h1; local
659 /* We use non-virtual registers r10 and r11 as pair */
661 r11 = make_gpr(11);
663 /* Move 1st operand into r11 and */
664 addInstr(env, s390_insn_move(8, r11, h1));
667 addInstr(env, s390_insn_divs(8, r10, r11, op2));
669 /* The result is in registers r10 (remainder) and r11 (quotient).
676 addInstr(env, s390_insn_move(8, *dst_lo, r11));
684 HReg r10, r11, h1; local
692 /* We use non-virtual registers r10 and r11 a
712 HReg r10, r11, hi, lo; local
840 HReg r10, r11; local
880 HReg r10, r11; local
1308 HReg r10, r11; local
2503 HReg r8, r9, r10, r11, r1; local
[all...] |
| /external/libvpx/libvpx/vp9/common/x86/ |
| H A D | vp9_idct_intrin_sse2.c | 1277 r6 = zero, r7 = zero, r8 = zero, r9 = zero, r10 = zero, r11 = zero, local
1327 TRANSPOSE_8X8(r8, r9, r10, r11, r12, r13, r14, r15, in8, in9, in10, in11,
1365 r11 = _mm_sub_epi16(stp2_4, stp2_11);
|