Searched refs:MemSize (Results 1 - 10 of 10) sorted by relevance
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 47 template<int MemSize> 50 return getOffsetUImm12OpValue(MI, OpIdx, Fixups, MemSize); 55 int MemSize) const; 142 int MemSize) const { 160 assert(MemSize <= 16 && "Invalid fixup for operation"); 161 FixupKind = FixupsBySize[Log2_32(MemSize)]; 165 assert(MemSize == 8 && "Invalid fixup for operation"); 175 assert(MemSize <= 8 && "Invalid fixup for operation"); 176 FixupKind = FixupsBySize[Log2_32(MemSize)]; 186 assert(MemSize < [all...] |
/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.h | 39 template<unsigned MemSize, unsigned RmSize> 42 printAddrRegExtendOperand(MI, OpNum, O, MemSize, RmSize); 47 raw_ostream &O, unsigned MemSize, 143 template<int MemSize> void
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H A D | AArch64InstPrinter.cpp | 63 raw_ostream &O, unsigned MemSize, 84 unsigned ShiftAmt = Log2_32(MemSize); 243 raw_ostream &O, int MemSize) { 247 uint32_t Imm = MOImm.getImm() * MemSize; 62 printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O, unsigned MemSize, unsigned RmSize) argument 242 printOffsetUImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O, int MemSize) argument
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/external/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 303 template<unsigned MemSize, unsigned RmSize> bool isAddrRegExtend() const { 313 return ShiftExtend.Amount == Log2_32(MemSize) || ShiftExtend.Amount == 0; 424 template<int MemSize> 440 if ((Val & (MemSize - 1)) != 0) return false; 443 return Val >= 0 && Val <= 0xfff * MemSize; 700 template <int MemSize> bool isSImm7Scaled() const { 708 if (Val % MemSize != 0) return false; 710 Val /= MemSize; 902 template<int MemSize> 907 uint64_t Val = CE->getValue() / MemSize; [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 55 template<unsigned MemSize> 58 if (!CN || CN->getZExtValue() % MemSize != 0 59 || CN->getZExtValue() / MemSize > 0xfff) 62 UImm12 = CurDAG->getTargetConstant(CN->getZExtValue() / MemSize, MVT::i64);
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/external/llvm/lib/Transforms/Scalar/ |
H A D | ScalarReplAggregates.cpp | 157 void isSafeMemAccess(uint64_t Offset, uint64_t MemSize, 1792 void SROA::isSafeMemAccess(uint64_t Offset, uint64_t MemSize, argument 1798 MemSize == TD->getTypeAllocSize(Info.AI->getAllocatedType())) { 1821 if (TypeHasComponent(T, Offset, MemSize)) { 1885 uint64_t MemSize = Length->getZExtValue(); local 1887 MemSize == TD->getTypeAllocSize(AI->getAllocatedType()))
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/external/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 678 unsigned MemSize = fieldFromInstruction(Val, 30, 2); local 683 switch (MemSize) { 697 llvm_unreachable("Invalid MemSize in DecodeLoadPairExclusiveInstruction");
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 1019 unsigned MemSize = LSN->getMemoryVT().getSizeInBits() / 8; local 1020 if (LSNAlign >= MemSize && MemSize > 1) 1021 Alignment = MemSize;
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 2239 unsigned MemSize = ResVT.getSizeInBits()/8; local 2240 int FI = MFI.CreateStackObject(MemSize, MemSize, false);
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H A D | X86ISelLowering.cpp | 8684 unsigned MemSize = DstTy.getSizeInBits()/8; local 8685 int SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize, false); 8716 MachineMemOperand::MOLoad, MemSize, MemSize); 8720 SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize, false); 8726 MachineMemOperand::MOStore, MemSize, MemSize);
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