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Searched defs:dest (Results 1 - 9 of 9) sorted by relevance

/art/runtime/base/
H A D	casts.h	`86 Dest dest; local 87 memcpy(&dest, &source, sizeof(dest)); 88 return dest;`
/art/compiler/dex/quick/
H A D	mir_to_lir-inl.h	75 inline LIR* Mir2Lir::NewLIR1(int opcode, int dest) { argument 80 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest); 85 inline LIR* Mir2Lir::NewLIR2(int opcode, int dest, int src1) { argument 90 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1); 95 inline LIR* Mir2Lir::NewLIR3(int opcode, int dest, int src1, int src2) { argument 100 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2); 105 inline LIR* Mir2Lir::NewLIR4(int opcode, int dest, int src1, int src2, int info) { argument 110 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2, info); 115 inline LIR* Mir2Lir::NewLIR5(int opcode, int dest, int src1, int src2, int info1, argument 121 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src [all...]
H A D	local_optimizations.cc	`42 void Mir2Lir::ConvertMemOpIntoMove(LIR* orig_lir, int dest, int src) { argument 45 move_lir = OpRegCopyNoInsert(dest, src); 49 * will need to be re-checked (eg the new dest clobbers the src used in`
H A D	codegen_util.cc	`118 int dest = lir->operands[0]; local 134 LOG(INFO) << "-------- entry offset: 0x" << std::hex << dest; local 144 LOG(INFO) << "-------- exit offset: 0x" << std::hex << dest; local`
/art/compiler/jni/quick/
H A D	jni_compiler.cc	`475 FrameOffset dest = jni_conv->CurrentParamStackOffset(); local 476 __ StoreRawPtr(dest, in_reg);`
/art/compiler/dex/
H A D	ssa_transformation.cc	436 * Perform dest U= src1 ^ ~src2 439 void MIRGraph::ComputeSuccLineIn(ArenaBitVector* dest, const ArenaBitVector* src1, argument 441 if (dest->GetStorageSize() != src1->GetStorageSize() \|\| 442 dest->GetStorageSize() != src2->GetStorageSize() \|\| 443 dest->IsExpandable() != src1->IsExpandable() \|\| 444 dest->IsExpandable() != src2->IsExpandable()) { 449 for (idx = 0; idx < dest->GetStorageSize(); idx++) { 450 dest->GetRawStorage()[idx] \|= src1->GetRawStorageWord(idx) & ~(src2->GetRawStorageWord(idx));
/art/compiler/utils/mips/
H A D	assembler_mips.cc	608 void MipsAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) { argument 614 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 617 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value()); 619 SP, dest.Int32Value() + 4); 621 StoreFToOffset(src.AsFRegister(), SP, dest.Int32Value()); 624 StoreDToOffset(src.AsDRegister(), SP, dest.Int32Value()); 628 void MipsAssembler::StoreRef(FrameOffset dest, ManagedRegister msrc) { argument 631 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 634 void MipsAssembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) { argument 637 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest 640 StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister mscratch) argument 648 StoreImmediateToThread(ThreadOffset dest, uint32_t imm, ManagedRegister mscratch) argument 670 StoreSpanning(FrameOffset dest, ManagedRegister msrc, FrameOffset in_off, ManagedRegister mscratch) argument 688 MipsManagedRegister dest = mdest.AsMips(); local 695 MipsManagedRegister dest = mdest.AsMips(); local 703 MipsManagedRegister dest = mdest.AsMips(); local 711 MipsManagedRegister dest = mdest.AsMips(); local 725 MipsManagedRegister dest = mdest.AsMips(); local 752 CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister mscratch) argument 782 Copy(FrameOffset dest, FrameOffset src, ManagedRegister mscratch, size_t size) argument 798 Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister mscratch, size_t size) argument 819 Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, ManagedRegister mscratch, size_t size) argument [all...]
/art/compiler/utils/x86/
H A D	assembler_x86.cc	1467 void X86Assembler::StoreRef(FrameOffset dest, ManagedRegister msrc) { argument 1470 movl(Address(ESP, dest), src.AsCpuRegister()); 1473 void X86Assembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) { argument 1476 movl(Address(ESP, dest), src.AsCpuRegister()); 1479 void X86Assembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm, argument 1481 movl(Address(ESP, dest), Immediate(imm)); 1484 void X86Assembler::StoreImmediateToThread(ThreadOffset dest, uint32_t imm, argument 1486 fs()->movl(Address::Absolute(dest), Immediate(imm)); 1512 X86ManagedRegister dest = mdest.AsX86(); local 1513 if (dest 1539 X86ManagedRegister dest = mdest.AsX86(); local 1566 X86ManagedRegister dest = mdest.AsX86(); local 1573 X86ManagedRegister dest = mdest.AsX86(); local 1580 X86ManagedRegister dest = mdest.AsX86(); local 1587 X86ManagedRegister dest = mdest.AsX86(); local 1615 X86ManagedRegister dest = mdest.AsX86(); local 1640 CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister mscratch) argument 1666 Copy(FrameOffset dest, FrameOffset src, ManagedRegister mscratch, size_t size) argument 1694 Copy(FrameOffset dest, FrameOffset src_base, Offset src_offset, ManagedRegister mscratch, size_t size) argument 1703 Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, ManagedRegister scratch, size_t size) argument 1712 Copy(FrameOffset dest, Offset dest_offset, FrameOffset src, Offset src_offset, ManagedRegister mscratch, size_t size) argument [all...]
/art/compiler/utils/arm/
H A D	assembler_arm.cc	1499 void ArmAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) { argument 1505 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 1508 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value()); 1510 SP, dest.Int32Value() + 4); 1512 StoreSToOffset(src.AsSRegister(), SP, dest.Int32Value()); 1515 StoreDToOffset(src.AsDRegister(), SP, dest.Int32Value()); 1519 void ArmAssembler::StoreRef(FrameOffset dest, ManagedRegister msrc) { argument 1522 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value()); 1525 void ArmAssembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) { argument 1528 StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest 1531 StoreSpanning(FrameOffset dest, ManagedRegister msrc, FrameOffset in_off, ManagedRegister mscratch) argument 1540 CopyRef(FrameOffset dest, FrameOffset src, ManagedRegister mscratch) argument 1569 StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister mscratch) argument 1577 StoreImmediateToThread(ThreadOffset dest, uint32_t imm, ManagedRegister mscratch) argument 1691 Copy(FrameOffset dest, FrameOffset src, ManagedRegister mscratch, size_t size) argument 1706 Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset, ManagedRegister mscratch, size_t size) argument 1727 Copy(ManagedRegister dest, Offset dest_offset, ManagedRegister src, Offset src_offset, ManagedRegister mscratch, size_t size) argument [all...]

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