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Searched defs:rd (Results 1 - 7 of 7) sorted by relevance

/art/compiler/utils/arm/
H A D	assembler_arm32.h	43 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 45 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 47 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 48 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 50 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 51 void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 53 void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 55 void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 57 void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 59 void sbc(Register rd, Registe 239 AddConstantWithCarry(Register rd, Register rn, int32_t value, Condition cond = AL) argument [all...]
H A D	assembler_thumb2.h	65 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 67 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 69 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 70 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 72 void rsb(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 73 void rsbs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 75 void add(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 77 void adds(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 79 void adc(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 81 void sbc(Register rd, Registe 269 AddConstantWithCarry(Register rd, Register rn, int32_t value, Condition cond = AL) argument [all...]
H A D	assembler_arm32.cc	28 void Arm32Assembler::and_(Register rd, Register rn, const ShifterOperand& so, argument 30 EmitType01(cond, so.type(), AND, 0, rn, rd, so); 34 void Arm32Assembler::eor(Register rd, Register rn, const ShifterOperand& so, argument 36 EmitType01(cond, so.type(), EOR, 0, rn, rd, so); 40 void Arm32Assembler::sub(Register rd, Register rn, const ShifterOperand& so, argument 42 EmitType01(cond, so.type(), SUB, 0, rn, rd, so); 45 void Arm32Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, argument 47 EmitType01(cond, so.type(), RSB, 0, rn, rd, so); 50 void Arm32Assembler::rsbs(Register rd, Register rn, const ShifterOperand& so, argument 52 EmitType01(cond, so.type(), RSB, 1, rn, rd, s 56 add(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 62 adds(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 68 subs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 74 adc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 80 sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 86 rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 114 orr(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 120 orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 126 mov(Register rd, const ShifterOperand& so, Condition cond) argument 131 movs(Register rd, const ShifterOperand& so, Condition cond) argument 136 bic(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 142 mvn(Register rd, const ShifterOperand& so, Condition cond) argument 147 mvns(Register rd, const ShifterOperand& so, Condition cond) argument 152 mul(Register rd, Register rn, Register rm, Condition cond) argument 158 mla(Register rd, Register rn, Register rm, Register ra, Condition cond) argument 165 mls(Register rd, Register rn, Register rm, Register ra, Condition cond) argument 179 sdiv(Register rd, Register rn, Register rm, Condition cond) argument 195 udiv(Register rd, Register rn, Register rm, Condition cond) argument 211 ldr(Register rd, const Address& ad, Condition cond) argument 216 str(Register rd, const Address& ad, Condition cond) argument 221 ldrb(Register rd, const Address& ad, Condition cond) argument 226 strb(Register rd, const Address& ad, Condition cond) argument 231 ldrh(Register rd, const Address& ad, Condition cond) argument 236 strh(Register rd, const Address& ad, Condition cond) argument 241 ldrsb(Register rd, const Address& ad, Condition cond) argument 246 ldrsh(Register rd, const Address& ad, Condition cond) argument 251 ldrd(Register rd, const Address& ad, Condition cond) argument 257 strd(Register rd, const Address& ad, Condition cond) argument 514 EmitType01(Condition cond, int type, Opcode opcode, int set_cc, Register rn, Register rd, const ShifterOperand& so) argument 543 EmitMemOp(Condition cond, bool load, bool byte, Register rd, const Address& ad) argument 582 EmitMemOpAddressMode3(Condition cond, int32_t mode, Register rd, const Address& ad) argument 615 EmitShiftImmediate(Condition cond, Shift opcode, Register rd, Register rm, const ShifterOperand& so) argument 632 EmitShiftRegister(Condition cond, Shift opcode, Register rd, Register rm, const ShifterOperand& so) argument 662 clz(Register rd, Register rm, Condition cond) argument 676 movw(Register rd, uint16_t imm16, Condition cond) argument 685 movt(Register rd, uint16_t imm16, Condition cond) argument 694 EmitMulOp(Condition cond, int32_t opcode, Register rd, Register rn, Register rm, Register rs) argument 727 strex(Register rd, Register rt, Register rn, Condition cond) argument 1042 Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument 1053 Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument 1065 Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument 1077 Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument 1087 Rrx(Register rd, Register rm, bool setcc, Condition cond) argument 1096 Lsl(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument 1106 Lsr(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument 1116 Asr(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument 1126 Ror(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument 1179 Push(Register rd, Condition cond) argument 1184 Pop(Register rd, Condition cond) argument 1199 Mov(Register rd, Register rm, Condition cond) argument 1239 AddConstant(Register rd, int32_t value, Condition cond) argument 1244 AddConstant(Register rd, Register rn, int32_t value, Condition cond) argument 1280 AddConstantSetFlags(Register rd, Register rn, int32_t value, Condition cond) argument 1307 LoadImmediate(Register rd, int32_t value, Condition cond) argument [all...]
H A D	assembler_thumb2.cc	28 void Thumb2Assembler::and_(Register rd, Register rn, const ShifterOperand& so, argument 30 EmitDataProcessing(cond, AND, 0, rn, rd, so); 34 void Thumb2Assembler::eor(Register rd, Register rn, const ShifterOperand& so, argument 36 EmitDataProcessing(cond, EOR, 0, rn, rd, so); 40 void Thumb2Assembler::sub(Register rd, Register rn, const ShifterOperand& so, argument 42 EmitDataProcessing(cond, SUB, 0, rn, rd, so); 46 void Thumb2Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, argument 48 EmitDataProcessing(cond, RSB, 0, rn, rd, so); 52 void Thumb2Assembler::rsbs(Register rd, Register rn, const ShifterOperand& so, argument 54 EmitDataProcessing(cond, RSB, 1, rn, rd, s 58 add(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 64 adds(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 70 subs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 76 adc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 82 sbc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 88 rsc(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 116 orr(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 122 orrs(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 128 mov(Register rd, const ShifterOperand& so, Condition cond) argument 133 movs(Register rd, const ShifterOperand& so, Condition cond) argument 138 bic(Register rd, Register rn, const ShifterOperand& so, Condition cond) argument 144 mvn(Register rd, const ShifterOperand& so, Condition cond) argument 149 mvns(Register rd, const ShifterOperand& so, Condition cond) argument 154 mul(Register rd, Register rn, Register rm, Condition cond) argument 177 mla(Register rd, Register rn, Register rm, Register ra, Condition cond) argument 193 mls(Register rd, Register rn, Register rm, Register ra, Condition cond) argument 225 sdiv(Register rd, Register rn, Register rm, Condition cond) argument 240 udiv(Register rd, Register rn, Register rm, Condition cond) argument 255 ldr(Register rd, const Address& ad, Condition cond) argument 260 str(Register rd, const Address& ad, Condition cond) argument 265 ldrb(Register rd, const Address& ad, Condition cond) argument 270 strb(Register rd, const Address& ad, Condition cond) argument 275 ldrh(Register rd, const Address& ad, Condition cond) argument 280 strh(Register rd, const Address& ad, Condition cond) argument 285 ldrsb(Register rd, const Address& ad, Condition cond) argument 290 ldrsh(Register rd, const Address& ad, Condition cond) argument 295 ldrd(Register rd, const Address& ad, Condition cond) argument 306 strd(Register rd, const Address& ad, Condition cond) argument 612 Is32BitDataProcessing(Condition cond, Opcode opcode, int set_cc, Register rn, Register rd, const ShifterOperand& so) argument 730 Emit32BitDataProcessing(Condition cond, Opcode opcode, int set_cc, Register rn, Register rd, const ShifterOperand& so) argument 810 Emit16BitDataProcessing(Condition cond, Opcode opcode, int set_cc, Register rn, Register rd, const ShifterOperand& so) argument 939 Emit16BitAddSub(Condition cond, Opcode opcode, int set_cc, Register rn, Register rd, const ShifterOperand& so) argument 1076 EmitDataProcessing(Condition cond, Opcode opcode, int set_cc, Register rn, Register rd, const ShifterOperand& so) argument 1092 EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc) argument 1129 EmitShift(Register rd, Register rn, Shift shift, Register rm, bool setcc) argument 1244 EmitLoadStore(Condition cond, bool load, bool byte, bool half, bool is_signed, Register rd, const Address& ad) argument 1511 clz(Register rd, Register rm, Condition cond) argument 1528 movw(Register rd, uint16_t imm16, Condition cond) argument 1557 movt(Register rd, uint16_t imm16, Condition cond) argument 1598 strex(Register rd, Register rt, Register rn, uint16_t imm, Condition cond) argument 1618 strex(Register rd, Register rt, Register rn, Condition cond) argument 2049 Push(Register rd, Condition cond) argument 2054 Pop(Register rd, Condition cond) argument 2069 Mov(Register rd, Register rm, Condition cond) argument 2155 Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument 2163 Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument 2172 Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument 2181 Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc, Condition cond) argument 2189 Rrx(Register rd, Register rm, bool setcc, Condition cond) argument 2195 Lsl(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument 2202 Lsr(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument 2209 Asr(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument 2216 Ror(Register rd, Register rm, Register rn, bool setcc, Condition cond) argument 2290 AddConstant(Register rd, int32_t value, Condition cond) argument 2295 AddConstant(Register rd, Register rn, int32_t value, Condition cond) argument 2331 AddConstantSetFlags(Register rd, Register rn, int32_t value, Condition cond) argument 2358 LoadImmediate(Register rd, int32_t value, Condition cond) argument [all...]
/art/disassembler/
H A D	disassembler_mips.cc	`62 { kRTypeMask \| (0x1f << 11), 9 \| (31 << 11), "jalr", "S", }, // rd = 31 is implicit. 176 uint32_t rd = (instruction >> 11) & 0x1f; // R-type. local 204 case 'D': args << 'r' << rd; break; local 205 case 'd': args << 'f' << rd; break; local`
/art/compiler/utils/arm64/
H A D	assembler_arm64.cc	`72 void Arm64Assembler::AddConstant(Register rd, int32_t value, Condition cond) { argument 73 AddConstant(rd, rd, value, cond); 76 void Arm64Assembler::AddConstant(Register rd, Register rn, int32_t value, argument 80 ___ Add(reg_x(rd), reg_x(rn), value); 82 // temp = rd + value 83 // rd = cond ? temp : rn 85 temps.Exclude(reg_x(rd), reg_x(rn)); 88 ___ Csel(reg_x(rd), temp, reg_x(rd), COND_O [all...]`
/art/compiler/utils/mips/
H A D	assembler_mips.cc	41 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) { argument 44 CHECK_NE(rd, kNoRegister); 48 static_cast<int32_t>(rd) << kRdShift \| 162 void MipsAssembler::Add(Register rd, Register rs, Register rt) { argument 163 EmitR(0, rs, rt, rd, 0, 0x20); 166 void MipsAssembler::Addu(Register rd, Register rs, Register rt) { argument 167 EmitR(0, rs, rt, rd, 0, 0x21); 178 void MipsAssembler::Sub(Register rd, Register rs, Register rt) { argument 179 EmitR(0, rs, rt, rd, 0, 0x22); 182 void MipsAssembler::Subu(Register rd, Registe argument 202 And(Register rd, Register rs, Register rt) argument 210 Or(Register rd, Register rs, Register rt) argument 218 Xor(Register rd, Register rs, Register rt) argument 226 Nor(Register rd, Register rs, Register rt) argument 230 Sll(Register rd, Register rs, int shamt) argument 234 Srl(Register rd, Register rs, int shamt) argument 238 Sra(Register rd, Register rs, int shamt) argument 242 Sllv(Register rd, Register rs, Register rt) argument 246 Srlv(Register rd, Register rs, Register rt) argument 250 Srav(Register rd, Register rs, Register rt) argument 278 Mfhi(Register rd) argument 282 Mflo(Register rd) argument 298 Slt(Register rd, Register rs, Register rt) argument 302 Sltu(Register rd, Register rs, Register rt) argument 434 Mul(Register rd, Register rs, Register rt) argument 439 Div(Register rd, Register rs, Register rt) argument 444 Rem(Register rd, Register rs, Register rt) argument [all...]

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