| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 73f615b0bd822db3a2a8aab2fd4ed58f093c9769 |
|
08-Oct-2013 |
Reid Kleckner <reid@kleckner.net> |
Explicitly request unsigned enum types when desired
This fixes repeated -Wmicrosoft warnings when self-hosting clang on
Windows, and gets us real unsigned enum types with MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192227 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| d0a3916e430201d0179c723e4ebdd9bf4f0ee02b |
|
03-Jul-2013 |
Eric Christopher <echristo@gmail.com> |
Use SmallVectorImpl::iterator/const_iterator instead of SmallVector
to avoid specifying the vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| b86a0cdb674549d8493043331cecd9cbf53b80da |
|
15-Jun-2013 |
Andrew Trick <atrick@apple.com> |
Machine Model: Add MicroOpBufferSize and resource BufferSize.
Replace the ill-defined MinLatency and ILPWindow properties with
with straightforward buffer sizes:
MCSchedMode::MicroOpBufferSize
MCProcResourceDesc::BufferSize
These can be used to more precisely model instruction execution if desired.
Disabled some misched tests temporarily. They'll be reenabled in a few commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184032 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e38afe1e335084134f7830ba6f2208e2ddde59b4 |
|
24-Apr-2013 |
Andrew Trick <atrick@apple.com> |
MI Sched: eliminate local vreg copies.
For now, we just reschedule instructions that use the copied vregs and
let regalloc elliminate it. I would really like to eliminate the
copies on-the-fly during scheduling, but we need a complete
implementation of repairIntervalsInRange() first.
The general strategy is for the register coalescer to eliminate as
many global copies as possible and shrink live ranges to be
extended-basic-block local. The coalescer should not have to worry
about resolving local copies (e.g. it shouldn't attemp to reorder
instructions). The scheduler is a much better place to deal with local
interference. The coalescer side of this equation needs work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 4392f0f407fe4e2a9ec53b2560a1cbf86357c190 |
|
13-Apr-2013 |
Andrew Trick <atrick@apple.com> |
MI-Sched: schedule physreg copies.
The register allocator expects minimal physreg live ranges. Schedule
physreg copies accordingly. This is slightly tricky when they occur in
the middle of the scheduling region. For now, this is handled by
rescheduling the copy when its associated instruction is
scheduled. Eventually we may instead bundle them, but only if we can
preserve the bundles as parallel copies during regalloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179449 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| ebff1d903508155f1b3d906fbc37023094843c1f |
|
01-Mar-2013 |
Andrew Trick <atrick@apple.com> |
Fix incorrect ScheduleDAG comment and formalize Weak edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 751bc8d4c9ee4298449fed264571ffc162852e06 |
|
20-Feb-2013 |
Jakub Staszak <kubastaszak@gmail.com> |
Fix #includes, so we include only what we really need.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175581 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 3084979ff27f48487c7421536144c41a36cae997 |
|
25-Jan-2013 |
Andrew Trick <atrick@apple.com> |
MachineScheduler support for viewGraph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173432 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a5a73ad15905c18843a8312bb3f20f5c501744de |
|
25-Jan-2013 |
Andrew Trick <atrick@apple.com> |
ScheduleDAG: Added isBoundaryNode to conveniently detect a common corner case.
This fixes DAG subtree analysis at the boundary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173427 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 66658dd9a1ffe00a5f6e0afca7afb16ec6704ed3 |
|
24-Jan-2013 |
Andrew Trick <atrick@apple.com> |
MIsched: Added biasCriticalPath.
Allow schedulers to order DAG edges by critical path. This makes
DFS-based heuristics more stable and effective.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173317 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 255f89faee13dc491cb64fbeae3c763e7e2ea4e6 |
|
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Sort the #include lines for the include/... tree with the script.
AKA: Recompile *ALL* the source code!
This one went much better. No manual edits here. I spot-checked for
silliness and grep-checked for really broken edits and everything seemed
good. It all still compiles. Yell if you see something that looks goofy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| cf6b6131dd0da37903a6e3a5173ea12aa8263713 |
|
13-Nov-2012 |
Andrew Trick <atrick@apple.com> |
misched: Don't consider artificial edges weak edges.
For now be more conservative in case other out-of-tree schedulers rely
on the old behavior of artificial edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167808 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| ae692f2baedf53504af2715993b166950e185a55 |
|
12-Nov-2012 |
Andrew Trick <atrick@apple.com> |
misched: Infrastructure for weak DAG edges.
This adds support for weak DAG edges to the general scheduling
infrastructure in preparation for MachineScheduler support for
heuristics based on weak edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167738 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 8d4abb2446f80986ad5136bbec30c5da18cd6f4b |
|
06-Nov-2012 |
Andrew Trick <atrick@apple.com> |
misched: TargetSchedule interface for machine resources.
Expose the processor resources defined by the machine model to the
scheduler and other clients through the TargetSchedule interface.
Normalize each resource count with respect to other kinds of
resources. This allows scheduling heuristics to balance resources
against other kinds of resources and latency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167444 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a78d3228e8b2a14915ea9908dbaaf2c934803e11 |
|
06-Nov-2012 |
Andrew Trick <atrick@apple.com> |
ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.
This is in preparation for adding "weak" DAG edges, but generally
simplifies the design.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167435 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 412cd2f81374865dfa708bef6d5b896ca10dece0 |
|
10-Oct-2012 |
Andrew Trick <atrick@apple.com> |
misched: Use the TargetSchedModel interface wherever possible.
Allows the new machine model to be used for NumMicroOps and OutputLatency.
Allows the HazardRecognizer to be disabled along with itineraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a98f600a64b7b70754df58926ce8d60feeb9ce29 |
|
08-Oct-2012 |
Andrew Trick <atrick@apple.com> |
misched: remove forceUnitLatencies. Defaults are handled by the default SchedModel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| ffd2526fa4e2d78564694b4797b96236c9ba9d85 |
|
23-Aug-2012 |
Andrew Trick <atrick@apple.com> |
Simplify the computeOperandLatency API.
The logic for recomputing latency based on a ScheduleDAG edge was
shady. This bypasses the problem by requiring the client to provide
operand indices. This ensures consistent use of the machine model's
API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9df55eed0470c898c4003dc433c4479bdb0e0aac |
|
13-Jun-2012 |
Andrew Trick <atrick@apple.com> |
sched: Avoid trivially redundant DAG edges. Take the one with higher latency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| b7e0289fb320c8440ba5eed121a8b932dbd806a2 |
|
05-Jun-2012 |
Andrew Trick <atrick@apple.com> |
misched: API for minimum vs. expected latency.
Minimum latency determines per-cycle scheduling groups.
Expected latency determines critical path and cost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 17d35e57a585e869dc3084666abd17f173723735 |
|
14-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched: implemented a framework for top-down or bottom-up scheduling.
New flags: -misched-topdown, -misched-bottomup. They can be used with
the default scheduler or with -misched=shuffle. Without either
topdown/bottomup flag -misched=shuffle now alternates scheduling
direction.
LiveIntervals update is unimplemented with bottom-up scheduling, so
only -misched-topdown currently works.
Capped the ScheduleDAG hierarchy with a concrete ScheduleDAGMI class.
ScheduleDAGMI is aware of the top and bottom of the unscheduled zone
within the current region. Scheduling policy can be plugged into
the ScheduleDAGMI driver by implementing MachineSchedStrategy.
ConvergingScheduler is now the default scheduling algorithm.
It exercises the new driver but still does no reordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 953be893e8cffa0ef9bf410036cd96aeb526e98a |
|
08-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: rename core scheduler methods for consistency.
We had half the API with one convention, half with another. Now was a
good time to clean it up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152255 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 47c144505b9be28ed22c626b3a407c11dba2fec5 |
|
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.
ScheduleDAG is responsible for the DAG: SUnits and SDeps. It provides target hooks for latency computation.
ScheduleDAGInstrs extends ScheduleDAG and defines the current scheduling region in terms of MachineInstr iterators. It has access to the target's scheduling itinerary data. ScheduleDAGInstrs provides the logic for building the ScheduleDAG for the sequence of MachineInstrs in the current region. Target's can implement highly custom schedulers by extending this class.
ScheduleDAGPostRATDList provides the driver and diagnostics for current postRA scheduling. It maintains a current Sequence of scheduled machine instructions and logic for splicing them into the block. During scheduling, it uses the ScheduleHazardRecognizer provided by the target.
Specific changes:
- Removed driver code from ScheduleDAG. clearDAG is the only interface needed.
- Added enterRegion/exitRegion hooks to ScheduleDAGInstrs to delimit the scope of each scheduling region and associated DAG. They should be used to setup and cleanup any region-specific state in addition to the DAG itself. This is necessary because we reuse the same ScheduleDAG object for the entire function. The target may extend these hooks to do things at regions boundaries, like bundle terminators. The hooks are called even if we decide not to schedule the region. So all instructions in a block are "covered" by these calls.
- Added ScheduleDAGInstrs::begin()/end() public API.
- Moved Sequence into the driver layer, which is specific to the scheduling algorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152208 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 84b454d1a270a5d685e01686ed15e68c44b0b56a |
|
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: modularize schedule emission.
ScheduleDAG has nothing to do with how the instructions are scheduled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152206 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 73ba69b6843f7f23345b1e8745cb328952cae0d8 |
|
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: modularize schedule printing.
ScheduleDAG will not refer to the scheduled instruction sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152205 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 4c727204271067f3dbf50bd23098b2df8e1cc47a |
|
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: modularize schedule verification.
ScheduleDAG will not refer to the scheduled instruction sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152204 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 56b94c52c9bf0342106ca7d274b9bb469d5ef619 |
|
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
Cleanup in preparation for misched: Move DAG visualization logic.
Soon, ScheduleDAG will not refer to the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152177 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 084e179f090f9a47bdf66f49775a125f4a2a8a8c |
|
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
Cleanup: DAG building is specific to either SD or MI scheduling. Not part of the target interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152174 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e75537a243858d8293832109e61bafc8484bb52a |
|
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152173 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| b4566a999970b514d7c6973d99e293a6625d3f70 |
|
22-Feb-2012 |
Andrew Trick <atrick@apple.com> |
Initialize SUnits before DAG building.
Affect on SD scheduling and postRA scheduling:
Printing the DAG will display the nodes in top-down topological order.
This matches the order within the MBB and makes my life much easier in general.
Affect on misched:
We don't need to track virtual register uses at all. This is awesome.
I also intend to rely on the SUnit ID as a topo-sort index. So if A < B then we cannot have an edge B -> A.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| aae875c27ce59e1c98dbc4a2358a006f2edef433 |
|
06-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Move some llvm_unreachable's from r149849 out of switch statements to satisfy -Wcovered-switch-default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149860 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 50bee42b54cd9aec5f49566307df2b0cf23afcf6 |
|
05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e5dafc395656645c3a5d90e7c1b55477800f2ab1 |
|
12-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
Move Sched::Preference out of TargetMachine.h where it is not referenced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148014 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 2d24e2a396a1d211baaeedf32148a3b657240170 |
|
20-Dec-2011 |
David Blaikie <dblaikie@gmail.com> |
Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e837dead3c8dc3445ef6a0e2322179c57e264a13 |
|
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 4cb971ce1c8b254f29365c988b55f6dcfe86d21e |
|
15-Jun-2011 |
Andrew Trick <atrick@apple.com> |
Added -stress-sched flag in the Asserts build.
Added a test case for handling physreg aliases during pre-RA-sched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| ee1f87881b185873b1e285a2395a2c6a97c47ec4 |
|
02-Jun-2011 |
Devang Patel <dpatel@apple.com> |
Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 554daa67bd1c4f01fb7a00f2f4255a52b81e9fa3 |
|
26-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Be careful about scheduling nodes above previous calls. It increase usages of
more callee-saved registers and introduce copies. Only allows it if scheduling
a node above calls would end up lessen register pressure.
Call operands also has added ABI restrictions for register allocation, so be
extra careful with hoisting them above calls.
rdar://9329627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130245 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 7a2bdde0a0eebcd2125055e0eacaca040f0b766c |
|
15-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 12f0dc6bb556976f22d89ebcf42bce273c9e7d38 |
|
14-Apr-2011 |
Andrew Trick <atrick@apple.com> |
In the pre-RA scheduler, maintain cmp+br proximity.
This is done by pushing physical register definitions close to their
use, which happens to handle flag definitions if they're not glued to
the branch. This seems to be generally a good thing though, so I
didn't need to add a target hook yet.
The primary motivation is to generate code closer to what people
expect and rule out missed opportunity from enabling macro-op
fusion. As a side benefit, we get several 2-5% gains on x86
benchmarks. There is one regression:
SingleSource/Benchmarks/Shootout/lists slows down be -10%. But this is
an independent scheduler bug that will be tracked separately.
See rdar://problem/9283108.
Incidentally, pre-RA scheduling is only half the solution. Fixing the
later passes is tracked by:
<rdar://problem/8932804> [pre-RA-sched] on x86, attempt to schedule CMP/TEST adjacent with condition jump
Fixes:
<rdar://problem/9262453> Scheduler unnecessary break of cmp/jump fusion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129508 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 54699765064842fd08d1466adc93453660bc2a85 |
|
07-Apr-2011 |
Andrew Trick <atrick@apple.com> |
Added a check in the preRA scheduler for potential interference on a
induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.
Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| d756eceb83fc9a7536f76adfe24cdb19d4c2f253 |
|
07-Mar-2011 |
Eric Christopher <echristo@apple.com> |
Typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127186 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 92e946630d5f9bb092853b93501387dd216899b9 |
|
04-Feb-2011 |
Andrew Trick <atrick@apple.com> |
Introducing a new method of tracking register pressure. We can't
precisely track pressure on a selection DAG, but we can at least keep
it balanced. This design accounts for various interesting aspects of
selection DAGS: register and subregister copies, glued nodes, dead
nodes, unused registers, etc.
Added SUnit::NumRegDefsLeft and ScheduleDAGSDNodes::RegDefIter.
Note: I disabled PrescheduleNodesWithMultipleUses when register
pressure is enabled, based on no evidence other than I don't think it
makes sense to have both enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124853 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 7853ae1d97acb65bd4dfd9a15478c14f475dbd41 |
|
25-Dec-2010 |
Eric Christopher <echristo@apple.com> |
Header warning patrol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122551 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a75ce9f5d2236d93c117e861e60e6f3f748c9555 |
|
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Minor cleanup related to my latest scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122545 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 2da8bc8a5f7705ac131184cd247f48500da0d74e |
|
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 6e8f4c404825b79f9b9176483653f1aa927dfbde |
|
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 4d8455ea4d2950ca3e818c7e9ba14150286c039b |
|
20-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122212 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| dd1fc8cbf146a951ab0f15c25e92adef3f84ee58 |
|
25-Nov-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
SDep is POD-like. Shave off a few bytes from SUnit by moving a member around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120150 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 8239daf7c83a65a189c352cce3191cdc3bbfe151 |
|
03-Nov-2010 |
Evan Cheng <evan.cheng@apple.com> |
Two sets of changes. Sorry they are intermingled.
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
"optimize for latency". Call instructions don't have the right latency and
this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
not # of micro-ops since multi-latency instructions is completely executed
even when the predicate is false. Also, some instruction will be "slower"
when they are predicated due to the register def becoming implicit input.
rdar://8598427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a4e4ffd389497eb28f5fe91521fb71da4340e5d6 |
|
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Change push_all to a non-virtual function and implement it in the
base class, since all the implementations are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 4f989451328f638bab0e9535bbc1704ea7262324 |
|
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Delete an unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104658 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 1cc3984148be113c6e5e470f23c9ddbd37679c5f |
|
21-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104293 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 15a16def6e70c8f7df1023da80ceb89887203b40 |
|
20-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add a hybrid bottom up scheduler that reduce register usage while avoiding
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 309d20c89c5fde5a6ebe3b40a3fd0fbc3e5ffe40 |
|
20-May-2010 |
Jim Grosbach <grosbach@apple.com> |
Fix the post-RA instruction scheduler to handle instructions referenced by
more than one dbg_value instruction. rdar://7759363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104174 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| bae5210321e0c3ea28723334841555135a61e915 |
|
17-May-2010 |
Zhongxing Xu <xuzhongxing@gmail.com> |
Remove unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| af1d8ca44a18f304f207e209b3bdb94b590f86ff |
|
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 5c982949bf87ffda129fb7fe372e414e255f4630 |
|
13-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete an unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101143 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| b742b258971d64512e43e2181ee09388b6a38741 |
|
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
trim some prototypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| bfdf7f38523bd38ae0538861a2bfd8bdc46e5c33 |
|
10-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Progress towards shepherding debug info through SelectionDAG.
No functional effect yet. This is still evolving and should
not be viewed as final.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 557bbe6b5d13faaec38f85a266db457c7cb09ff2 |
|
20-Nov-2009 |
David Goodwin <david_goodwin@apple.com> |
Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 4de099d8ca651e00fa5fac22bace4f4dba2d0292 |
|
03-Nov-2009 |
David Goodwin <david_goodwin@apple.com> |
Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| d10e68c2cb61f2c9569ca80e1c54b2e40ee066d2 |
|
14-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Delete bogus semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84132 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 41b5adf20208f46e4b1104d6d473710fbfa61eb9 |
|
14-Oct-2009 |
Eric Christopher <echristo@apple.com> |
Remove a bunch of unused arguments from functions, silencing a
warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 465193a0a87bf2f304c84b0511444f7bef138752 |
|
12-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Delete some obsolete declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83856 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 98976e4dcd18adbbe676048c0069e67346eb4ade |
|
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
The ScheduleDAG framework now requires an AliasAnalysis argument, though
it isn't needed in the ScheduleDAGSDNodes schedulers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83691 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| c277ab08a24d2dbe9b4ff1a9154ea6115ed6a4e3 |
|
30-Sep-2009 |
Reid Kleckner <reid@kleckner.net> |
Fix integer overflow in instruction scheduling. This can happen if we have
basic blocks that are so long that their size overflows a short.
Also assert that overflow does not happen in the future, as requested by Evan.
This fixes PR4401.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| c76909abfec876c6b751d693ebd3df07df686aa0 |
|
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
This eliminates MachineInstr's std::list member and allows the data to be
created by isel and live for the remainder of codegen, avoiding a lot of
copying and unnecessary translation. This also shrinks MemSDNode.
- Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
fields for MachineMemOperands.
- Change MemSDNode to have a MachineMemOperand member instead of its own
fields with the same information. This introduces some redundancy, but
it's more consistent with what MachineInstr will eventually want.
- Ignore alignment when searching for redundant loads for CSE, but remember
the greatest alignment.
Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| fb2e752e4175920d0531f2afc93a23d0cdf4db14 |
|
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 7362ce08cb2c1f0b544b18dbc21630fb4baebcfc |
|
28-Aug-2009 |
Gabor Greif <ggreif@gmail.com> |
eliminate all 80-col violations that I have introduced in my recent checkins (and some others more)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| f0891be8bdbeeadb39da5575273b6645755fa383 |
|
27-Aug-2009 |
Gabor Greif <ggreif@gmail.com> |
Clean up the minor mess I caused with removing iterator.h. I shall take care of 80-col violations and the FIXME later. (Thanks goodness that I live in another continent, so the monkeypox did not strike me :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80224 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| dc4bdcdef1c8dd1a28b82deb08df039e5c0ffc5a |
|
19-Aug-2009 |
David Goodwin <david_goodwin@apple.com> |
Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79425 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 710461688bba935f0ad5c75da7fec2ad0f225c00 |
|
13-Aug-2009 |
David Goodwin <david_goodwin@apple.com> |
Add callback to allow target to adjust latency of schedule dependency edge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78910 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 3974667c1a6d48686e92f85bc4463bb239af7442 |
|
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Add a new bit to SUnit to record whether a node has implicit physreg
defs, regardless of whether they are actually used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67528 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 48fe63526e35ddaee7e98879596a569911f41319 |
|
20-Mar-2009 |
Sebastian Redl <sebastian.redl@getdesigned.at> |
Fix the Win32 VS2008 build:
- Make type declarations match the struct/class keyword of the definition.
- Move AddSignalHandler into the namespace where it belongs.
- Correctly call functions from template base.
- Some other small changes.
With this patch, LLVM and Clang should build properly and with far less noise under VS2008.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67347 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| aff9c270de8de7d1a0bc138d391bc67136bad58e |
|
14-Feb-2009 |
Cedric Venet <cedric.venet@laposte.net> |
Unbreak the build on win32.
Cleanup some warning.
Remark: when struct/class are declared differently than they are defined, this make problem for VC++ since it seems to mangle class differently that struct. These error are very hard to understand and find. So please, try to keep your definition/declaration in sync.
Only tested with VS2008. hope it does not break anything. feel free to revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 47ac0f0c7c39289f5970688154e385be22b7f293 |
|
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
When scheduling a block in parts, keep track of the overall
instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.
Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64288 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9e64bbb322417c09f27afdf08e3946287c9df5aa |
|
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Factor out more code for computing register live-range informationfor
scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.
In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 1fdbc1dd4e9cb42c79a30e8dc308c322e923cc52 |
|
07-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 3948d8102a1a070944d57aa6ea4c124a8d63e1f5 |
|
06-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Tidy up the ScheduleDAG class definition a little. Make a few
more member functions protected, and group all the protected
members together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63932 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| f7119393a97c2a10757084b6bc186380f8c19a73 |
|
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Instead of adding dependence edges between terminator instructions
and every other instruction in their blocks to keep the terminator
instructions at the end, teach the post-RA scheduler how to operate
on ranges of instructions, and exclude terminators from the range
of instructions that get scheduled.
Also, exclude mid-block labels, such as EH_LABEL instructions, and
schedule code before them separately from code after them. This
fixes problems with the post-RA scheduler moving code past
EH_LABELs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e57187cbe321a286f6a7f409a7badd1ae4e4642c |
|
16-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62356 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 79ce276083ced01256a0eb7d80731e4948ca6e87 |
|
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| c29a56dedbe4297dad94b9bf2e19035c5903fd1f |
|
12-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| c9a5b9e38b442c2ae6b115213a07df3fcd14708d |
|
23-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Rename BuildSchedUnits to BuildSchedGraph, and refactor the
code in ScheduleDAGSDNodes' BuildSchedGraph into separate functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| fb8a1356b2aa2869b2a8ad13fe87bc43c349dd31 |
|
22-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Add an accesor for the isNormalMemory field in the SDep class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 89bf4f2f5e6f54fe6382f07c515e36adc9e0c9c2 |
|
17-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Fix the comments for getDepth and getHeight.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 8749b61178228ba1fb2668034d79da1b247173d7 |
|
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Add initial support for back-scheduling address computations,
especially in the case of addresses computed from loop induction
variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 3f23744df4809eba94284e601e81489212c974d4 |
|
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Fix some register-alias-related bugs in the post-RA scheduler liveness
computation code. Also, avoid adding output-depenency edges when both
defs are dead, which frequently happens with EFLAGS defs.
Compute Depth and Height lazily, and always in terms of edge latency
values. For the schedulers that don't care about latency, edge latencies
are set to 1.
Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array.
These are all subsumed by the Depth and Height fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61073 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| c6b680eee58d27f4d38684c95e8fbfef61eb6558 |
|
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Move addPred and removePred out-of-line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| ffa391272bad598d73fd5404dadf3686b69f2a63 |
|
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Make addPred and removePred return void, since the return value is not
currently used by anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61066 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| c3df7a8884971e72a5f0f25c951da0007b4ea503 |
|
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Add a getSDep() access function to SUnitIterator to return the
current SDep.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61064 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e7c1c660ad420aa49f888ce955c4d17660616505 |
|
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Reorder some SDep methods. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 537add349254f5c5f8167c91e13979da16c8ae74 |
|
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
SDep's operator== should compare the Latency field too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61062 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 54e4c36a7349e94a84773afb56eccd4ca65b49e9 |
|
09-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Rewrite the SDep class, and simplify some of the related code.
The Cost field is removed. It was only being used in a very limited way,
to indicate when the scheduler should attempt to protect a live register,
and it isn't really needed to do that. If we ever want the scheduler to
start inserting copies in non-prohibitive situations, we'll have to
rethink some things anyway.
A Latency field is added. Instead of giving each node a single
fixed latency, each edge can have its own latency. This will eventually
be used to model various micro-architecture properties more accurately.
The PointerIntPair class and an internal union are now used, which
reduce the overall size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60806 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 21d9003087c9a707e6cd95460136b499df358fb8 |
|
25-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Initial support for anti-dependence breaking. Currently this code does not
introduce any new spilling; it just uses unused registers.
Refactor the SUnit topological sort code out of the RRList scheduler and
make use of it to help with the post-pass scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59999 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| d59b083d22a01d9c48c9ea16757186ebf7c7049a |
|
24-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Fix an unused-parameter warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59977 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 942b8c853375ae6a3e84f4b0a70f6d4e194ea594 |
|
24-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Check in the rest of this change. The isAntiDep flag needs to be passed
to removePred because an SUnit can both data-depend and anti-depend
on the same SUnit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| cddd428459a66830b0d072823f94224ace58e625 |
|
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add a flag to SDep for tracking which edges are anti-dependence edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59785 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 98adea11496400c8385b774b4d9f9acd4c99d254 |
|
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDep's isSpecial to isArtificial, to make this field a little
less mysterious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a1e6d363e5efa9eb1a2e7ac21a0394c870bef5ad |
|
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for verifying the work of the scheduler,
extend it a bit, and make use of it in all schedulers, to
ensure consistent checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59689 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 343f0c046702831a4a6aec951b6a297a23241a55 |
|
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.
This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.
The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 7d1cd3f21d68179f4ebf4ee18fb7a0ddca9c5a37 |
|
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move the code for printing a graph node label for an SUnit into
a virtual method of SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 252ae9e8ae4efaf1f67a608ad2563323308bd803 |
|
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Convert SUnit's dump method into a print method and implement
dump in terms of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 3cc6243ddfdba3ad64035b919c88b09773a60880 |
|
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change SUnit's dump method to take a ScheduleDAG* instead of
a SelectionDAG*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e45b6f10e2a0848052fca461568833ed0fa68d40 |
|
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
There is no InstrStage class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59480 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 7e6a1bc0fa35202ddfd2229821370d6061e3e1f9 |
|
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add support for building a ScheduleDAG from MachineInstrs. This is currently
fairly conservative; it doesn't do alias-analysis queries and it doesn't
attempt to break anti-dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 59d5f1d13babee143957686003db06f605d05ba2 |
|
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add a version of NewSUnit for creating units with MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59282 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| f449bf36ef5cb8e23fa2b5bc43f8d54d2b48fa4e |
|
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Initial support for carrying MachineInstrs in SUnits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59278 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| ae78a88e12fa3d5f0cdb723cf009dfd71eb35a70 |
|
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Clarify the comment about NumPreds and NumSuccs to reflect that they only
count non-control preds and succs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| d23e0f81bc76902052e9198cad3a0d87a412a632 |
|
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.
The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 550f5afb68ce8f034991863cac65bef22a6554da |
|
13-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Make the Node member of SUnit private, and add accessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a23b3b803e3c65e84d6cadaa221de8b256cbe28d |
|
13-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change ScheduleDAG's DAG member from a reference to a pointer, to prepare
for the possibility of scheduling without a SelectionDAG being present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9b75b373756288cd39489da7994207f50b31ee40 |
|
11-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change the scheduler accessor methods to accept an explicit TargetMachine
argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59055 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 86b49f8e2de796cb46c7c8b6a4c4900533fd53f4 |
|
24-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot. Remove
overlap-earlyclobber throughout. Remove
earlyclobber bits and their handling from
live internals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| ee2e4035450a2d0d6159831e9b9cfa3ffd8da8bc |
|
18-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add a new "fast" scheduler. This is currently basically just a
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.
This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 91aac1015e6714d959801dd8d60f55a72827dc4d |
|
17-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere. Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber. See also comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 056292fd738924f3f7703725d8f630983794b5a5 |
|
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r56249. On further investigation, this functionality isn't needed.
Apologies for the thrashing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9468a9b6beed640eca64274c8dcc5aed3b94450b |
|
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 475871a144eb604ddaf37503397ba0941442e5fb |
|
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 5e84368b26415b3bb7f3f8d9cff3e05938dd82d0 |
|
14-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Reapply 53476 and 53480, with a fix so that it properly updates
the BB member to the current basic block after emitting
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 4576f6d7a9c0f2c6a3b6c5d4d8a3063bbf763ae5 |
|
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Do not use computationally expensive scheduling heuristics with -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52971 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a0b50d7f0dd965b4269cce198cab395e2c2be900 |
|
24-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Comment fixes, and make Schedule() pure virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52658 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 94d7a5f8156e62532870fbaf197377b34e52ff2a |
|
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Remove ScheduleDAG's SUnitMap altogether. Instead, use SDNode's NodeId
field, which is otherwise unused after instruction selection, as an index
into the SUnit array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 3627e34486db088661bc7fb6c0dde6a18a543217 |
|
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Add a priority queue class, which is a wrapper around std::priority_queue
and provides fairly efficient removal of arbitrary elements. Switch
ScheduleDAGRRList from std::set to this new priority queue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52582 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 4c8c83022b501759d8559e224c84ae2a9921ba41 |
|
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Change ScheduleDAG's SUnitMap from DenseMap<SDNode*, vector<SUnit*> >
to DenseMap<SDNode*, SUnit*>, and adjust the way cloned SUnit nodes are
handled so that only the original node needs to be in the map.
This speeds up llc on 447.dealII.llvm.bc by about 2%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52576 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 13d57320bd212483463d4f8992d5787b29eda5df |
|
19-May-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove warnings about unused parameters and shadowed variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 34cd4a484e532cc463fd5a4bf59b88d13c5467c1 |
|
05-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix more -Wshorten-64-to-32 warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a0201d52049be8dcefffe4304a49690a831bcb34 |
|
29-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Use std::set instead of std::priority_queue for the RegReductionPriorityQueue.
This removes the existing bottleneck related to the removal of elements from
the middle of the queue.
Also fixes a subtle bug in ScheduleDAGRRList::CapturePred:
It was updating the state of the SUnit before removing it. As a result, the
comparison operators were working incorrectly and this SUnit could not be removed
from the queue properly.
Reviewed by Evan and Dan. Approved by Dan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50412 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9cac5259fe237120a0c347d6d14e549005148f1b |
|
16-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Ongoing work on improving the instruction selection infrastructure:
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.
Patch is approved by Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49795 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 80792f3ddec43aff7f0758c9096f8cb53dcc1e40 |
|
15-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Treat EntryToken nodes as "passive" so that they aren't added to the
ScheduleDAG; they don't correspond to any actual instructions so they
don't need to be scheduled.
This fixes a bug where the EntryToken was being scheduled multiple
times in some cases, though it ended up not causing any trouble because
EntryToken doesn't expand into anything. With this fixed the schedulers
reliably schedule the expected number of units, so we can check this
with an assertion.
This requires a tweak to test/CodeGen/X86/loop-hoist.ll because it
ends up getting scheduled differently in a trivial way, though it was
enough to fool the prcontext+grep that the test does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49701 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 89bf0a6b05c8c353890c88ed1c10dec96a9a7bd8 |
|
15-Apr-2008 |
Dan Gohman <gohman@apple.com> |
In -view-sunit-dags, display "special" chain dependencies as cyan
instead of blue to distinguish them from regular dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49696 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| b1e07ec6a43383ce0baa42e2f139550cc540f631 |
|
11-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49502 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 36b5c1338a03453ba1c110b120269ca972fb65a3 |
|
07-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| dc1adac582fa120861f18ae7221bfe1421fea59f |
|
07-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49330 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 8a50f1fcf0147d4ba959dc48066ddf281d5bc7e6 |
|
03-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Start of a series of patches related to implicit_def.
There is no point in creating a long live range defined by an implicit_def. Scheduler now duplicates implicit_def instruction for each of its uses. Therefore, if an implicit_def node has multiple uses, it will become a number of very short live ranges, rather than a long one. This will make coalescer's job easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 6397c64441ddce3822ab0e712f224a11bd75811c |
|
03-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Backing out 48222 temporarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e326332acd5fefb9854118603b4d07d4e44b64c5 |
|
26-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.
The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.
On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48822 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 1090fc99cd63b78f5d672cf0914287656f746f98 |
|
14-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Forgot this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48349 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9e23336d0c99fc5cae04037ead6d8f2b677e8764 |
|
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1028<def> = MOV32rr %EAX
%reg1029<def> = MOV32rr %EDX
%reg1030<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
%reg1025<def> = MOV32rr %reg1029
%reg1026<def> = MOV32rr %reg1030
%reg1024<def> = MOV32rr %reg1028
The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.
With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1024<def> = MOV32rr %EAX
%reg1025<def> = MOV32rr %EDX
%reg1026<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]
Much better!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 42a77880a83b76112a1f42ce16b46dbde01cd0a8 |
|
16-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Rename CountMemOperands to ComputeMemOperandsEnd to reflect what
it actually does. Simplify CountOperands a little by reusing
ComputeMemOperandsEnd. And reword some comments for both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47198 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e179584f9b740cf3a36bde70f8cab40de59b8081 |
|
14-Feb-2008 |
Nate Begeman <natebegeman@mac.com> |
Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 6f0d024a534af18d9e60b3ea757376cd8a3a980e |
|
10-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Rename MRegisterInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 69de1932b350d7cdfc0ed1f4198d6f78c7822a02 |
|
06-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 334dc1f58d617dcff969a2e107febaae42bbc883 |
|
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| c6c391daddbafa722d9ca87d18f204e9a6e617a3 |
|
31-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 6b2cf285bd43fdc98ca68df477570ef6938d4fb2 |
|
30-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
A semi-gross fix for a debug info issue. When inserting the "function start" label (i.e. first label in the entry block) take care to insert it at the beginning of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 749c6f6b5ed301c84aac562e414486549d7b98eb |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 84bc5427d6883f73cfeae3da640acd011d35c006 |
|
31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 7ed47a13356daed2a34cd2209a31f92552e3bdd8 |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Don't attribute in file headers anymore. See llvmdev for the
discussion of this change. Boy are my fingers tired. ;-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| f10c973797cf79da802f9b0118543cbd50954c9c |
|
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
If a node that defines a physical register that is expensive to copy. The
scheduler will try a number of tricks in order to avoid generating the
copies. This may not be possible in case the node produces a chain value
that prevent movement. Try unfolding the load from the node before to allow
it to be moved / cloned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 450ff01faf47b48d9f0aea68b7676a20644fd0fc |
|
01-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove simple scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42499 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 22a529990bb4bb86bdb2ae1cfce7340320a6ca7f |
|
29-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
If two instructions are both two-address code, favors (schedule closer to
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42453 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 74d2fd8dd847e0ebccef30e2c5907ff09495d518 |
|
28-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Trim some unneeded fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 8ed3ffee53105275ca03f06ba0195bc6008477fa |
|
26-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Oops. Forgot this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42377 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| a6fb1b6743ee1411accf2d6e636f73f2ee0a7f5b |
|
25-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 713a98dee8ab07a3066d1707a07648d27dd0c19c |
|
19-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Use struct SDep instead of std::pair for SUnit pred and succ lists. First step
in tracking physical register output dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 3e1a7aef17575d9c7058a035449d57e3c7295ed0 |
|
28-Aug-2007 |
Dan Gohman <gohman@apple.com> |
Add an option, -view-sunit-dags, for viewing the actual SUnit DAGs used by
scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41556 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 8409747efadda025aa3cce626b1a2c33429fd5e5 |
|
02-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Instead of adding copyfromreg's to handle physical definitions. Now isel can
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)
Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)
And let scheduledag emit the move from X86::EAX to a virtual register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e24f8f1ec9277dc80ebf38f0d914053f8c31caf1 |
|
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40520 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| af825c840ebc4ca5248c62325b2371091c9fb4b4 |
|
10-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
When a node value is only used by a CopyToReg, use the user's dest. This should not be restricted to nodes that produce only a single value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38485 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 831e0374a7da654071279f2b1f93f52f7eeb5eae |
|
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This
speeds up the isel pass from 2.5570s to 2.4722s on kc++ (3.4%).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 2ba528b3a75955c960347e5b5b28ae74d5a81909 |
|
03-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
switch the sched unit map over to use a DenseMap instead of std::map. This
speeds up isel as a whole time by 2.6%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33810 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 94c002a190cd2e3a52b1510bc997e53d63af0b3b |
|
01-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
rename DenseMap to IndexedMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33749 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 44c3b9fdd416c79f4b67cde1aecfced5921efd81 |
|
26-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
for debugging and exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33550 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| fe0b81759d207072ae468f5154f6a513c3a1be72 |
|
04-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Move to operand constraints for two-address instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31452 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 228a18e0f220fb85ee06fd5bfa29304e57047ff1 |
|
17-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
switch the SUnit pred/succ sets from being std::sets to being smallvectors.
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%). More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29743 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9522ee3d93cb15ebcfd80200fea42378cc510d21 |
|
17-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Convert vector to smallvector: 4% speedup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9373beba6010dd34316a801c3a9b37ab9e048031 |
|
01-Aug-2006 |
Jim Laskey <jlaskey@mac.com> |
Now that the ISel is available, it's possible to create a default instruction
scheduler creator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29452 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 9ff542f2cce5bf7bf3cf9f692cf3ec0690ad2b3b |
|
01-Aug-2006 |
Jim Laskey <jlaskey@mac.com> |
1. Change use of "Cache" to "Default".
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.
More to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 13ec702c430b91ee49b9e6d9581cd95412f216c8 |
|
01-Aug-2006 |
Jim Laskey <jlaskey@mac.com> |
Introducing plugable register allocators and instruction schedulers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| d74ea2bbd8bb630331f35ead42d385249bd42af8 |
|
24-May-2006 |
Chris Lattner <sabre@nondot.org> |
Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| ee00a1d12c631eb7360ddd4809bdde72331b2736 |
|
13-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Revert an un-intended change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28278 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 13d41b9d721f98372b97d2ec119e6c91932ab0ae |
|
12-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add capability to scheduler to commute nodes for profit.
If a two-address code whose first operand has uses below, it should be commuted
when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| e165a78551a91d8420cd8f074d97701e8788f8b5 |
|
12-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Refactor scheduler code. Move register-reduction list scheduler to a
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|
| 37efe6764568a3829fee26aba532283131d1a104 |
|
22-Apr-2006 |
Nate Begeman <natebegeman@mac.com> |
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| a34b6f8713cd065306b07aafb1c978c30bc64947 |
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10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Move simple-selector-specific types to the simple selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26693 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 37cb415eec53e20ed77c1c90f86310de217f3e6c |
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10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Simplify the interface to the schedulers, to not pass the selected heuristic
in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26691 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 2f5806c2b37a4e59cb12a6d49f0e3423c2082a64 |
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10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Move some simple-sched-specific instance vars to the simple scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26690 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| e76074ab89136d9ffd4520949f580c6114402512 |
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10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
move some simple scheduler methods into the simple scheduler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 8c7ef0599c3d5b0beea9c16ac1e4ac6755d34de2 |
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10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Make EmitNode take a SDNode instead of a NodeInfo*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 7593639df672018d90331774f45b5ef06da2f385 |
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10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Store VRBase in a map, not in NodeInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26685 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| de76851d421607273f235b05a9b3941a5a20624a |
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10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
make some methods protected instead of private
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26681 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| b0d21ef20c29f4ea46d21b488f17feaa6a8760e1 |
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08-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Change the interface for getting a target HazardRecognizer to be more clean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26608 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 37e30cf736f9975704f4994d4181fe65ebb7b76c |
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06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Hoist the HazardRecognizer out of the ScheduleDAGList.cpp file to where
targets can implement them. Make the top-down scheduler non-g5-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 202bc85a9508de5b5f24cfbac060e17ea2f5f8dc |
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06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add an emitnoop method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26563 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| c0fe53383e920ee7b95056db7ae2ec324746257e |
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05-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Breathe some life into a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26553 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 20614b956257d8702736ede13762385972cf4e43 |
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05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add a new scheduling type. This is, of course, a hack. Proper factoring
will come later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26551 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 3c2da661b6886dc430cffe1e0358bc08995b0125 |
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24-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 410354fe0c052141dadeca939395743f8dd58e38 |
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22-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Make the LLVM headers "-ansi -pedantic -Wno-long-long" clean.
Patch by Martin Partel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26313 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| cccf1232a69e2d78516c61a97e7bfa26acefb714 |
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04-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Get rid of some memory leaks identified by Valgrind
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 44b974c11182b159c3101340360b1562f7a3974c |
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26-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Duh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25628 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 46c01cfe9f1c6900ea63df9c79094d0826fd9ecc |
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25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
No need to keep track of top and bottom nodes in a group since the vector is
already in order. Thanks Jim for pointing it out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25608 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 0993f1d8338ccf8552a1dbc3fb19461a5e6165d9 |
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25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Some minor scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| f0f9c90204c650b9f3c3feb02ccfcb1e40c6acdd |
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23-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Skeleton of the list schedule.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| 4ef10867499aa146cd819c78d8d37a8353d4f0ff |
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23-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Factor out more instruction scheduler code to the base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25532 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| ca5ca41a635d361604a74ea8f6dd447093a0b681 |
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22-Jan-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Visual Studio neurotic about inconsistent class/struct usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25506 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
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| a9c2091cd38e401c846391c9951ff416e709b65e |
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21-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Do some code refactoring on Jim's scheduler in preparation of the new list
scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25493 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/ScheduleDAG.h
|