36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/CodeGen/AllocationOrder.h
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6d6132986d2ef14bbf9d76f5acbf2a0bace32d69 |
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12-Jan-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Limit the search space in RAGreedy::tryEvict(). When tryEvict() is looking for a cheaper register in the allocation order, skip the tail of too expensive registers when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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f7999fe1cb2c2bdb0a4080efabb4743719ce45ca |
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04-Dec-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Speed up the AllocationOrder class a bit. Allow the central functions to be inlined, and use the argumentless isHint() function when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169319 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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a1514e24cc24b050f53a12650e047799358833a1 |
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04-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Sort includes for all of the .h files under the 'lib' tree. These were missed in the first pass because the script didn't yet handle include guards. Note that the script is now able to handle all of these headers without manual edits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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fc29db1214736d6ed84d60707db28de346af3feb |
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03-Dec-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use the new getRegAllocationHints() hook from AllocationOrder. This simplifies the hinting code quite a bit while making the targets easier to write at the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169173 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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39b5c0c049a19c7a7feffc9506da07923cc136e4 |
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29-Nov-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use MCPhysReg for RegisterClassInfo allocation orders. This saves a bit of memory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168852 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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10c6fdcd111d447de79613495219af8de3a2fb7e |
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24-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix old doxygen comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148825 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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a46a100945c839a9b9baa6da0dcafafcd42d1085 |
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06-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Get allocation orders from RegisterClassInfo when possible. Only target-dependent hints require callbacks. The RCI allocation order has CSR aliases last according to their order of appearance in the getCalleeSavedRegs list. This can depend on the calling convention. This way, AllocationOrder::next doesn't have to check for reserved registers, and CSRs are always allocated last, even with weird calling conventions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132690 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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5f2316a3b55f88dab2190212210770180a32aa95 |
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03-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch AllocationOrder to using RegisterClassInfo instead of a BitVector of reserved registers. Use RegisterClassInfo in RABasic as well. This slightly changes som allocation orders because RegisterClassInfo puts CSR aliases last. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132581 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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57f1e2cee06f9b57995727d786aeb1031c5376bd |
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25-Feb-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Try harder to get the hint by preferring to evict hint interference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126463 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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c9672cb8bea13fcbcbdb1cf26708d831c034c089 |
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10-Dec-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an AllocationOrder class that can iterate over the allocatable physical registers for a given virtual register. Reserved registers are filtered from the allocation order, and any valid hint is returned as the first suggestion. For target dependent hints, a number of arcane target hooks are invoked. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/AllocationOrder.h
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