c7c4a7867cae8fb0ad5c79c3e67d75e415287626 |
|
14-Jul-2013 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use conventional syntax for branches. Patch by Job! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186291 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
294014e1585ef5e0c1bf17a9cf79039ce662b64f |
|
05-Feb-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move MRI liveouts to MSP430 return instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
68c10a2ff74fe882cfd789983b2d0f12e42fb0ec |
|
13-Jul-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove variable_ops from call instructions in most targets. Call instructions are no longer required to be variadic, and variable_ops should only be used for instructions that encode a variable number of arguments, like the ARM stm/ldm instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160189 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
|
18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
036609bd7d42ed1f57865969e059eb7d1eb6c392 |
|
23-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
Flag -> Glue, the ongoing saga git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
f8cbde46fb9d6e3c31813cf51a6e05930cf95ef8 |
|
24-Jun-2010 |
Chris Lattner <sabre@nondot.org> |
fix breakage from r98938 by correctly marking msp430 calls as variadic. Patch by Ben Ransford! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106722 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
f704408bf7f8bf1a855832d928f2aa2a4b3e0e77 |
|
21-Jun-2010 |
Eric Christopher <echristo@apple.com> |
Remove isTwoAddress from MSP430. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
658ebcc7ec08154e481b4f41fd904681225fbb29 |
|
21-Jun-2010 |
Eric Christopher <echristo@apple.com> |
Make 80-column. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106448 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
1b17614a7283f903363f7c4305da6ea742d3d28b |
|
01-May-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Do folding for indirect branches, where possible git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102836 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
69d5b48bc31b7a443355cdf1506005804b4f63e6 |
|
01-May-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement indirect branches on MSP430 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102835 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
650a8e49f9f1984017b8995fc4a13058e553e6ce |
|
01-May-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Long branch target oparands are not pc-rel. This should fix PR6603. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
bc9d98b52d008d857c7423d7b43fb32022b926a2 |
|
28-Feb-2010 |
Dan Gohman <gohman@apple.com> |
The mayHaveSideEffects flag is no longer used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
518bb53485df640d7b7e3f6b0544099020c42aa7 |
|
09-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
move target-independent opcodes out of TargetInstrInfo into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
702adaba6d7442f180c6bc0bec3a2b19e1169ed9 |
|
15-Jan-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add branch relaxation pass (shamelessly stolen from PPC). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
05011a8aba3a4e8f011ac92990423947f8cbb15b |
|
15-Jan-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Provide instruction sizes & encoding. No opcodes yet (but not needed so far). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93553 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
cb50e0bd60167440e2e41274f9d3c3c0e88d90ad |
|
15-Jan-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Enable bit tests and setcc stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93552 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
f7ed979257726fe1566c243a3174da76a18c4f19 |
|
15-Jan-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix cmp emission on msp430: we definitely should turn stuff like "icmp lhs, rhs" into "cmp rhs, lhs". This should fix PR5979. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93496 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
2625de35eda2aec28bdec3370a81f533f9721736 |
|
12-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement variable-width shifts. No testcase yet - it seems we're exposing generic codegen bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91221 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
9aa1ec87b0d04730d06d20c63486fc4a8a06b458 |
|
08-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
e662f7a8b22e7d31fb55e6502af94d49b78bc942 |
|
07-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Initial codegen support for MSP430 ISRs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
ef4e604603cf8301e8d30571304578cd2b19b5c3 |
|
22-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Drop unsupported imm operands git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89573 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
adaace8aa8df16f1fa2b097f32ded38a49d89208 |
|
11-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Set isBarrier = 1 on return instructions, as they are control barriers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86851 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
f0b47b7f6d417692bfda507e4b4a16c12e036ee9 |
|
08-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add and-not (bic) patterns. Based heavily on patch by Brian Lucas! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
830fe7bc2dd35b77ecff6e8ae27e768e531536b6 |
|
08-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move OR patterns upper to all logical stuff. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
ff2c186d59d987d0331bb8c35852e62f336a1b28 |
|
08-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Some nice peephole patterns. Based on patch by Brian Lucas! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86469 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
764cfaabd2cf95385a64cc67440d9d7b3cd79028 |
|
08-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Print tab before operand of jcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
52f28e9b63b862fa3dafd9330eb76d5874c21574 |
|
08-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix invalid operand updates & implement post-inc memory operands git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86466 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
06ac0820a6cefa6896000054d8e4906326c0cce6 |
|
07-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
First try of the post-inc operands handling... Not fully worked, though :( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86386 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
6534f83ae8c39284ae51fbf478ce0c37d0c892a2 |
|
07-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add some dummy support for post-incremented loads git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
533297b58da8c74bec65551e1aface9801fc2259 |
|
29-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a bunch of associated comments, because it doesn't have anything to do with DAGs or scheduling. This is another step in decoupling MachineInstr emitting from scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
8ecaf237e024723ed3e01a500a5e8c42dc050cec |
|
21-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Distinguish between pcrel imm operands and 'normal' ones. Fix fixes gross weirdness of asmprinting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
436604d505760f1ce170d68f7e09d5e5bd82f4e4 |
|
12-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add missed mem-mem move patterns git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83812 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
c4be951ddc193cd4dc550dc6b12436dcbaee4dc9 |
|
11-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement proper asmprinting for the globals. This eliminates bogus "call" modifier and also adds support for offsets wrt globals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
8f8e9f08300f62db802767c9fb23b40aab66e51e |
|
11-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
It seems that OR operation does not affect status reg at all. Remove impdef of SRW. This fixes PR4779 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
1e0039d6cf8ff582101cf2d7f7edf05b3187e77f |
|
05-Aug-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Special constants as destinations does not work as expected - drop the patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78191 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
aceb620de855485a4fb2eed343d880d76f6c701c |
|
17-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Typo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
9c11d21d907309fc19413da671d6b2d0867d0c9f |
|
10-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add imm-reg and imm-mem patters for cmp on msp430 (imm is allowed to be source operand, not dest...) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71393 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
1cb0acee8ae0b802f9689d7145cdbfcb652965f0 |
|
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add 8 bit select git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
87e3caf81939db20d2359bd38df2ed206040026d |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Handle implicit zext in a better way. Shamelessly stolen from x86 backend. Thanks for Dan Gohman for suggestion! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
1bb8cd723d9fc89701fd3e54951c6bb419f798d3 |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Make handling of conditional stuff much more straightforward git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70767 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
1fcfb6b6d2635ca817e6ecc0ba2dac80e530fb81 |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70766 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
bf8ef3f29de28529b5d65970af9015c41f7c809b |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add 8bit shifts git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
e699d0f549151a2cca993c21407aea4a6eff7d3f |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Handle logical shift right (at least I hope so :) ) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
e375a7c768f003b6f89a7e2e5a0e8c97a9a34868 |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Handle anyext git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70757 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
49ebc2278472656e05541248eaedccb13e1b7d7d |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement bswap git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
5d59f68ade7573175f1ace09061a94286e59076b |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Properly handle ExternalSymbol's git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70752 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
b8f03c9578465045ce7905dabb357ed050c5b146 |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Provide addc and subc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
ea54c9846b2973cafa8ffd40626f5676ba9ccfee |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add left shift git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
824d8ddae89c83ea3c5dce9c8636133976648ce3 |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add direct branch git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
0af5af823b5e9391bf2f94e15447c5aa0168c4c8 |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
8b528e52ee6018b0d0e7e46b3b4cf6f41fdaa0d9 |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Lower select with custom inserted and make condjumps generic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70744 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
ed1a51af376b9027db60ff060e0a2572493df07b |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add first draft for conditions, conditional branches, etc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70743 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
d5047cb9f7f207798e1729911daa6d3752b668e3 |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add code for save/restore of callee-saved registers git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
|
40477317f39dccfd5c9c139feabda1becc6bd49c |
|
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Proper handle loading of effective address of stack slot stuff git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70737 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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cf14ae550051002283eabfb4dcbd67fa71f46f67 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Reverse order of memory arguments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70734 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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aecfa7897f5b3854102b27212a4227d378cc7b49 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Remove bogus pattern git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70733 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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3513ca81c6beda087a281a66f1b0e612879c0aad |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add lowering for global address nodes. Not pretty efficient though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70730 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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3c2684d13646a76a0dd9ca6a8da5bd7fc0de6e8a |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Some early full call lowering draft for direct calls git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70729 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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b561264d2b2e33e1e6322a99d600b5daece5bbde |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add call frame setup instruction elimination and lowerid for bunch of call-related stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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4428885c5acfffbbdd03ad2aab23960531c47753 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add CALL lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70727 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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01e0e8d119ecc0341e1a2db0fad80028b28846f7 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add bunch of mem-whatever patterns git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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2682bf5979081c4661863485846127eccb76c0fd |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add bunch of reg-mem inst patterns git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70725 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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54f30d3fc94e055f13e6744378323d05c5c050ba |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add normal and trunc stores git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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36b6e533c1aac85452438161f7034a9f54bd1830 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Basic support for mem=>reg moves git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70723 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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51c31d6888a6c2a7cea74e210a1e1c8551535f28 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add 8-bit insts. zext behaviour is not modelled yet git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70722 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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cf9adf2cbb8298e83b53d7bee2ddab4c875cb3c5 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add 8-bit regclass and pattern for sext_inreg git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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0fc32dae8f380f57087bf48e4248f1ad3326a1b0 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add pattern for OR git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70720 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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6ee626a1c16dfac052c1506b7a24051b6bc96beb |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add reg-imm variants git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70719 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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c8166ac76097ff245a484008137237ac88a05e71 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add hint to nop git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70718 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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0ba0a89c6b6c1a91e7ab3ea617a8ab1738915ffe |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add more instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70717 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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d2c94ae49e546e68b591e838cdfc2fd016d928d9 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add dummy lowering for shifts git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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8d7bb3998b7c000780f43d11ed9c443e432fbe04 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
We're not going to spend 100% of time in interrupts, do we? :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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431beb5fa71e3511e685713f004c451302ea3eab |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add simple reg-reg add. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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1df221f2bb8e8380e255d1bec73ab07b388d01a2 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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fd1b7c778c0c332a676b1003115d2b4bc6f9a46a |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add proper ISD::RET lowering git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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f2c3e179ecc2a6ebc259382828a5e5dc5a61d2f8 |
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03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Dummy MSP430 backend git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70694 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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