History log of /external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
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c7c4a7867cae8fb0ad5c79c3e67d75e415287626 14-Jul-2013 Anton Korobeynikov <asl@math.spbu.ru> Use conventional syntax for branches.
Patch by Job!


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/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
294014e1585ef5e0c1bf17a9cf79039ce662b64f 05-Feb-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Move MRI liveouts to MSP430 return instructions.

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68c10a2ff74fe882cfd789983b2d0f12e42fb0ec 13-Jul-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove variable_ops from call instructions in most targets.

Call instructions are no longer required to be variadic, and
variable_ops should only be used for instructions that encode a variable
number of arguments, like the ARM stm/ldm instructions.

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31d157ae1ac2cd9c787dc3c1d28e64c682803844 18-Feb-2012 Jia Liu <proljc@gmail.com> Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

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036609bd7d42ed1f57865969e059eb7d1eb6c392 23-Dec-2010 Chris Lattner <sabre@nondot.org> Flag -> Glue, the ongoing saga


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f8cbde46fb9d6e3c31813cf51a6e05930cf95ef8 24-Jun-2010 Chris Lattner <sabre@nondot.org> fix breakage from r98938 by correctly marking msp430 calls as variadic.

Patch by Ben Ransford!


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f704408bf7f8bf1a855832d928f2aa2a4b3e0e77 21-Jun-2010 Eric Christopher <echristo@apple.com> Remove isTwoAddress from MSP430.


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658ebcc7ec08154e481b4f41fd904681225fbb29 21-Jun-2010 Eric Christopher <echristo@apple.com> Make 80-column.


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1b17614a7283f903363f7c4305da6ea742d3d28b 01-May-2010 Anton Korobeynikov <asl@math.spbu.ru> Do folding for indirect branches, where possible

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69d5b48bc31b7a443355cdf1506005804b4f63e6 01-May-2010 Anton Korobeynikov <asl@math.spbu.ru> Implement indirect branches on MSP430

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650a8e49f9f1984017b8995fc4a13058e553e6ce 01-May-2010 Anton Korobeynikov <asl@math.spbu.ru> Long branch target oparands are not pc-rel.
This should fix PR6603.

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bc9d98b52d008d857c7423d7b43fb32022b926a2 28-Feb-2010 Dan Gohman <gohman@apple.com> The mayHaveSideEffects flag is no longer used.


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518bb53485df640d7b7e3f6b0544099020c42aa7 09-Feb-2010 Chris Lattner <sabre@nondot.org> move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.


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702adaba6d7442f180c6bc0bec3a2b19e1169ed9 15-Jan-2010 Anton Korobeynikov <asl@math.spbu.ru> Add branch relaxation pass (shamelessly stolen from PPC).

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05011a8aba3a4e8f011ac92990423947f8cbb15b 15-Jan-2010 Anton Korobeynikov <asl@math.spbu.ru> Provide instruction sizes & encoding. No opcodes yet (but not needed so far).

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cb50e0bd60167440e2e41274f9d3c3c0e88d90ad 15-Jan-2010 Anton Korobeynikov <asl@math.spbu.ru> Enable bit tests and setcc stuff.

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f7ed979257726fe1566c243a3174da76a18c4f19 15-Jan-2010 Anton Korobeynikov <asl@math.spbu.ru> Fix cmp emission on msp430: we definitely should turn stuff like
"icmp lhs, rhs" into "cmp rhs, lhs". This should fix PR5979.

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2625de35eda2aec28bdec3370a81f533f9721736 12-Dec-2009 Anton Korobeynikov <asl@math.spbu.ru> Implement variable-width shifts.
No testcase yet - it seems we're exposing generic codegen bugs.

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9aa1ec87b0d04730d06d20c63486fc4a8a06b458 08-Dec-2009 Anton Korobeynikov <asl@math.spbu.ru> Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!

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e662f7a8b22e7d31fb55e6502af94d49b78bc942 07-Dec-2009 Anton Korobeynikov <asl@math.spbu.ru> Initial codegen support for MSP430 ISRs

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ef4e604603cf8301e8d30571304578cd2b19b5c3 22-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Drop unsupported imm operands

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adaace8aa8df16f1fa2b097f32ded38a49d89208 11-Nov-2009 Dan Gohman <gohman@apple.com> Set isBarrier = 1 on return instructions, as they are control barriers.


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f0b47b7f6d417692bfda507e4b4a16c12e036ee9 08-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!

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830fe7bc2dd35b77ecff6e8ae27e768e531536b6 08-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Move OR patterns upper to all logical stuff. No functionality change.

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ff2c186d59d987d0331bb8c35852e62f336a1b28 08-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Some nice peephole patterns. Based on patch by Brian Lucas!

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764cfaabd2cf95385a64cc67440d9d7b3cd79028 08-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Print tab before operand of jcc

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52f28e9b63b862fa3dafd9330eb76d5874c21574 08-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Fix invalid operand updates & implement post-inc memory operands

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06ac0820a6cefa6896000054d8e4906326c0cce6 07-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> First try of the post-inc operands handling... Not fully worked, though :(

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6534f83ae8c39284ae51fbf478ce0c37d0c892a2 07-Nov-2009 Anton Korobeynikov <asl@math.spbu.ru> Add some dummy support for post-incremented loads

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533297b58da8c74bec65551e1aface9801fc2259 29-Oct-2009 Dan Gohman <gohman@apple.com> Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.


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8ecaf237e024723ed3e01a500a5e8c42dc050cec 21-Oct-2009 Anton Korobeynikov <asl@math.spbu.ru> Distinguish between pcrel imm operands and 'normal' ones. Fix fixes gross weirdness of asmprinting.

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436604d505760f1ce170d68f7e09d5e5bd82f4e4 12-Oct-2009 Anton Korobeynikov <asl@math.spbu.ru> Add missed mem-mem move patterns

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/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
c4be951ddc193cd4dc550dc6b12436dcbaee4dc9 11-Oct-2009 Anton Korobeynikov <asl@math.spbu.ru> Implement proper asmprinting for the globals. This eliminates bogus "call" modifier and also adds support for offsets wrt globals.

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8f8e9f08300f62db802767c9fb23b40aab66e51e 11-Oct-2009 Anton Korobeynikov <asl@math.spbu.ru> It seems that OR operation does not affect status reg at all.
Remove impdef of SRW. This fixes PR4779


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1e0039d6cf8ff582101cf2d7f7edf05b3187e77f 05-Aug-2009 Anton Korobeynikov <asl@math.spbu.ru> Special constants as destinations does not work as expected - drop the patterns.

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aceb620de855485a4fb2eed343d880d76f6c701c 17-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Typo

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9c11d21d907309fc19413da671d6b2d0867d0c9f 10-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add imm-reg and imm-mem patters for cmp on msp430
(imm is allowed to be source operand, not dest...)

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1cb0acee8ae0b802f9689d7145cdbfcb652965f0 08-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add 8 bit select

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87e3caf81939db20d2359bd38df2ed206040026d 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Handle implicit zext in a better way. Shamelessly stolen from x86 backend.
Thanks for Dan Gohman for suggestion!

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1bb8cd723d9fc89701fd3e54951c6bb419f798d3 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Make handling of conditional stuff much more straightforward

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1fcfb6b6d2635ca817e6ecc0ba2dac80e530fb81 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought

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bf8ef3f29de28529b5d65970af9015c41f7c809b 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add 8bit shifts

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e699d0f549151a2cca993c21407aea4a6eff7d3f 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Handle logical shift right (at least I hope so :) )

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e375a7c768f003b6f89a7e2e5a0e8c97a9a34868 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Handle anyext

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49ebc2278472656e05541248eaedccb13e1b7d7d 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Implement bswap

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5d59f68ade7573175f1ace09061a94286e59076b 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Properly handle ExternalSymbol's

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b8f03c9578465045ce7905dabb357ed050c5b146 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Provide addc and subc

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ea54c9846b2973cafa8ffd40626f5676ba9ccfee 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add left shift

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824d8ddae89c83ea3c5dce9c8636133976648ce3 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add direct branch

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0af5af823b5e9391bf2f94e15447c5aa0168c4c8 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed.

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8b528e52ee6018b0d0e7e46b3b4cf6f41fdaa0d9 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Lower select with custom inserted and make condjumps generic

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ed1a51af376b9027db60ff060e0a2572493df07b 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add first draft for conditions, conditional branches, etc

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d5047cb9f7f207798e1729911daa6d3752b668e3 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add code for save/restore of callee-saved registers

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40477317f39dccfd5c9c139feabda1becc6bd49c 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Proper handle loading of effective address of stack slot stuff

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cf14ae550051002283eabfb4dcbd67fa71f46f67 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Reverse order of memory arguments

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aecfa7897f5b3854102b27212a4227d378cc7b49 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Remove bogus pattern

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3513ca81c6beda087a281a66f1b0e612879c0aad 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add lowering for global address nodes. Not pretty efficient though.

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3c2684d13646a76a0dd9ca6a8da5bd7fc0de6e8a 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Some early full call lowering draft for direct calls

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/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
b561264d2b2e33e1e6322a99d600b5daece5bbde 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add call frame setup instruction elimination and lowerid for bunch of call-related stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
4428885c5acfffbbdd03ad2aab23960531c47753 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add CALL lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70727 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
01e0e8d119ecc0341e1a2db0fad80028b28846f7 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add bunch of mem-whatever patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
2682bf5979081c4661863485846127eccb76c0fd 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add bunch of reg-mem inst patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70725 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
54f30d3fc94e055f13e6744378323d05c5c050ba 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add normal and trunc stores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
36b6e533c1aac85452438161f7034a9f54bd1830 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Basic support for mem=>reg moves

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70723 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
51c31d6888a6c2a7cea74e210a1e1c8551535f28 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add 8-bit insts. zext behaviour is not modelled yet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70722 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
cf9adf2cbb8298e83b53d7bee2ddab4c875cb3c5 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add 8-bit regclass and pattern for sext_inreg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
0fc32dae8f380f57087bf48e4248f1ad3326a1b0 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add pattern for OR

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70720 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
6ee626a1c16dfac052c1506b7a24051b6bc96beb 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add reg-imm variants

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70719 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
c8166ac76097ff245a484008137237ac88a05e71 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add hint to nop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70718 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
0ba0a89c6b6c1a91e7ab3ea617a8ab1738915ffe 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add more instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70717 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
d2c94ae49e546e68b591e838cdfc2fd016d928d9 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add dummy lowering for shifts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
8d7bb3998b7c000780f43d11ed9c443e432fbe04 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> We're not going to spend 100% of time in interrupts, do we? :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
431beb5fa71e3511e685713f004c451302ea3eab 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add simple reg-reg add.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
1df221f2bb8e8380e255d1bec73ab07b388d01a2 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
fd1b7c778c0c332a676b1003115d2b4bc6f9a46a 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Add proper ISD::RET lowering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td
f2c3e179ecc2a6ebc259382828a5e5dc5a61d2f8 03-May-2009 Anton Korobeynikov <asl@math.spbu.ru> Dummy MSP430 backend

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70694 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MSP430/MSP430InstrInfo.td