Lines Matching defs:ISD

100 /// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT
101 /// (ISD::AssertSext).
106 ISD::NodeType AssertOp = ISD::DELETED_NODE) {
137 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
138 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
144 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
158 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
159 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
162 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo);
163 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
170 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
171 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
174 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi);
195 if (AssertOp != ISD::DELETED_NODE)
198 return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
200 return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val);
206 return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val,
209 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
213 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
235 /// extra bits are known to be zero (ISD::AssertZext) or sign extended from
236 /// ValueVT (ISD::AssertSext).
280 Val = DAG.getNode(IntermediateVT.isVector() ? ISD::CONCAT_VECTORS
281 : ISD::BUILD_VECTOR,
299 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
305 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
311 return DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
320 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
332 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
336 return DAG.getNode(ISD::BUILD_VECTOR, DL, ValueVT, Val);
349 ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
376 Val = DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val);
384 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
389 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
396 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
398 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
423 SDValue OddVal = DAG.getNode(ISD::SRL, DL, ValueVT, Val,
433 Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
438 Parts[0] = DAG.getNode(ISD::BITCAST, DL,
450 Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL,
452 Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL,
456 Part0 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part0);
457 Part1 = DAG.getNode(ISD::BITCAST, DL, PartVT, Part1);
482 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
491 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
499 Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, Ops);
504 //Val = DAG.getNode(ISD::CONCAT_VECTORS, DL, PartVT, Val, UndefElts);
512 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
518 Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
522 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
547 Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL,
552 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
746 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl,
756 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values);
775 ISD::NodeType ExtendKind =
776 TLI.isZExtFree(Val, RegisterVT)? ISD::ZERO_EXTEND: ISD::ANY_EXTEND;
810 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Chains);
911 SDValue Root = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
929 if (Root.getOpcode() != ISD::EntryToken) {
941 Root = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
1111 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(),
1163 return NodeMap[V] = DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(), VT, Ops);
1189 SmallVector<ISD::OutputArg, 8> Outs;
1213 SDValue Add = DAG.getNode(ISD::ADD, getCurSDLoc(),
1223 Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(),
1234 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
1239 ExtendKind = ISD::SIGN_EXTEND;
1242 ExtendKind = ISD::ZERO_EXTEND;
1244 if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger())
1255 ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
1261 if (ExtendKind == ISD::SIGN_EXTEND)
1263 else if (ExtendKind == ISD::ZERO_EXTEND)
1267 Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(),
1395 ISD::CondCode Condition;
1403 Condition = ISD::SETEQ; // silence warning.
1415 CaseBlock CB(ISD::SETEQ, Cond, ConstantInt::getTrue(*DAG.getContext()),
1547 if (Cases[0].CC == ISD::SETEQ && Cases[0].TrueBB == Cases[1].ThisBB)
1549 if (Cases[0].CC == ISD::SETNE && Cases[0].FalseBB == Cases[1].ThisBB)
1575 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
1639 CaseBlock CB(ISD::SETEQ, CondVal, ConstantInt::getTrue(*DAG.getContext()),
1660 CB.CC == ISD::SETEQ)
1663 CB.CC == ISD::SETEQ) {
1665 Cond = DAG.getNode(ISD::XOR, dl, CondLHS.getValueType(), CondLHS, True);
1669 assert(CB.CC == ISD::SETLE && "Can handle only LE ranges now");
1679 ISD::SETLE);
1681 SDValue SUB = DAG.getNode(ISD::SUB, dl,
1684 DAG.getConstant(High-Low, VT), ISD::SETULE);
1707 Cond = DAG.getNode(ISD::XOR, dl, Cond.getValueType(), Cond, True);
1710 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl,
1717 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond,
1731 SDValue BrJumpTable = DAG.getNode(ISD::BR_JT, getCurSDLoc(),
1747 SDValue Sub = DAG.getNode(ISD::SUB, getCurSDLoc(), VT, SwitchOp,
1771 ISD::SETUGT);
1781 SDValue BrCond = DAG.getNode(ISD::BRCOND, getCurSDLoc(),
1786 BrCond = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, BrCond,
1825 SDValue Sub = DAG.getNode(ISD::SUB, getCurSDLoc(), VT, Guard, StackSlot);
1831 ISD::SETNE);
1835 SDValue BrCond = DAG.getNode(ISD::BRCOND, getCurSDLoc(),
1839 SDValue Br = DAG.getNode(ISD::BR, getCurSDLoc(),
1870 SDValue Sub = DAG.getNode(ISD::SUB, getCurSDLoc(), VT, SwitchOp,
1879 ISD::SETUGT);
1916 SDValue BrRange = DAG.getNode(ISD::BRCOND, getCurSDLoc(),
1921 BrRange = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, CopyTo,
1947 ISD::SETEQ);
1954 ISD::SETNE);
1957 SDValue SwitchVal = DAG.getNode(ISD::SHL, getCurSDLoc(), VT,
1961 SDValue AndOp = DAG.getNode(ISD::AND, getCurSDLoc(),
1966 ISD::SETNE);
1974 SDValue BrAnd = DAG.getNode(ISD::BRCOND, getCurSDLoc(),
1986 BrAnd = DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, BrAnd,
2018 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
2059 SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
2114 SDValue Or = DAG.getNode(ISD::OR, DL, VT, CondLHS,
2118 ISD::SETEQ);
2129 SDValue BrCond = DAG.getNode(ISD::BRCOND, DL, MVT::Other,
2134 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond,
2188 ISD::CondCode CC;
2191 CC = ISD::SETEQ;
2194 CC = ISD::SETLE;
2222 (TLI.isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
2223 TLI.isOperationLegalOrCustom(ISD::BRIND, MVT::Other));
2469 CaseBlock CB(ISD::SETLT, SV, C, nullptr, TrueBB, FalseBB, CR.CaseBB);
2499 if (!TLI->isOperationLegal(ISD::SHL, PTy))
2693 DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
2760 DAG.setRoot(DAG.getNode(ISD::BRIND, getCurSDLoc(),
2767 DAG.setRoot(DAG.getNode(ISD::TRAP, getCurSDLoc(), MVT::Other, DAG.getRoot()));
2776 setValue(&I, DAG.getNode(ISD::FNEG, getCurSDLoc(),
2781 visitBinary(I, ISD::FSUB);
2819 Op2 = DAG.getNode(ISD::ZERO_EXTEND, DL, ShiftTy, Op2);
2826 Op2 = DAG.getNode(ISD::TRUNCATE, DL, ShiftTy, Op2);
2837 if (Opcode == ISD::SRL || Opcode == ISD::SRA || Opcode == ISD::SHL) {
2867 setValue(&I, DAG.getNode(ISD::SDIV, getCurSDLoc(), Op1.getValueType(),
2879 ISD::CondCode Opcode = getICmpCondCode(predicate);
2893 ISD::CondCode Condition = getFCmpCondCode(predicate);
2910 ISD::NodeType OpCode = Cond.getValueType().isVector() ?
2911 ISD::VSELECT : ISD::SELECT;
2922 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
2930 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N));
2938 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(), DestVT, N));
2946 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurSDLoc(), DestVT, N));
2954 setValue(&I, DAG.getNode(ISD::FP_ROUND, getCurSDLoc(),
2963 setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurSDLoc(), DestVT, N));
2970 setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurSDLoc(), DestVT, N));
2977 setValue(&I, DAG.getNode(ISD::FP_TO_SINT, getCurSDLoc(), DestVT, N));
2984 setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurSDLoc(), DestVT, N));
2991 setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurSDLoc(), DestVT, N));
3017 setValue(&I, DAG.getNode(ISD::BITCAST, getCurSDLoc(),
3051 setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT, getCurSDLoc(),
3061 setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
3106 setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurSDLoc(),
3114 setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurSDLoc(),
3122 bool Src1U = Src1.getOpcode() == ISD::UNDEF;
3123 bool Src2U = Src2.getOpcode() == ISD::UNDEF;
3131 Src1 = Src1U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
3133 Src2 = Src2U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS,
3205 Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, getCurSDLoc(), VT,
3245 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurSDLoc(),
3252 setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurSDLoc(), VT, Ops));
3293 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3327 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3347 N = DAG.getNode(ISD::ADD, getCurSDLoc(), N.getValueType(), N,
3365 OffsVal = DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), PTy,
3370 N = DAG.getNode(ISD::ADD, getCurSDLoc(), N.getValueType(), N,
3389 IdxN = DAG.getNode(ISD::SHL, getCurSDLoc(),
3394 IdxN = DAG.getNode(ISD::MUL, getCurSDLoc(),
3399 N = DAG.getNode(ISD::ADD, getCurSDLoc(),
3426 AllocSize = DAG.getNode(ISD::MUL, getCurSDLoc(), IntPtr,
3439 AllocSize = DAG.getNode(ISD::ADD, getCurSDLoc(),
3444 AllocSize = DAG.getNode(ISD::AND, getCurSDLoc(),
3450 SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, getCurSDLoc(), VTs, Ops);
3513 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
3518 SDValue A = DAG.getNode(ISD::ADD, getCurSDLoc(),
3531 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
3539 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
3576 SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
3581 SDValue Add = DAG.getNode(ISD::ADD, getCurSDLoc(), PtrVT, Ptr,
3590 SDValue StoreNode = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other,
3616 return DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops);
3635 ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, dl, MemVT, VTs, InChain,
3654 ISD::NodeType NT;
3657 case AtomicRMWInst::Xchg: NT = ISD::ATOMIC_SWAP; break;
3658 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break;
3659 case AtomicRMWInst::Sub: NT = ISD::ATOMIC_LOAD_SUB; break;
3660 case AtomicRMWInst::And: NT = ISD::ATOMIC_LOAD_AND; break;
3661 case AtomicRMWInst::Nand: NT = ISD::ATOMIC_LOAD_NAND; break;
3662 case AtomicRMWInst::Or: NT = ISD::ATOMIC_LOAD_OR; break;
3663 case AtomicRMWInst::Xor: NT = ISD::ATOMIC_LOAD_XOR; break;
3664 case AtomicRMWInst::Max: NT = ISD::ATOMIC_LOAD_MAX; break;
3665 case AtomicRMWInst::Min: NT = ISD::ATOMIC_LOAD_MIN; break;
3666 case AtomicRMWInst::UMax: NT = ISD::ATOMIC_LOAD_UMAX; break;
3667 case AtomicRMWInst::UMin: NT = ISD::ATOMIC_LOAD_UMIN; break;
3706 DAG.setRoot(DAG.getNode(ISD::ATOMIC_FENCE, dl, MVT::Other, Ops));
3733 DAG.getAtomic(ISD::ATOMIC_LOAD, dl, VT, VT, InChain,
3767 DAG.getAtomic(ISD::ATOMIC_STORE, dl, VT,
3806 if (!IsTgtIntrinsic || Info.opc == ISD::INTRINSIC_VOID ||
3807 Info.opc == ISD::INTRINSIC_W_CHAIN)
3834 Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurSDLoc(), VTs, Ops);
3836 Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurSDLoc(), VTs, Ops);
3838 Result = DAG.getNode(ISD::INTRINSIC_VOID, getCurSDLoc(), VTs, Ops);
3852 Result = DAG.getNode(ISD::BITCAST, getCurSDLoc(), VT, Result);
3867 SDValue t1 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
3869 SDValue t2 = DAG.getNode(ISD::OR, dl, MVT::i32, t1,
3871 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, t2);
3882 SDValue t0 = DAG.getNode(ISD::AND, dl, MVT::i32, Op,
3884 SDValue t1 = DAG.getNode(ISD::SRL, dl, MVT::i32, t0,
3886 SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1,
3888 return DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, t2);
3910 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, Op,
3912 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, t0);
3915 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
3916 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1);
3919 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
3931 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3933 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
3935 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3936 TwoToFracPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3947 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3949 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
3951 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3952 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3954 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3955 TwoToFracPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
3969 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
3971 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
3973 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
3974 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
3976 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
3977 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
3979 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
3980 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
3982 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
3983 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
3985 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
3986 TwoToFracPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
3991 SDValue t13 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, TwoToFracPartOfX);
3992 return DAG.getNode(ISD::BITCAST, dl, MVT::f32,
3993 DAG.getNode(ISD::ADD, dl, MVT::i32,
3998 return DAG.getNode(ISD::FEXP, dl, Op.getValueType(), Op);
4007 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
4011 SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp,
4027 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4029 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
4031 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4032 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
4044 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4046 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
4048 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4049 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
4051 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4052 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4054 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4055 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
4069 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4071 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
4073 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4074 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
4076 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4077 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4079 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4080 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
4082 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4083 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
4085 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
4086 LogOfMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
4090 return DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, LogOfMantissa);
4094 return DAG.getNode(ISD::FLOG, dl, Op.getValueType(), Op);
4103 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
4121 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4123 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
4125 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4126 Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
4138 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4140 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
4142 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4143 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
4145 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4146 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4148 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4149 Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
4164 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4166 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
4168 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4169 SDValue t3 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
4171 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4172 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4174 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4175 SDValue t7 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t6,
4177 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4178 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
4180 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
4181 Log2ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t10,
4185 return DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log2ofMantissa);
4189 return DAG.getNode(ISD::FLOG2, dl, Op.getValueType(), Op);
4198 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op);
4202 SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp,
4218 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4220 SDValue t1 = DAG.getNode(ISD::FADD, dl, MVT::f32, t0,
4222 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4223 Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t2,
4234 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4236 SDValue t1 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0,
4238 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4239 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4241 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4242 Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
4255 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4257 SDValue t1 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0,
4259 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t1, X);
4260 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4262 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4263 SDValue t5 = DAG.getNode(ISD::FSUB, dl, MVT::f32, t4,
4265 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4266 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4268 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4269 Log10ofMantissa = DAG.getNode(ISD::FSUB, dl, MVT::f32, t8,
4273 return DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log10ofMantissa);
4277 return DAG.getNode(ISD::FLOG10, dl, Op.getValueType(), Op);
4286 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Op);
4289 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
4290 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, Op, t1);
4293 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
4305 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4307 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4309 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4310 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4321 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4323 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4325 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4326 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4328 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4329 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4342 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4344 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4346 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4347 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4349 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4350 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4352 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4353 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
4355 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
4356 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
4358 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
4359 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
4364 SDValue t13 = DAG.getNode(ISD::BITCAST, dl, MVT::i32,
4366 return DAG.getNode(ISD::BITCAST, dl, MVT::f32,
4367 DAG.getNode(ISD::ADD, dl, MVT::i32,
4372 return DAG.getNode(ISD::FEXP2, dl, Op.getValueType(), Op);
4394 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, RHS,
4396 SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, t0);
4399 SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);
4400 SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1);
4403 IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX,
4415 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4417 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4419 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4420 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4431 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4433 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4435 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4436 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4438 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4439 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4452 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X,
4454 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2,
4456 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X);
4457 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4,
4459 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X);
4460 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6,
4462 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X);
4463 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8,
4465 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X);
4466 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10,
4468 SDValue t12 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t11, X);
4469 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t12,
4473 SDValue t13 = DAG.getNode(ISD::BITCAST, dl,MVT::i32,TwoToFractionalPartOfX);
4474 return DAG.getNode(ISD::BITCAST, dl, MVT::f32,
4475 DAG.getNode(ISD::ADD, dl, MVT::i32,
4480 return DAG.getNode(ISD::FPOW, dl, LHS.getValueType(), LHS, RHS);
4515 Res = DAG.getNode(ISD::FMUL, DL,Res.getValueType(), Res, CurSquare);
4520 CurSquare = DAG.getNode(ISD::FMUL, DL, CurSquare.getValueType(),
4527 Res = DAG.getNode(ISD::FDIV, DL, LHS.getValueType(),
4534 return DAG.getNode(ISD::FPOWI, DL, LHS.getValueType(), LHS, RHS);
4540 if (N.getOpcode() != ISD::TRUNCATE)
4544 if (Ext.getOpcode() == ISD::AssertZext ||
4545 Ext.getOpcode() == ISD::AssertSext) {
4547 if (CFR.getOpcode() == ISD::CopyFromReg)
4549 if (CFR.getOpcode() == ISD::TRUNCATE)
4581 if (N.getOpcode() == ISD::CopyFromReg)
4652 setValue(&I, DAG.getNode(ISD::RETURNADDR, sdl, TLI->getPointerTy(),
4656 setValue(&I, DAG.getNode(ISD::FRAMEADDR, sdl, TLI->getPointerTy(),
4663 setValue(&I, DAG.getNode(ISD::READ_REGISTER, sdl, VT, RegName));
4671 DAG.setRoot(DAG.getNode(ISD::WRITE_REGISTER, sdl, MVT::Other, Chain,
4891 DAG.setRoot(DAG.getNode(ISD::EH_RETURN, sdl,
4903 SDValue Offset = DAG.getNode(ISD::ADD, sdl,
4905 DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET, sdl,
4908 SDValue FA = DAG.getNode(ISD::FRAMEADDR, sdl,
4911 setValue(&I, DAG.getNode(ISD::ADD, sdl, FA.getValueType(),
4937 SDValue Op = DAG.getNode(ISD::EH_SJLJ_SETJMP, sdl,
4944 DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_LONGJMP, sdl, MVT::Other,
4999 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, sdl, ShAmtVT, ShOps);
5001 ShAmt = DAG.getNode(ISD::BITCAST, sdl, DestVT, ShAmt);
5002 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, sdl, DestVT,
5016 Res = DAG.getNode(ISD::INSERT_SUBVECTOR, sdl, DestVT,
5030 Res = DAG.getNode(ISD::EXTRACT_SUBVECTOR, sdl, DestVT,
5045 ISD::CvtCode Code = ISD::CVT_INVALID;
5048 case Intrinsic::convertff: Code = ISD::CVT_FF; break;
5049 case Intrinsic::convertfsi: Code = ISD::CVT_FS; break;
5050 case Intrinsic::convertfui: Code = ISD::CVT_FU; break;
5051 case Intrinsic::convertsif: Code = ISD::CVT_SF; break;
5052 case Intrinsic::convertuif: Code = ISD::CVT_UF; break;
5053 case Intrinsic::convertss: Code = ISD::CVT_SS; break;
5054 case Intrinsic::convertsu: Code = ISD::CVT_SU; break;
5055 case Intrinsic::convertus: Code = ISD::CVT_US; break;
5056 case Intrinsic::convertuu: Code = ISD::CVT_UU; break;
5105 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
5106 case Intrinsic::fabs: Opcode = ISD::FABS; break;
5107 case Intrinsic::sin: Opcode = ISD::FSIN; break;
5108 case Intrinsic::cos: Opcode = ISD::FCOS; break;
5109 case Intrinsic::floor: Opcode = ISD::FFLOOR; break;
5110 case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
5111 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
5112 case Intrinsic::rint: Opcode = ISD::FRINT; break;
5113 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
5114 case Intrinsic::round: Opcode = ISD::FROUND; break;
5123 setValue(&I, DAG.getNode(ISD::FCOPYSIGN, sdl,
5129 setValue(&I, DAG.getNode(ISD::FMA, sdl,
5139 setValue(&I, DAG.getNode(ISD::FMA, sdl,
5145 SDValue Mul = DAG.getNode(ISD::FMUL, sdl,
5149 SDValue Add = DAG.getNode(ISD::FADD, sdl,
5158 setValue(&I, DAG.getNode(ISD::FP32_TO_FP16, sdl,
5162 setValue(&I, DAG.getNode(ISD::FP16_TO_FP32, sdl,
5167 DAG.setRoot(DAG.getNode(ISD::PCMARKER, sdl, MVT::Other, getRoot(), Tmp));
5172 Res = DAG.getNode(ISD::READCYCLECOUNTER, sdl,
5179 setValue(&I, DAG.getNode(ISD::BSWAP, sdl,
5187 setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTTZ : ISD::CTTZ_ZERO_UNDEF,
5195 setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTLZ : ISD::CTLZ_ZERO_UNDEF,
5202 setValue(&I, DAG.getNode(ISD::CTPOP, sdl, Ty, Arg));
5207 Res = DAG.getNode(ISD::STACKSAVE, sdl,
5215 DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, sdl, MVT::Other, getRoot(), Res));
5277 Res = DAG.getNode(ISD::INIT_TRAMPOLINE, sdl, MVT::Other, Ops);
5283 setValue(&I, DAG.getNode(ISD::ADJUST_TRAMPOLINE, sdl,
5301 setValue(&I, DAG.getNode(ISD::FLT_ROUNDS_, sdl, MVT::i32));
5314 ISD::NodeType Op = (Intrinsic == Intrinsic::trap) ?
5315 ISD::TRAP : ISD::DEBUGTRAP;
5338 ISD::NodeType Op;
5341 case Intrinsic::uadd_with_overflow: Op = ISD::UADDO; break;
5342 case Intrinsic::sadd_with_overflow: Op = ISD::SADDO; break;
5343 case Intrinsic::usub_with_overflow: Op = ISD::USUBO; break;
5344 case Intrinsic::ssub_with_overflow: Op = ISD::SSUBO; break;
5345 case Intrinsic::umul_with_overflow: Op = ISD::UMULO; break;
5346 case Intrinsic::smul_with_overflow: Op = ISD::SMULO; break;
5363 DAG.setRoot(DAG.getMemIntrinsicNode(ISD::PREFETCH, sdl,
5396 unsigned Opcode = (IsStart ? ISD::LIFETIME_START : ISD::LIFETIME_END);
5693 ISD::SETNE);
5907 setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurSDLoc(),
5915 if (visitUnaryFloatCall(I, ISD::FABS))
5921 if (visitUnaryFloatCall(I, ISD::FSIN))
5927 if (visitUnaryFloatCall(I, ISD::FCOS))
5936 if (visitUnaryFloatCall(I, ISD::FSQRT))
5942 if (visitUnaryFloatCall(I, ISD::FFLOOR))
5948 if (visitUnaryFloatCall(I, ISD::FNEARBYINT))
5954 if (visitUnaryFloatCall(I, ISD::FCEIL))
5960 if (visitUnaryFloatCall(I, ISD::FRINT))
5966 if (visitUnaryFloatCall(I, ISD::FROUND))
5972 if (visitUnaryFloatCall(I, ISD::FTRUNC))
5978 if (visitUnaryFloatCall(I, ISD::FLOG2))
5984 if (visitUnaryFloatCall(I, ISD::FEXP2))
6138 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
6147 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
6400 // AsmNodeOperands - The operands for the ISD::INLINEASM node.
6665 Chain = DAG.getNode(ISD::INLINEASM, getCurSDLoc(),
6685 Val = DAG.getNode(ISD::BITCAST, getCurSDLoc(),
6693 Val = DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), ResultType, Val);
6729 Chain = DAG.getNode(ISD::TokenFactor, getCurSDLoc(), MVT::Other, OutChains);
6735 DAG.setRoot(DAG.getNode(ISD::VASTART, getCurSDLoc(),
6753 DAG.setRoot(DAG.getNode(ISD::VAEND, getCurSDLoc(),
6760 DAG.setRoot(DAG.getNode(ISD::VACOPY, getCurSDLoc(),
6940 if (hasDef && (CallEnd->getOpcode() == ISD::CopyFromReg))
6945 assert(CallEnd->getOpcode() == ISD::CALLSEQ_END &&
7076 SmallVector<ISD::OutputArg, 4> Outs;
7115 ISD::InputArg MyFlags;
7148 ISD::ArgFlagsTy Flags;
7192 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
7195 ExtendKind = ISD::SIGN_EXTEND;
7197 ExtendKind = ISD::ZERO_EXTEND;
7214 (ExtendKind != ISD::ANY_EXTEND &&
7224 ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(), VT,
7285 SDValue Add = CLI.DAG.getNode(ISD::ADD, CLI.DL, PtrVT, DemoteStackSlot,
7295 CLI.Chain = CLI.DAG.getNode(ISD::TokenFactor, CLI.DL, MVT::Other, Chains);
7299 ISD::NodeType AssertOp = ISD::DELETED_NODE;
7301 AssertOp = ISD::AssertSext;
7303 AssertOp = ISD::AssertZext;
7323 SDValue Res = CLI.DAG.getNode(ISD::MERGE_VALUES, CLI.DL,
7343 assert((Op.getOpcode() != ISD::CopyFromReg ||
7379 SmallVector<ISD::InputArg, 16> Ins;
7389 ISD::ArgFlagsTy Flags;
7392 ISD::InputArg RetArg(Flags, RegisterVT, ValueVTs[0], true, 0, 0);
7413 ISD::ArgFlagsTy Flags;
7457 ISD::InputArg MyFlags(Flags, RegisterVT, VT, isArgValueUsed,
7508 ISD::NodeType AssertOp = ISD::DELETED_NODE;
7549 ISD::NodeType AssertOp = ISD::DELETED_NODE;
7551 AssertOp = ISD::AssertSext;
7553 AssertOp = ISD::AssertZext;
7576 if (!TM.Options.EnableFastISel && Res.getOpcode() == ISD::BUILD_PAIR) {
7586 if (!TM.Options.EnableFastISel && Res.getOpcode() == ISD::CopyFromReg) {