/external/clang/test/Parser/ |
H A D | MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) argument 8 mov eax, Bit
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/external/vixl/src/a64/ |
H A D | assembler-a64.h | 81 RegList Bit() const { function in class:vixl::CPURegister 312 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()), 420 return (type_ == other.type()) && ((other.Bit() & list_) != 0); 810 // Bit test and set flags. 813 // Bit clear (A & ~B). 818 // Bit clear (A & ~B) and update status flags. 1095 // Bit revers [all...] |
H A D | instructions-a64.h | 164 inline int Bit(int pos) const { function in class:vixl::Instruction
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/external/llvm/lib/Target/X86/ |
H A D | X86CodeEmitter.cpp | 204 unsigned Bit = 0; local 210 REX |= 1 << Bit; 211 Bit++; 226 unsigned Bit = 0; local 231 REX |= 1 << Bit; 232 Bit++;
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/external/llvm/lib/TableGen/ |
H A D | TGLexer.h | 46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List, enumerator in enum:llvm::tgtok::TokKind
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H A D | Record.cpp | 219 if (BitInit *Bit = dyn_cast<BitInit>(BI->getBit(i))) { 220 Result |= Bit->getValue() << i; 495 if (Init *Bit = getBit(e-i-1)) 496 Result += Bit->getAsString(); 531 Init *Bit = CachedInit->getBit(CurBit->getBitNum()); local 532 NewBits[i] = fixBitInit(RV, CurBit, Bit); 549 Init *Bit = CurBitVar->getBit(CurBit->getBitNum()); local 550 NewBits[i] = fixBitInit(RV, CurBit, Bit); 734 Init *OpInit::getBit(unsigned Bit) const { 737 return VarBitInit::get(const_cast<OpInit*>(this), Bit); [all...] |
H A D | TGParser.cpp | 124 unsigned Bit = BitList[i]; local 125 if (NewBits[Bit]) 126 return Error(Loc, "Cannot set bit #" + utostr(Bit) + " of value '" + 128 NewBits[Bit] = BInit->getBit(i); 688 case tgtok::Bit: Lex.Lex(); return BitRecTy::get(); 1290 Init *Bit = Vals[i]->convertInitializerTo(BitRecTy::get()); local 1291 if (!Bit) { 1296 NewBits[Vals.size()-i-1] = Bit;
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/external/chromium_org/v8/src/arm64/ |
H A D | assembler-arm64-inl.h | 51 inline RegList CPURegister::Bit() const { function in class:v8::internal::CPURegister
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H A D | instructions-arm64.h | 107 int Bit(int pos) const { function in class:v8::internal::Instruction
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCCodeEmitter.cpp | 436 // Table 2-1 "16-Bit Addressing Forms with the ModR/M byte". We can only 1054 unsigned Bit = 0; local 1060 REX |= 1 << Bit; // set REX.B (Bit=0) and REX.X (Bit=1) 1061 Bit++; 1077 unsigned Bit = 0; local 1082 REX |= 1 << Bit; // REX.B (Bit=0) and REX.X (Bit [all...] |
/external/llvm/include/llvm/Support/ |
H A D | CommandLine.h | 1464 static unsigned Bit(const T &V) { function in class:llvm::cl::bits_storage 1485 *Location |= Bit(V); 1492 return (*Location & Bit(V)) != 0; 1505 static unsigned Bit(const T &V) { 1515 Bits |= Bit(V); 1522 return (Bits & Bit(V)) != 0;
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/external/llvm/include/llvm/TableGen/ |
H A D | Record.h | 543 virtual Init *getBit(unsigned Bit) const = 0; 613 Init *getBit(unsigned Bit) const override { 643 Init *getBit(unsigned Bit) const override { 644 assert(Bit < 1 && "Bit index out of range!"); 693 Init *getBit(unsigned Bit) const override { 694 assert(Bit < Bits.size() && "Bit index out of range!"); 695 return Bits[Bit]; 734 Init *getBit(unsigned Bit) cons 1095 unsigned Bit; member in class:llvm::VarBitInit [all...] |
/external/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 1176 unsigned Bit = 0; local 1182 Idx->LaneMask = 1u << Bit; 1190 if (Bit < 31) 1191 ++Bit; 1195 CoveringLanes &= ~(1u << Bit);
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/external/chromium_org/v8/src/arm/ |
H A D | constants-arm.h | 144 BIC = 14 << 21, // Bit Clear. 261 // Bit encoding P U W. 273 // Bit encoding P U W . 332 // standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature. 453 inline int Bit(int nr) const { function in class:v8::internal::Instruction 470 static inline int Bit(Instr instr, int nr) { function in class:v8::internal::Instruction 523 inline int NValue() const { return Bit(7); } 524 inline int MValue() const { return Bit(5); } 525 inline int DValue() const { return Bit(22); } 527 inline int PValue() const { return Bit(2 [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 1485 SDValue Bit = DAG.getNode(ISD::SHL, DL, ResTy, One, Op->getOperand(2)); local 1488 DAG.getNOT(DL, Bit, ResTy));
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/external/clang/lib/CodeGen/ |
H A D | MicrosoftCXXABI.cpp | 123 // The deleting destructors accept an i32 bitfield as a second parameter. Bit 124 // 1 indicates if the memory should be deleted. Bit 2 indicates if the this 1785 llvm::ConstantInt *Bit = llvm::ConstantInt::get(GuardTy, 1U << BitIndex); local 1788 Builder.CreateICmpNE(Builder.CreateAnd(LI, Bit), Zero); 1796 Builder.CreateStore(Builder.CreateOr(LI, Bit), GI->Guard);
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 31 // (((X ^ XORValue) + AddValue) >> Bit) 34 : XORValue(xorValue), AddValue(addValue), Bit(bit) {} 38 unsigned Bit; member in struct:__anon26153::IPMConversion 1677 DAG.getConstant(Conversion.Bit, MVT::i32)); 1678 if (Conversion.Bit != 31)
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 3992 // Bit 4: Special Reg (cpsr, apsr => 0; spsr => 1) 5636 unsigned Bit = 1; local 5640 Bit = (ITState.Mask >> (5 - ITState.CurPosition)) & 1; 5645 unsigned ITCond = Bit ? ITState.Cond :
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