/external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
H A D | i915_fpc_emit.c | 36 int bit = ffs(~p->temp_flag); local 37 if (!bit) { 42 p->temp_flag |= 1 << (bit - 1); 43 return bit - 1; 61 int bit = ffs(~p->utemp_flag); local 62 if (!bit) { 67 p->utemp_flag |= 1 << (bit - 1); 68 return UREG(REG_TYPE_U, (bit - 1));
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/external/libhevc/common/arm/ |
H A D | ihevc_itrans_recon_4x4.s | 46 @ * to 8 bit 215 vaddw.u8 q0,q0,d22 @ pi2_out(16bit) + pu1_pred(8bit) 216 vaddw.u8 q1,q1,d23 @ pi2_out(16bit) + pu1_pred(8bit) 217 vqmovun.s16 d0,q0 @ clip_u8(pi2_out(16bit) + pu1_pred(8bit)) 218 vqmovun.s16 d1,q1 @ clip_u8(pi2_out(16bit) + pu1_pred(8bit))
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H A D | ihevc_itrans_recon_4x4_ttype1.s | 51 @ * to 8 bit 216 vaddw.u8 q0,q0,d18 @ pi2_out(16bit) + pu1_pred(8bit) 217 vqmovun.s16 d0,q0 @ clip_u8(pi2_out(16bit) + pu1_pred(8bit)) 218 vaddw.u8 q1,q1,d19 @ pi2_out(16bit) + pu1_pred(8bit) 219 vqmovun.s16 d1,q1 @ clip_u8(pi2_out(16bit) + pu1_pred(8bit))
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H A D | ihevc_weighted_pred_bi_default.s | 178 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer) 179 add r12,r1,r4 @pi2_src_tmp2 = pi2_src2 + 2*src_strd2(2* because pi2_src is a 16 bit pointer) 210 add r0,r0,r7 @pi2_src1 + 4*src_strd1 - 2*wd(since pi2_src1 is 16 bit pointer double the increment with double the wd decrement) 228 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer) 229 add r12,r1,r4 @pi2_src_tmp2 = pi2_src2 + 2*src_strd2(2* because pi2_src is a 16 bit pointer) 251 add r0,r0,r7 @pi2_src1 + 2*src_strd1 - 2*wd(since pi2_src1 is 16 bit pointer double the increment with double the wd decrement) 266 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer) 267 add r12,r1,r4 @pi2_src_tmp2 = pi2_src2 + 2*src_strd2(2* because pi2_src is a 16 bit pointer) 293 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer) 294 add r12,r1,r4 @pi2_src_tmp2 = pi2_src2 + 2*src_strd2(2* because pi2_src is a 16 bit pointe [all...] |
/external/libnl/lib/route/ |
H A D | pktloc_grammar.l | 10 %option 8bit
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/external/libsepol/src/ |
H A D | users.c | 24 unsigned bit; local 35 ebitmap_for_each_bit(roles, rnode, bit) { 36 if (ebitmap_node_get_bit(rnode, bit)) { 37 char *role = policydb->p_role_val_to_name[bit]; 121 unsigned bit; local 170 ebitmap_for_each_bit(&roldatum->dominates, rnode, bit) { 171 if (ebitmap_node_get_bit(rnode, bit)) { 173 (&(usrdatum->roles.roles), bit, 1))
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/external/mesa3d/src/gallium/drivers/i915/ |
H A D | i915_fpc_emit.c | 36 int bit = ffs(~p->temp_flag); local 37 if (!bit) { 42 p->temp_flag |= 1 << (bit - 1); 43 return bit - 1; 61 int bit = ffs(~p->utemp_flag); local 62 if (!bit) { 67 p->utemp_flag |= 1 << (bit - 1); 68 return UREG(REG_TYPE_U, (bit - 1));
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/external/valgrind/main/memcheck/tests/ |
H A D | origin1-yes.stderr.exp | 2 Undef 1 of 8 (stack, 32 bit) 9 Undef 2 of 8 (stack, 32 bit) 16 Undef 3 of 8 (stack, 64 bit) 23 Undef 4 of 8 (mallocd, 32-bit)
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/external/webp/src/utils/ |
H A D | bit_writer.h | 46 int VP8PutBit(VP8BitWriter* const bw, int bit, int prob); 47 int VP8PutBitUniform(VP8BitWriter* const bw, int bit); 72 #if defined(__x86_64__) || defined(_M_X64) // 64bit 83 vp8l_atype_t bits_; // bit accumulator 91 // failure has happened during bit writing. A value of 0 indicates successful 108 // and within a byte least-significant-bit first.
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/external/chromium_org/third_party/icu/source/i18n/ |
H A D | scriptset.cpp | 70 uint32_t bit = 1 << (script & 31); local 71 return ((bits[index] & bit) != 0); 84 uint32_t bit = 1 << (script & 31); local 85 bits[index] |= bit; 98 uint32_t bit = 1 << (script & 31); local 99 bits[index] &= ~bit; 160 // This bit counter is good for sparse numbers of '1's, which is 167 x &= (x - 1); // and off the least significant one bit.
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/external/icu/icu4c/source/i18n/ |
H A D | scriptset.cpp | 70 uint32_t bit = 1 << (script & 31); local 71 return ((bits[index] & bit) != 0); 84 uint32_t bit = 1 << (script & 31); local 85 bits[index] |= bit; 98 uint32_t bit = 1 << (script & 31); local 99 bits[index] &= ~bit; 160 // This bit counter is good for sparse numbers of '1's, which is 167 x &= (x - 1); // and off the least significant one bit.
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/external/linux-tools-perf/perf-3.12.0/tools/perf/util/ |
H A D | evsel.h | 146 enum perf_event_sample_format bit); 148 enum perf_event_sample_format bit); 150 #define perf_evsel__set_sample_bit(evsel, bit) \ 151 __perf_evsel__set_sample_bit(evsel, PERF_SAMPLE_##bit) 153 #define perf_evsel__reset_sample_bit(evsel, bit) \ 154 __perf_evsel__reset_sample_bit(evsel, PERF_SAMPLE_##bit)
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/external/openssl/crypto/bn/ |
H A D | bn_rand.c | 122 int ret=0,bit,bytes,mask; local 132 bit=(bits-1)%8; 133 mask=0xff<<(bit+1); 182 if (bit == 0) 189 buf[0]|=(3<<(bit-1)); 194 buf[0]|=(1<<bit); 198 if (bottom) /* set bottom bit if requested */ 252 * so 3*range (= 11..._2) is exactly one bit longer than range */
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/external/tremolo/Tremolo/ |
H A D | dpen.s | 99 MOVS r0, r0, LSR #1 @ r0 = lok>>1 C = bottom bit 124 MOVS r0, r0, LSR #1 @ r0 = lok>>1 C = bottom bit 125 ADC r8, r6, r7 @ r8 = t+chase+bit 126 LDRB r10,[r8], -r6 @ r10= next=t[chase+bit] r8=chase+bit 139 CMP r8, r7 @ if bit==0 (chase+bit==chase) (sets C) 142 ADC r12,r8, r6 @ r12= chase+bit+1+t 143 LDRB r14,[r12,r14,LSR #7] @ r14= t[chase+bit+1+(!bit || [all...] |
/external/pcre/dist/ |
H A D | RunTest.bat | 166 echo ---- Testing 8-bit library ---- 172 echo ---- Testing 16-bit library ---- 178 echo ---- Testing 32-bit library ---- 421 echo Test 14 Skipped when running 16/32-bit tests. 426 call :runsub 14 testout "Specials for the basic 8-bit library" -q 433 echo Test 15 Skipped when running 16/32-bit tests. 440 call :runsub 15 testout "Specials for the 8-bit library with UTF-%bits% support" -q 447 echo Test 16 Skipped when running 16/32-bit tests. 454 call :runsub 16 testout "Specials for the 8-bit library with Unicode propery support" -q 461 echo Test 17 Skipped when running 8-bit test [all...] |
/external/iptables/extensions/ |
H A D | libxt_sctp.c | 123 int bit, 132 flag_info[i].flag_mask |= (1 << bit); 134 flag_info[i].flag |= (1 << bit); 149 flag_info[*flag_count].flag_mask |= (1 << bit); 151 flag_info[*flag_count].flag |= (1 << bit); 205 int bit; local 209 bit = p - sctp_chunk_names[i].valid_flags; 210 bit = 7 - bit; 213 &(einfo->flag_count), i, bit, 120 save_chunk_flag_info(struct xt_sctp_flag_info *flag_info, int *flag_count, int chunktype, int bit, int set) argument [all...] |
/external/libcxxabi/src/Unwind/ |
H A D | AddressSpace.hpp | 139 /// Read a ULEB128 into a 64-bit word. 144 int bit = 0; local 153 if (bit >= 64 || b << bit >> bit != b) { 156 result |= b << bit; 157 bit += 7; 164 /// Read a SLEB128 into a 64-bit word. 169 int bit = 0; local 175 result |= ((byte & 0x7f) << bit); [all...] |
/external/chromium_org/third_party/mesa/src/src/glx/ |
H A D | glxextensions.c | 47 #define EXT_ENABLED(bit,supported) (IS_SET( supported, bit )) 55 unsigned char bit; member in struct:extension_info 255 /* global bit-fields of available extensions and their characteristics */ 303 SET_BIT(supported, ext[i].bit); 306 CLR_BIT(supported, ext[i].bit); 319 * Convert the server's extension string to a bit-field. 326 * bit-fields used to track each of these have different sizes. Therefore, 345 /* Set the bit for the extension in the server_support table. 394 const unsigned bit local 414 const unsigned bit = known_gl_extensions[i].bit; local 460 __glXExtensionBitIsEnabled(struct glx_screen * psc, unsigned bit) argument 479 __glExtensionBitIsEnabled(struct glx_context *gc, unsigned bit) argument [all...] |
/external/mesa3d/src/glx/ |
H A D | glxextensions.c | 47 #define EXT_ENABLED(bit,supported) (IS_SET( supported, bit )) 55 unsigned char bit; member in struct:extension_info 255 /* global bit-fields of available extensions and their characteristics */ 303 SET_BIT(supported, ext[i].bit); 306 CLR_BIT(supported, ext[i].bit); 319 * Convert the server's extension string to a bit-field. 326 * bit-fields used to track each of these have different sizes. Therefore, 345 /* Set the bit for the extension in the server_support table. 394 const unsigned bit local 414 const unsigned bit = known_gl_extensions[i].bit; local 460 __glXExtensionBitIsEnabled(struct glx_screen * psc, unsigned bit) argument 479 __glExtensionBitIsEnabled(struct glx_context *gc, unsigned bit) argument [all...] |
/external/chromium_org/third_party/icu/source/common/ |
H A D | usc_impl.c | 122 int8_t bit = 0; local 130 bit += 16; 135 bit += 8; 140 bit += 4; 145 bit += 2; 150 bit += 1; 153 return bit;
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/external/icu/icu4c/source/common/ |
H A D | usc_impl.c | 122 int8_t bit = 0; local 130 bit += 16; 135 bit += 8; 140 bit += 4; 145 bit += 2; 150 bit += 1; 153 return bit;
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/external/chromium_org/v8/src/mips64/ |
H A D | regexp-macro-assembler-mips64.cc | 99 * --------- The following output registers are 32-bit values. --------- 330 RegList regexp_registers_to_retain = current_input_offset().bit() | 331 current_character().bit() | backtrack_stackpointer().bit(); 634 RegList registers_to_retain = s0.bit() | s1.bit() | s2.bit() | 635 s3.bit() | s4.bit() | s5.bit() | s [all...] |
/external/antlr/antlr-3.4/runtime/JavaScript/src/org/antlr/runtime/ |
H A D | BitSet.js | 10 * @param {Number|Array} [bits] a 32 bit number or array of 32 bit numbers 56 * Create mask for bit modded to fit in a single word. 60 * @param {Number} bitNumber the bit to create a mask for. 83 * @param {Number} bit a number to be included in the BitSet 85 * hold bit. 89 wordNumber: function(bit) { 90 return bit >> org.antlr.runtime.BitSet.LOG_BITS; // bit / BITS 207 * @param {org.antlr.runtime.BitSet} a a bit se [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
H A D | radeon_tcl.c | 208 /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */ 529 static char *getFallbackString(GLuint bit) argument 532 while (bit > 1) { 534 bit >>= 1; 541 void radeonTclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode ) argument 547 rmesa->radeon.TclFallback |= bit; 551 getFallbackString( bit )); 556 rmesa->radeon.TclFallback &= ~bit; 557 if (oldfallback == bit) { 560 getFallbackString( bit )); [all...] |
/external/mesa3d/src/mesa/drivers/dri/radeon/ |
H A D | radeon_tcl.c | 208 /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */ 529 static char *getFallbackString(GLuint bit) argument 532 while (bit > 1) { 534 bit >>= 1; 541 void radeonTclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode ) argument 547 rmesa->radeon.TclFallback |= bit; 551 getFallbackString( bit )); 556 rmesa->radeon.TclFallback &= ~bit; 557 if (oldfallback == bit) { 560 getFallbackString( bit )); [all...] |