/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_ureg.h | 674 struct ureg_src src0, \ 690 ureg_emit_src( ureg, src0 ); \ 699 struct ureg_src src0, \ 717 ureg_emit_src( ureg, src0 ); \ 725 struct ureg_src src0, \ 742 ureg_emit_src( ureg, src0 ); \ 752 struct ureg_src src0, \ 772 ureg_emit_src( ureg, src0 ); \ 783 struct ureg_src src0, \ 801 ureg_emit_src( ureg, src0 ); \ [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_eu.h | 833 struct brw_reg src0); 838 struct brw_reg src0, \ 844 struct brw_reg src0, \ 849 void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0); 925 struct brw_reg src0, 938 struct brw_reg src0, 946 struct brw_reg src0, 953 struct brw_reg src0, 964 struct brw_reg src0, 993 struct brw_reg src0, [all...] |
H A D | brw_vec4_emit.cpp | 303 struct brw_reg src0, 309 src0, src1); 315 struct brw_reg src0, 321 check_gen6_math_src_arg(src0); 328 src0, src1); 335 struct brw_reg src0, 348 struct brw_reg &op0 = is_int_div ? src1 : src0; 349 struct brw_reg &op1 = is_int_div ? src0 : src1; 301 generate_math2_gen7(vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument 313 generate_math2_gen6(vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument 333 generate_math2_gen4(vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument
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H A D | brw_blorp.h | 147 void setup(GLuint src0, GLuint dst0, GLuint dst1,
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/external/jpeg/ |
H A D | jccolor.c | 322 UINT32 src0 = *in++; local 326 *out0++ = PACK(B0(src0), B3(src0), B2(src1), B1(src2)); 327 *out1++ = PACK(B1(src0), B0(src1), B3(src1), B2(src2)); 328 *out2++ = PACK(B2(src0), B1(src1), B0(src2), B3(src2));
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/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
H A D | ir_to_mesa.cpp | 286 dst_reg dst, src_reg src0); 289 dst_reg dst, src_reg src0, src_reg src1); 293 src_reg src0, src_reg src1, src_reg src2); 300 src_reg src0, 305 dst_reg dst, src_reg src0); 308 dst_reg dst, src_reg src0, src_reg src1); 351 src_reg src0, src_reg src1, src_reg src2) 361 num_reladdr += src0.reladdr != NULL; 367 reladdr_to_temp(ir, &src0, &num_reladdr); 377 inst->src[0] = src0; 349 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0, src_reg src1, src_reg src2) argument 389 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0, src_reg src1) argument 396 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0) argument 410 emit_dp(ir_instruction *ir, dst_reg dst, src_reg src0, src_reg src1, unsigned elements) argument 444 src_reg src0 = orig_src0; local 475 emit_scalar(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0) argument 527 src_reg src0 = src; local [all...] |
/external/mesa3d/src/mesa/program/ |
H A D | ir_to_mesa.cpp | 286 dst_reg dst, src_reg src0); 289 dst_reg dst, src_reg src0, src_reg src1); 293 src_reg src0, src_reg src1, src_reg src2); 300 src_reg src0, 305 dst_reg dst, src_reg src0); 308 dst_reg dst, src_reg src0, src_reg src1); 351 src_reg src0, src_reg src1, src_reg src2) 361 num_reladdr += src0.reladdr != NULL; 367 reladdr_to_temp(ir, &src0, &num_reladdr); 377 inst->src[0] = src0; 349 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0, src_reg src1, src_reg src2) argument 389 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0, src_reg src1) argument 396 emit(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0) argument 410 emit_dp(ir_instruction *ir, dst_reg dst, src_reg src0, src_reg src1, unsigned elements) argument 444 src_reg src0 = orig_src0; local 475 emit_scalar(ir_instruction *ir, enum prog_opcode op, dst_reg dst, src_reg src0) argument 527 src_reg src0 = src; local [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
H A D | st_glsl_to_tgsi.cpp | 371 st_dst_reg dst, st_src_reg src0); 374 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 378 st_src_reg src0, st_src_reg src1, st_src_reg src2); 382 st_src_reg src0, st_src_reg src1); 389 st_src_reg src0, 394 st_dst_reg dst, st_src_reg src0); 397 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 401 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0); 491 st_src_reg src0, st_src_reg src1, st_src_reg src2) 496 op = get_opcode(ir, op, dst, src0, src 489 emit(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1, st_src_reg src2) argument 586 emit(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1) argument 593 emit(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0) argument 630 get_opcode(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1) argument 683 emit_dp(ir_instruction *ir, st_dst_reg dst, st_src_reg src0, st_src_reg src1, unsigned elements) argument 717 st_src_reg src0 = orig_src0; local 748 emit_scalar(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0) argument 759 emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0) argument 812 st_src_reg src0 = src; local 3686 st_src_reg coord, src0; local 3817 st_src_reg coord, src0; local [all...] |
/external/mesa3d/src/mesa/state_tracker/ |
H A D | st_glsl_to_tgsi.cpp | 371 st_dst_reg dst, st_src_reg src0); 374 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 378 st_src_reg src0, st_src_reg src1, st_src_reg src2); 382 st_src_reg src0, st_src_reg src1); 389 st_src_reg src0, 394 st_dst_reg dst, st_src_reg src0); 397 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 401 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0); 491 st_src_reg src0, st_src_reg src1, st_src_reg src2) 496 op = get_opcode(ir, op, dst, src0, src 489 emit(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1, st_src_reg src2) argument 586 emit(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1) argument 593 emit(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0) argument 630 get_opcode(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1) argument 683 emit_dp(ir_instruction *ir, st_dst_reg dst, st_src_reg src0, st_src_reg src1, unsigned elements) argument 717 st_src_reg src0 = orig_src0; local 748 emit_scalar(ir_instruction *ir, unsigned op, st_dst_reg dst, st_src_reg src0) argument 759 emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0) argument 812 st_src_reg src0 = src; local 3686 st_src_reg coord, src0; local 3817 st_src_reg coord, src0; local [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_peephole.cpp | 274 ImmediateValue src0, src1; local 277 i->src(0).getImmediate(src0) && i->src(1).getImmediate(src1)) 278 expr(i, src0, src1); 280 if (i->srcExists(0) && i->src(0).getImmediate(src0)) 281 opnd(i, src0, 0); 512 ImmediateValue src0; local 513 if (i->src(0).getImmediate(src0)) 514 expr(i, src0, *i->getSrc(1)->asImm()); 952 Value *src0 = sub->getSrc(0); 959 src0 980 Value *src0 = add->getSrc(0); local 999 Value *src0 = add->getSrc(0); local 1057 Value *src0 = minmax->getSrc(0); local 1111 Value *src0 = logop->getSrc(0); local [all...] |
H A D | nv50_ir_build_util.h | 271 Value *src0, Value *src1) 273 mkOp2(op, ty, dst, src0, src1); 279 Value *src0, Value *src1, Value *src2) 281 mkOp3(op, ty, dst, src0, src1, src2); 270 mkOp2v(operation op, DataType ty, Value *dst, Value *src0, Value *src1) argument 278 mkOp3v(operation op, DataType ty, Value *dst, Value *src0, Value *src1, Value *src2) argument
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_peephole.cpp | 274 ImmediateValue src0, src1; local 277 i->src(0).getImmediate(src0) && i->src(1).getImmediate(src1)) 278 expr(i, src0, src1); 280 if (i->srcExists(0) && i->src(0).getImmediate(src0)) 281 opnd(i, src0, 0); 512 ImmediateValue src0; local 513 if (i->src(0).getImmediate(src0)) 514 expr(i, src0, *i->getSrc(1)->asImm()); 952 Value *src0 = sub->getSrc(0); 959 src0 980 Value *src0 = add->getSrc(0); local 999 Value *src0 = add->getSrc(0); local 1057 Value *src0 = minmax->getSrc(0); local 1111 Value *src0 = logop->getSrc(0); local [all...] |
H A D | nv50_ir_build_util.h | 271 Value *src0, Value *src1) 273 mkOp2(op, ty, dst, src0, src1); 279 Value *src0, Value *src1, Value *src2) 281 mkOp3(op, ty, dst, src0, src1, src2); 270 mkOp2v(operation op, DataType ty, Value *dst, Value *src0, Value *src1) argument 278 mkOp3v(operation op, DataType ty, Value *dst, Value *src0, Value *src1, Value *src2) argument
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/external/chromium_org/third_party/libvpx/source/libvpx/vp9/encoder/x86/ |
H A D | vp9_variance_sse2.c | 45 const __m128i src0 = _mm_unpacklo_epi8(READ64(src, src_stride, 0), zero); local 49 const __m128i diff0 = _mm_sub_epi16(src0, ref0); 78 const __m128i src0 = _mm_unpacklo_epi8(_mm_loadl_epi64( local 82 const __m128i diff0 = _mm_sub_epi16(src0, ref0); 122 const __m128i src0 = _mm_unpacklo_epi8(s, zero); local 124 const __m128i diff0 = _mm_sub_epi16(src0, ref0);
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/ |
H A D | i915_program.c | 144 GLuint saturate, GLuint src0, GLuint src1, GLuint src2) 153 if (GET_UREG_TYPE(src0) == REG_TYPE_CONST) 168 s[0] = src0; 184 src0 = s[0]; 195 *(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0)); 196 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1)); 140 i915_emit_arith(struct i915_fragment_program * p, GLuint op, GLuint dest, GLuint mask, GLuint saturate, GLuint src0, GLuint src1, GLuint src2) argument
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H A D | i915_program.h | 125 GLuint src0, GLuint src1, GLuint src2);
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
H A D | i915_program.c | 144 GLuint saturate, GLuint src0, GLuint src1, GLuint src2) 153 if (GET_UREG_TYPE(src0) == REG_TYPE_CONST) 168 s[0] = src0; 184 src0 = s[0]; 195 *(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0)); 196 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1)); 140 i915_emit_arith(struct i915_fragment_program * p, GLuint op, GLuint dest, GLuint mask, GLuint saturate, GLuint src0, GLuint src1, GLuint src2) argument
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H A D | i915_program.h | 125 GLuint src0, GLuint src1, GLuint src2);
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
H A D | radeon_program_alu.c | 278 struct rc_src_register src0 = inst->U.I.SrcReg[0]; local 280 src0.Negate &= ~(RC_MASK_Z | RC_MASK_W); 281 src0.Swizzle &= ~(63 << (3 * 2)); 282 src0.Swizzle |= (RC_SWIZZLE_ZERO << (3 * 2)) | (RC_SWIZZLE_ZERO << (3 * 3)); 286 emit2(c, inst->Prev, RC_OPCODE_DP3, &inst->U.I, inst->U.I.DstReg, src0, src1); 293 struct rc_src_register src0 = inst->U.I.SrcReg[0]; local 294 src0.Negate &= ~RC_MASK_W; 295 src0.Swizzle &= ~(7 << (3 * 3)); 296 src0.Swizzle |= RC_SWIZZLE_ONE << (3 * 3); 297 emit2(c, inst->Prev, RC_OPCODE_DP4, &inst->U.I, inst->U.I.DstReg, src0, ins 744 struct rc_src_register src0 = inst->U.I.SrcReg[0]; local [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_program_alu.c | 278 struct rc_src_register src0 = inst->U.I.SrcReg[0]; local 280 src0.Negate &= ~(RC_MASK_Z | RC_MASK_W); 281 src0.Swizzle &= ~(63 << (3 * 2)); 282 src0.Swizzle |= (RC_SWIZZLE_ZERO << (3 * 2)) | (RC_SWIZZLE_ZERO << (3 * 3)); 286 emit2(c, inst->Prev, RC_OPCODE_DP3, &inst->U.I, inst->U.I.DstReg, src0, src1); 293 struct rc_src_register src0 = inst->U.I.SrcReg[0]; local 294 src0.Negate &= ~RC_MASK_W; 295 src0.Swizzle &= ~(7 << (3 * 3)); 296 src0.Swizzle |= RC_SWIZZLE_ONE << (3 * 3); 297 emit2(c, inst->Prev, RC_OPCODE_DP4, &inst->U.I, inst->U.I.DstReg, src0, ins 744 struct rc_src_register src0 = inst->U.I.SrcReg[0]; local [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
H A D | brw_vec4_emit.cpp | 303 struct brw_reg src0, 309 src0, src1); 315 struct brw_reg src0, 321 check_gen6_math_src_arg(src0); 328 src0, src1); 335 struct brw_reg src0, 348 struct brw_reg &op0 = is_int_div ? src1 : src0; 349 struct brw_reg &op1 = is_int_div ? src0 : src1; 301 generate_math2_gen7(vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument 313 generate_math2_gen6(vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument 333 generate_math2_gen4(vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) argument
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H A D | brw_blorp.h | 147 void setup(GLuint src0, GLuint dst0, GLuint dst1,
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/external/vixl/src/a64/ |
H A D | macro-assembler-a64.cc | 755 void MacroAssembler::Push(const CPURegister& src0, const CPURegister& src1, argument 758 VIXL_ASSERT(AreSameSizeAndType(src0, src1, src2, src3)); 759 VIXL_ASSERT(src0.IsValid()); 762 int size = src0.SizeInBytes(); 765 PushHelper(count, size, src0, src1, src2, src3); 796 const CPURegister& src0 = registers.PopHighestIndex(); local 801 PushHelper(count, size, src0, src1, src2, src3); 851 const CPURegister& src0, 858 VIXL_ASSERT(AreSameSizeAndType(src0, src1, src2, src3)); 859 VIXL_ASSERT(size == src0 850 PushHelper(int count, int size, const CPURegister& src0, const CPURegister& src1, const CPURegister& src2, const CPURegister& src3) argument [all...] |
/external/qemu/distrib/jpeg-6b/ |
H A D | jccolor.c | 415 UINT32 src0 = *in++; local 419 *out0++ = PACK(B0(src0), B3(src0), B2(src1), B1(src2)); 420 *out1++ = PACK(B1(src0), B0(src1), B3(src1), B2(src2)); 421 *out2++ = PACK(B2(src0), B1(src1), B0(src2), B3(src2));
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
H A D | r200_vertprog.h | 8 uint32_t src0; member in struct:__anon14492
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