Searched defs:bo (Results 51 - 75 of 213) sorted by last modified time

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/external/mesa3d/src/gallium/state_trackers/xorg/
H A Dxorg_driver.c1186 struct kms_bo *bo; local
1203 if (kms_bo_create(ms->kms, attr, &bo))
1206 if (kms_bo_get_prop(bo, KMS_PITCH, &stride))
1209 if (kms_bo_get_prop(bo, KMS_HANDLE, &handle))
1227 FatalError("%s: could not takedown old bo", __func__);
1232 ms->root_bo = bo;
1238 kms_bo_destroy(&bo);
/external/mesa3d/src/gallium/winsys/i915/drm/
H A Di915_drm_batchbuffer.c26 drm_intel_bo *bo; member in struct:i915_drm_batchbuffer
40 if (batch->bo)
41 drm_intel_bo_unreference(batch->bo);
42 batch->bo = drm_intel_bo_alloc(idws->gem_manager,
83 bos[0] = drm_batch->bo;
135 ret = drm_intel_bo_emit_reloc_fence(batch->bo, offset,
140 ret = drm_intel_bo_emit_reloc(batch->bo, offset,
179 ret = drm_intel_bo_subdata(batch->bo, 0, used, batch->base.map);
181 ret = drm_intel_bo_exec(batch->bo, used, NULL, 0, 0);
199 drm_intel_bo_wait_rendering(batch->bo);
[all...]
H A Di915_drm_buffer.c41 buf->bo = drm_intel_bo_alloc(idws->gem_manager,
44 if (!buf->bo)
73 buf->bo = drm_intel_bo_alloc_tiled(idws->gem_manager,
78 if (!buf->bo)
105 buf->bo = drm_intel_bo_gem_create_from_name(idws->gem_manager, "gallium3d_from_handle", whandle->handle);
109 if (!buf->bo)
112 drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle);
134 if (drm_intel_bo_flink(buf->bo, &buf->flink))
141 whandle->handle = buf->bo->handle;
157 drm_intel_bo *bo local
[all...]
H A Di915_drm_fence.c11 * been idled. If bo is NULL fence has expired.
16 drm_intel_bo *bo; member in struct:i915_drm_fence
21 i915_drm_fence_create(drm_intel_bo *bo) argument
26 /* bo is null if fence already expired */
27 if (bo) {
28 drm_intel_bo_reference(bo);
29 fence->bo = bo;
44 if (old->bo)
45 drm_intel_bo_unreference(old->bo);
[all...]
H A Di915_drm_winsys.h37 struct pipe_fence_handle * i915_drm_fence_create(drm_intel_bo *bo);
52 drm_intel_bo *bo; member in struct:i915_drm_buffer
70 return i915_drm_buffer(buffer)->bo;
/external/mesa3d/src/gallium/winsys/radeon/drm/
H A Dradeon_drm_bo.c97 static INLINE struct radeon_bo *radeon_bo(struct pb_buffer *bo) argument
99 assert(bo->vtbl == &radeon_bo_vtbl);
100 return (struct radeon_bo *)bo;
134 struct radeon_bo *bo = NULL; local
137 bo = radeon_bo(_buf);
144 bo = radeon_bo(base_buf);
147 return bo;
152 struct radeon_bo *bo = get_radeon_bo(_buf); local
154 while (p_atomic_read(&bo->num_active_ioctls)) {
159 /*if (bo
177 struct radeon_bo *bo = get_radeon_bo(_buf); local
366 struct radeon_bo *bo = radeon_bo(_buf); local
398 struct radeon_bo *bo = (struct radeon_bo*)buf; local
542 struct radeon_bo *bo; local
622 struct radeon_bo *bo = radeon_bo(_buf); local
718 struct radeon_bo *bo = get_radeon_bo(_buf); local
757 struct radeon_bo *bo = get_radeon_bo(_buf); local
850 struct radeon_bo *bo; local
947 struct radeon_bo *bo = get_radeon_bo(buffer); local
[all...]
H A Dradeon_drm_cs.c210 int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo) argument
214 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1);
219 if (reloc->handle == bo->handle) {
227 if (reloc->handle == bo->handle) {
238 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/
248 struct radeon_bo *bo,
255 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1);
262 if (reloc->handle == bo->handle) {
271 if (reloc->handle == bo->handle) {
275 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo
247 radeon_add_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo, enum radeon_bo_usage usage, enum radeon_bo_domain domains, enum radeon_bo_domain *added_domains) argument
320 struct radeon_bo *bo = (struct radeon_bo*)buf; local
383 struct radeon_bo *bo = (struct radeon_bo*)buf; local
538 struct radeon_bo *bo = (struct radeon_bo*)_buf; local
[all...]
H A Dradeon_drm_cs.h82 int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo);
92 struct radeon_bo *bo)
94 int num_refs = bo->num_cs_references;
95 return num_refs == bo->rws->num_cs ||
96 (num_refs && radeon_get_reloc(cs->csc, bo) != -1);
101 struct radeon_bo *bo)
105 if (!bo->num_cs_references)
108 index = radeon_get_reloc(cs->csc, bo);
116 radeon_bo_is_referenced_by_any_cs(struct radeon_bo *bo) argument
118 return bo
91 radeon_bo_is_referenced_by_cs(struct radeon_drm_cs *cs, struct radeon_bo *bo) argument
100 radeon_bo_is_referenced_by_cs_for_write(struct radeon_drm_cs *cs, struct radeon_bo *bo) argument
[all...]
/external/mesa3d/src/gbm/backends/dri/
H A Dgbm_dri.c304 struct gbm_dri_bo *bo = gbm_dri_bo(_bo); local
306 if (bo->image != NULL)
309 memcpy(bo->map, buf, count);
318 struct gbm_dri_bo *bo = gbm_dri_bo(_bo); local
321 if (bo->image != NULL) {
322 dri->image->destroyImage(bo->image);
324 munmap(bo->map, bo->size);
326 arg.handle = bo->handle;
330 free(bo);
364 struct gbm_dri_bo *bo; local
459 struct gbm_dri_bo *bo; local
518 struct gbm_dri_bo *bo; local
[all...]
H A Dgbm_driint.h94 gbm_dri_bo(struct gbm_bo *bo) argument
96 return (struct gbm_dri_bo *) bo;
/external/mesa3d/src/gbm/main/
H A Dgbm.c172 * \param bo The buffer object
177 gbm_bo_get_width(struct gbm_bo *bo) argument
179 return bo->width;
184 * \param bo The buffer object
188 gbm_bo_get_height(struct gbm_bo *bo) argument
190 return bo->height;
198 * \param bo The buffer object
202 gbm_bo_get_stride(struct gbm_bo *bo) argument
204 return bo->stride;
211 * \param bo Th
215 gbm_bo_get_format(struct gbm_bo *bo) argument
229 gbm_bo_get_handle(struct gbm_bo *bo) argument
248 gbm_bo_write(struct gbm_bo *bo, const void *buf, size_t count) argument
259 gbm_bo_get_device(struct gbm_bo *bo) argument
272 gbm_bo_set_user_data(struct gbm_bo *bo, void *data, void (*destroy_user_data)(struct gbm_bo *, void *)) argument
288 gbm_bo_get_user_data(struct gbm_bo *bo) argument
300 gbm_bo_destroy(struct gbm_bo *bo) argument
447 gbm_surface_release_buffer(struct gbm_surface *surf, struct gbm_bo *bo) argument
[all...]
/external/mesa3d/src/mesa/drivers/dri/i915/
H A Dintel_buffer_objects.c206 drm_intel_bo_references(intel->batch.bo, intel_obj->buffer);
210 /* Replace the current busy bo with fresh data. */
256 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) {
328 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) {
491 if (!intel->upload.bo)
495 drm_intel_bo_subdata(intel->upload.bo,
502 drm_intel_bo_unreference(intel->upload.bo);
503 intel->upload.bo = NULL;
513 intel->upload.bo = drm_intel_bo_alloc(intel->bufmgr, "upload", size, 0);
525 if (intel->upload.bo
729 drm_intel_bo *bo = intel_bufferobj_buffer(intel, intel_obj, INTEL_READ); local
[all...]
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_context.h627 drm_intel_bo *bo; member in struct:brw_cache
682 drm_intel_bo *bo; member in struct:brw_vertex_buffer
711 drm_intel_bo *bo; member in struct:brw_query_object
712 /** First index in bo with query data for this object. */
714 /** Last index in bo with query data for this object. */
786 drm_intel_bo *bo; member in struct:brw_context::__anon27746
1038 drm_intel_bo *bo; member in struct:brw_context::__anon27756
1258 drm_intel_bo_emit_reloc(intel->batch.bo,
1260 brw->cache.bo,
1264 return brw->cache.bo
[all...]
H A Dbrw_draw_upload.c324 &buffer->bo, &buffer->offset);
337 &buffer->bo, &buffer->offset);
348 &buffer->bo, &buffer->offset);
430 buffer->bo = intel_bufferobj_source(intel,
433 drm_intel_bo_reference(buffer->bo);
454 assert(input->offset < brw->vb.buffers[input->buffer].bo->size);
541 if (brw->vb.current_buffers[i].handle != brw->vb.buffers[i].bo->handle ||
558 drm_intel_bo_unreference(brw->vb.buffers[j].bo);
640 OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset);
642 OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTE
796 drm_intel_bo *bo = NULL; local
[all...]
H A Dbrw_sf_state.c145 drm_intel_bo *bo = intel->batch.bo; local
193 sf->sf5.sf_viewport_state_offset = (intel->batch.bo->offset +
306 drm_intel_bo_emit_reloc(bo, (brw->sf.state_offset +
308 intel->batch.bo, (brw->sf.vp_offset |
H A Dbrw_vtbl.c58 dri_bo_release(drm_intel_bo **bo) argument
60 drm_intel_bo_unreference(*bo);
61 *bo = NULL;
H A Dbrw_wm_surface_state.c724 drm_intel_bo *bo = intel_obj ? intel_obj->buffer : NULL; local
743 if (bo) {
744 surf[1] = bo->offset; /* reloc */
747 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
749 bo, 0, I915_GEM_DOMAIN_SAMPLER, 0);
800 surf[1] = intelObj->mt->region->bo->offset + intelObj->mt->offset; /* reloc */
816 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
818 intelObj->mt->region->bo,
829 drm_intel_bo *bo,
848 surf[1] = bo
828 brw_create_constant_surface(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, int width, uint32_t *out_offset) argument
883 drm_intel_bo *bo = local
1042 drm_intel_bo *bo = NULL; local
1369 drm_intel_bo *bo = intel_bufferobj_buffer(intel, intel_bo, INTEL_READ); local
[all...]
H A Dgen7_sol_state.c58 drm_intel_bo *bo; local
76 bo = intel_bufferobj_buffer(intel, bufferobj, INTEL_WRITE_PART);
82 assert(end <= bo->size);
94 OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, start);
95 OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, end);
H A Dgen7_wm_surface_state.c127 assert ((mcs_mt->region->bo->offset & 0xfff) == 0);
130 surf->ss6.mcs_enabled.mcs_base_address = mcs_mt->region->bo->offset >> 12;
131 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
134 mcs_mt->region->bo,
242 drm_intel_bo *bo = intel_obj ? intel_obj->buffer : NULL; local
260 if (bo) {
261 surf->ss1.base_addr = bo->offset; /* reloc */
267 drm_intel_bo_emit_reloc(brw->intel.batch.bo,
270 bo, 0,
352 intelObj->mt->region->bo
404 gen7_create_constant_surface(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, int width, uint32_t *out_offset) argument
[all...]
H A Dintel_buffer_objects.c206 drm_intel_bo_references(intel->batch.bo, intel_obj->buffer);
210 /* Replace the current busy bo with fresh data. */
256 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) {
328 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) {
491 if (!intel->upload.bo)
495 drm_intel_bo_subdata(intel->upload.bo,
502 drm_intel_bo_unreference(intel->upload.bo);
503 intel->upload.bo = NULL;
513 intel->upload.bo = drm_intel_bo_alloc(intel->bufmgr, "upload", size, 0);
525 if (intel->upload.bo
729 drm_intel_bo *bo = intel_bufferobj_buffer(intel, intel_obj, INTEL_READ); local
[all...]
/external/mesa3d/src/mesa/drivers/dri/intel/
H A Dintel_buffer_objects.c206 drm_intel_bo_references(intel->batch.bo, intel_obj->buffer);
210 /* Replace the current busy bo with fresh data. */
256 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) {
328 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) {
491 if (!intel->upload.bo)
495 drm_intel_bo_subdata(intel->upload.bo,
502 drm_intel_bo_unreference(intel->upload.bo);
503 intel->upload.bo = NULL;
513 intel->upload.bo = drm_intel_bo_alloc(intel->bufmgr, "upload", size, 0);
525 if (intel->upload.bo
729 drm_intel_bo *bo = intel_bufferobj_buffer(intel, intel_obj, INTEL_READ); local
[all...]
H A Dintel_context.h114 drm_intel_bo *bo; member in struct:intel_sync_object
121 drm_intel_bo *bo; member in struct:intel_batchbuffer
202 drm_intel_bo *bo,
255 drm_intel_bo *bo; member in struct:intel_context::__anon27885
H A Dintel_mipmap_tree.h77 drm_intel_bo *bo; member in struct:intel_miptree_map
264 /* Offset into region bo where miptree starts:
H A Dintel_regions.h61 drm_intel_bo *bo; /**< buffer manager's buffer */ member in struct:intel_region
72 uint32_t name; /**< Global name for the bo */
/external/mesa3d/src/mesa/drivers/dri/nouveau/
H A Dnouveau_array.h39 struct nouveau_bo *bo; member in struct:nouveau_array

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