/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDILUtilityFunctions.h | 18 #define ExpandCaseTo32bitIntTypes(Instr) \ 19 case Instr##_i32: 21 #define ExpandCaseTo32bitIntTruncTypes(Instr) \ 22 case Instr##_i32i8: \ 23 case Instr##_i32i16: 25 #define ExpandCaseToIntTypes(Instr) \ 26 ExpandCaseTo32bitIntTypes(Instr) 28 #define ExpandCaseToIntTruncTypes(Instr) \ 29 ExpandCaseTo32bitIntTruncTypes(Instr) 31 #define ExpandCaseToFloatTypes(Instr) \ [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDILUtilityFunctions.h | 18 #define ExpandCaseTo32bitIntTypes(Instr) \ 19 case Instr##_i32: 21 #define ExpandCaseTo32bitIntTruncTypes(Instr) \ 22 case Instr##_i32i8: \ 23 case Instr##_i32i16: 25 #define ExpandCaseToIntTypes(Instr) \ 26 ExpandCaseTo32bitIntTypes(Instr) 28 #define ExpandCaseToIntTruncTypes(Instr) \ 29 ExpandCaseTo32bitIntTruncTypes(Instr) 31 #define ExpandCaseToFloatTypes(Instr) \ [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMFeatures.h | 22 bool IsCPSRDead(InstrType *Instr); 25 inline bool isV8EligibleForIT(InstrType *Instr) { argument 26 switch (Instr->getOpcode()) { 53 return IsCPSRDead(Instr); 79 return Instr->getOperand(2).getReg() != ARM::PC; 84 return Instr->getOperand(0).getReg() != ARM::PC; 86 return Instr->getOperand(0).getReg() != ARM::PC && 87 Instr->getOperand(2).getReg() != ARM::PC; 90 return Instr->getOperand(0).getReg() != ARM::PC && 91 Instr [all...] |
/external/llvm/lib/Transforms/Utils/ |
H A D | BypassSlowDivision.cpp | 85 Instruction *Instr = J; local 86 Value *Dividend = Instr->getOperand(0); 87 Value *Divisor = Instr->getOperand(1); 142 PHINode *QuoPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2); 145 PHINode *RemPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2); 149 // Replace Instr with appropriate phi node 151 Instr->replaceAllUsesWith(QuoPhi); 153 Instr->replaceAllUsesWith(RemPhi); 154 Instr->eraseFromParent(); 193 Instruction *Instr local [all...] |
/external/chromium_org/v8/src/mips/ |
H A D | assembler-mips.h | 544 static const int kInstrSize = sizeof(Instr); 1040 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } 1041 static void instr_at_put(byte* pc, Instr instr) { 1042 *reinterpret_cast<Instr*>(pc) = instr; 1044 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } 1045 void instr_at_put(int pos, Instr instr) { 1046 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; 1050 static bool IsBranch(Instr inst [all...] |
H A D | constants-mips.h | 227 typedef int32_t Instr; typedef in namespace:v8::internal 707 extern const Instr kPopInstruction; 709 extern const Instr kPushInstruction; 711 extern const Instr kPushRegPattern; 713 extern const Instr kPopRegPattern; 714 extern const Instr kLwRegFpOffsetPattern; 715 extern const Instr kSwRegFpOffsetPattern; 716 extern const Instr kLwRegFpNegOffsetPattern; 717 extern const Instr kSwRegFpNegOffsetPattern; 719 extern const Instr kRtMas [all...] |
H A D | assembler-mips.cc | 218 Instr* pc = reinterpret_cast<Instr*>(pc_); 219 Instr* instr = reinterpret_cast<Instr*>(instructions); 275 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift) 279 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift) 283 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift) 286 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift) 289 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift) 292 const Instr kSwRegFpOffsetPatter [all...] |
/external/llvm/lib/Target/R600/ |
H A D | R600OptimizeVectorRegisters.cpp | 63 MachineInstr *Instr; member in class:__anon26117::RegSeqInfo 66 RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) { 68 for (unsigned i = 1, e = Instr->getNumOperands(); i < e; i+=2) { 69 MachineOperand &MO = Instr->getOperand(i); 70 unsigned Chan = Instr->getOperand(i + 1).getImm(); 80 return RSI.Instr == Instr; 180 unsigned Reg = RSI->Instr->getOperand(0).getReg(); 181 MachineBasicBlock::iterator Pos = RSI->Instr; 185 unsigned SrcVec = BaseRSI->Instr [all...] |
/external/chromium_org/v8/src/arm64/ |
H A D | instructions-arm64.h | 19 typedef uint32_t Instr; typedef in namespace:v8::internal 99 V8_INLINE Instr InstructionBits() const { 100 return *reinterpret_cast<const Instr*>(this); 103 V8_INLINE void SetInstructionBits(Instr new_instr) { 104 *reinterpret_cast<Instr*>(this) = new_instr; 120 Instr Mask(uint32_t mask) const { 410 const Instr kImmExceptionIsRedirectedCall = 0xca11; 414 const Instr kImmExceptionIsUnreachable = 0xdebf; 418 const Instr kImmExceptionIsPrintf = 0xdeb1; 453 const Instr kImmExceptionIsDebu [all...] |
H A D | assembler-arm64-inl.h | 992 Instr Assembler::Flags(FlagsUpdate S) { 1003 Instr Assembler::Cond(Condition cond) { 1008 Instr Assembler::ImmPCRelAddress(int imm21) { 1010 Instr imm = static_cast<Instr>(truncate_to_int21(imm21)); 1011 Instr immhi = (imm >> ImmPCRelLo_width) << ImmPCRelHi_offset; 1012 Instr immlo = imm << ImmPCRelLo_offset; 1017 Instr Assembler::ImmUncondBranch(int imm26) { 1023 Instr Assembler::ImmCondBranch(int imm19) { 1029 Instr Assemble [all...] |
H A D | assembler-arm64.h | 1722 void dci(Instr raw_inst) { Emit(raw_inst); } 1741 void debug(const char* message, uint32_t code, Instr params = BREAK); 1762 static Instr Rd(CPURegister rd) { 1767 static Instr Rn(CPURegister rn) { 1772 static Instr Rm(CPURegister rm) { 1777 static Instr Ra(CPURegister ra) { 1782 static Instr Rt(CPURegister rt) { 1787 static Instr Rt2(CPURegister rt2) { 1794 static Instr RdSP(Register rd) { 1799 static Instr RnS [all...] |
/external/chromium_org/v8/src/arm/ |
H A D | assembler-arm.h | 532 int instructions_required(const Assembler* assembler, Instr instr = 0) const; 798 static const int kInstrSize = sizeof(Instr); 1406 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } 1407 void instr_at_put(int pos, Instr instr) { 1408 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; 1410 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } 1411 static void instr_at_put(byte* pc, Instr instr) { 1412 *reinterpret_cast<Instr*>(p [all...] |
H A D | assembler-arm.cc | 241 Instr* pc = reinterpret_cast<Instr*>(pc_); 242 Instr* instr = reinterpret_cast<Instr*>(instructions); 404 const Instr kPushRegPattern = 408 const Instr kPopRegPattern = 411 const Instr kLdrPCImmedMask = 15 * B24 | 7 * B20 | 15 * B16; 412 const Instr kLdrPCImmedPattern = 5 * B24 | L | kRegister_pc_Code * B16; 414 const Instr kLdrPpImmedMask = 15 * B24 | 7 * B20 | 15 * B16; 415 const Instr kLdrPpImmedPatter [all...] |
H A D | constants-arm.h | 55 // General constants are in an anonymous enum in class Instr. 120 // Instr is merely used by the Assembler to distinguish 32bit integers 124 typedef int32_t Instr; typedef in namespace:v8::internal 413 // Note that the Assembler uses typedef int32_t Instr. 435 static inline return_type Name(Instr instr) { \ 443 inline Instr InstructionBits() const { 444 return *reinterpret_cast<const Instr*>(this); 448 inline void SetInstructionBits(Instr value) { 449 *reinterpret_cast<Instr*>(this) = value; 470 static inline int Bit(Instr inst [all...] |
H A D | assembler-arm-inl.h | 304 Instr current_instr = Assembler::instr_at(pc_); 305 Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize); 315 Instr current_instr = Assembler::instr_at(pc_); 416 void Assembler::emit(Instr x) { 418 *reinterpret_cast<Instr*>(pc_) = x; 458 Instr candidate_instr(Memory::int32_at(candidate)); 557 Instr mov_instr = instr_at(pc); 558 Instr orr_instr_1 = instr_at(pc + kInstrSize); 559 Instr orr_instr_2 = instr_at(pc + 2 * kInstrSize); 560 Instr orr_instr_ [all...] |
/external/chromium_org/v8/src/mips64/ |
H A D | assembler-mips64.h | 534 static const int kInstrSize = sizeof(Instr); 1076 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } 1077 static void instr_at_put(byte* pc, Instr instr) { 1078 *reinterpret_cast<Instr*>(pc) = instr; 1080 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } 1081 void instr_at_put(int pos, Instr instr) { 1082 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; 1086 static bool IsBranch(Instr inst [all...] |
H A D | assembler-mips64.cc | 196 Instr* pc = reinterpret_cast<Instr*>(pc_); 197 Instr* instr = reinterpret_cast<Instr*>(instructions); 253 const Instr kPopInstruction = DADDIU | (kRegister_sp_Code << kRsShift) 257 const Instr kPushInstruction = DADDIU | (kRegister_sp_Code << kRsShift) 261 const Instr kPushRegPattern = SD | (kRegister_sp_Code << kRsShift) 264 const Instr kPopRegPattern = LD | (kRegister_sp_Code << kRsShift) 267 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift) 270 const Instr kSwRegFpOffsetPatter [all...] |
H A D | constants-mips64.h | 189 typedef int32_t Instr; typedef in namespace:v8::internal 721 extern const Instr kPopInstruction; 723 extern const Instr kPushInstruction; 725 extern const Instr kPushRegPattern; 727 extern const Instr kPopRegPattern; 728 extern const Instr kLwRegFpOffsetPattern; 729 extern const Instr kSwRegFpOffsetPattern; 730 extern const Instr kLwRegFpNegOffsetPattern; 731 extern const Instr kSwRegFpNegOffsetPattern; 733 extern const Instr kRtMas [all...] |
/external/vixl/src/a64/ |
H A D | assembler-a64.h | 1375 inline void dci(Instr raw_inst) { Emit(raw_inst); } 1402 static Instr Rd(CPURegister rd) { 1407 static Instr Rn(CPURegister rn) { 1412 static Instr Rm(CPURegister rm) { 1417 static Instr Ra(CPURegister ra) { 1422 static Instr Rt(CPURegister rt) { 1427 static Instr Rt2(CPURegister rt2) { 1434 static Instr RdSP(Register rd) { 1439 static Instr RnSP(Register rn) { 1445 static Instr Flag [all...] |
H A D | debugger-a64.h | 58 const Instr kUnreachableOpcode = 0xdeb0; 66 const Instr kTraceOpcode = 0xdeb2; 75 const Instr kLogOpcode = 0xdeb3;
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H A D | instructions-a64.cc | 191 Instr imm = Assembler::ImmPCRelAddress(target - this); 199 Instr branch_imm = 0; 232 Instr imm = Assembler::ImmLLiteral(offset); 233 Instr mask = ImmLLiteral_mask;
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H A D | instructions-a64.h | 37 typedef uint32_t Instr; typedef in namespace:vixl 156 inline Instr InstructionBits() const { 157 return *(reinterpret_cast<const Instr*>(this)); 160 inline void SetInstructionBits(Instr new_instr) { 161 *(reinterpret_cast<Instr*>(this)) = new_instr; 177 inline Instr Mask(uint32_t mask) const {
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64PromoteConstant.cpp | 239 static bool shouldConvertUse(const Constant *Cst, const Instruction *Instr, argument 243 if (isa<const ShuffleVectorInst>(Instr) && OpIdx == 2) 247 if (isa<const ExtractValueInst>(Instr) && OpIdx > 0) 251 if (isa<const InsertValueInst>(Instr) && OpIdx > 1) 254 if (isa<const AllocaInst>(Instr) && OpIdx > 0) 258 if (isa<const LoadInst>(Instr) && OpIdx > 0) 262 if (isa<const StoreInst>(Instr) && OpIdx > 1) 266 if (isa<const GetElementPtrInst>(Instr) && OpIdx > 0) 271 if (isa<const LandingPadInst>(Instr)) 275 if (isa<const SwitchInst>(Instr)) [all...] |
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXImageOptimizer.cpp | 61 Instruction &Instr = *I; local 69 Changed |= replaceIsTypePSampler(Instr); 72 Changed |= replaceIsTypePSurface(Instr); 75 Changed |= replaceIsTypePTexture(Instr);
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/external/openssl/crypto/des/times/ |
H A D | aix.cc | 6 Data/Instr Cache : 16 K
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