/external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
H A D | armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S | 78 #define dX0 D0.S32 define 110 VLD1 dX0,[pSrc],pointStep 116 VHADD dY0,dX0,dX1 117 VHSUB dY1,dX0,dX1 121 VADD dY0,dX0,dX1 122 VSUB dY1,dX0,dX1
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H A D | omxSP_FFTFwd_RToCCS_S16S32_Sfs_s.S | 73 #define dX0 D0.S16 define 107 VLD1 dX0[0],[pSrc] 108 VMOVL qY0,dX0 128 VMOVL qX0,dX0 135 VLD1 dX0,[pSrc]! 137 VMOVL qX0,dX0
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H A D | armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S | 70 #define dX0 D0.F32 define 102 VLD1 dX0,[pSrc],pointStep 106 VADD dY0,dX0,dX1 107 VSUB dY1,dX0,dX1
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H A D | omxSP_FFTInv_CCSToR_S32S16_Sfs_s.S | 77 #define dX0 D0.S32 define 116 VLD1 dX0[0],[pDst] 124 VLD1 dX0,[pDst] 131 VLD1 {dX0,dX01},[pDst]!
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H A D | armSP_FFT_CToC_SC16_Radix2_fs_unsafe_s.S | 78 #define dX0 D0.S16 define 120 VHADD dY0,dX0,dX1 121 VHSUB dY1,dX0,dX1 125 VADD dY0,dX0,dX1 126 VSUB dY1,dX0,dX1
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H A D | armSP_FFT_CToC_SC16_Radix2_ps_unsafe_s.S | 78 #define dX0 D2.S16 define 124 VLD1 dX0,[pSrc]! @// point0: of set0,set1 of grp0 155 VHSUB dY0,dX0,dX1 156 VHADD dY1,dX0,dX1 162 VSUB dY0,dX0,dX1 163 VADD dY1,dX0,dX1
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H A D | armSP_FFT_CToC_SC16_Radix2_unsafe_s.S | 79 #define dX0 D2.S16 define 133 VLD2 {dX0,dX1},[pSrc],pointStep @// point0: dX0-real part dX1-img part 157 VHSUB dY0,dX0,dX2 159 VHADD dY2,dX0,dX2 163 VSUB dY0,dX0,dX2 165 VADD dY2,dX0,dX2
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H A D | armSP_FFT_CToC_SC32_Radix2_unsafe_s.S | 81 #define dX0 D2.S32 define 134 VLD2 {dX0,dX1},[pSrc],pointStep @// point0: dX0-real part dX1-img part 158 VHSUB dY0,dX0,dX2 160 VHADD dY2,dX0,dX2 164 VSUB dY0,dX0,dX2 166 VADD dY2,dX0,dX2
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H A D | armSP_FFT_CToC_FC32_Radix2_unsafe_s.S | 73 #define dX0 D2.F32 define 127 @// point0: dX0-real part dX1-img part 128 VLD2 {dX0,dX1},[pSrc],pointStep 149 VSUB dY0,dX0,qT0 151 VADD dY2,dX0,qT0
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H A D | armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S | 95 #define dX0 D0.S32 define 157 VLD1 dX0,[pSrc],step 166 VHADD dY0,dX0,dX1 @// [b+d | a+c] 167 VHSUB dY1,dX0,dX1 @// [b-d | a-c] 171 VHSUB dX0,dY0,dY1 175 VSUB dX0,dY0,dY1 182 VST1 dX0[0],[pOut1]!
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H A D | omxSP_FFTInv_CCSToR_S32_Sfs_s.S | 114 #define dX0 D0.S32 define 174 VLD1 dX0[0],[pSrc] 177 VRSHL dX0,dShift 178 VST1 dX0[0],[pDst] 213 VLD1 dX0,[pSrc] 214 VST1 dX0,[pDst] 373 VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer 375 VRSHL dX0,dShift 376 VST1 {dX0},[pSrc]!
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H A D | omxSP_FFTFwd_CToC_FC32_Sfs_s.S | 83 #define dX0 D0.F32 define 116 VLD1 dX0,[pSrc] 117 VST1 dX0,[pDst]
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H A D | armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S | 88 #define dX0 D0.F32 define 152 VLD1 dX0,[pSrc],step 162 VADD dY0,dX0,dX1 @// [b+d | a+c] 163 VSUB dY1,dX0,dX1 @// [b-d | a-c] 170 VSUB dX0,dY0,dY1 176 VST1 dX0[0],[pOut1]!
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H A D | omxSP_FFTFwd_CToC_SC32_Sfs_s.S | 99 #define dX0 D0.S32 define 136 VLD1 dX0,[pSrc] 137 VST1 dX0,[pDst] 319 VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer 321 VRSHL dX0,dShift 322 VST1 {dX0},[pSrc]!
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H A D | omxSP_FFTInv_CToC_SC32_Sfs_s.S | 100 #define dX0 D0.S32 define 139 VLD1 dX0,[pSrc] 140 VST1 dX0,[pDst] 299 VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer 301 VRSHL dX0,dShift 302 VST1 {dX0},[pSrc]!
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H A D | omxSP_FFTFwd_RToCCS_S32_Sfs_s.S | 108 #define dX0 d0.s32 define 168 VLD1 dX0[0],[pSrc] 173 VRSHL dX0,dShift 175 VST3 {dX0[0],dzero[0],dZero[0]},[pDst] 197 VLD1 dX0,[pSrc] 198 VST1 dX0,[pOut] 384 VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer 386 VRSHL dX0,dShift 387 VST1 {dX0},[pSrc]!
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H A D | omxSP_FFTInv_CCSToR_F32_Sfs_s.S | 97 #define dX0 D0.F32 define 164 VLD1 dX0[0],[pSrc] 165 VST1 dX0[0],[pDst] 194 VLD1 dX0,[pSrc] 195 VST1 dX0,[pDst]
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H A D | omxSP_FFTInv_CToC_FC32_Sfs_s.S | 83 #define dX0 D0.F32 define 125 VLD1 dX0,[pSrc] 126 VST1 dX0,[pDst]
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H A D | omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 94 #define dX0 d0.f32 define 154 VLD1 dX0[0],[pSrc] 158 VST3 {dX0[0],dzero[0],dZero[0]},[pDst] 179 VLD1 dX0,[pSrc] 180 VST1 dX0,[pOut]
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H A D | armSP_FFTInv_CCSToR_S16_preTwiddleRadix2_unsafe_s.S | 72 #define dX0 D0.S16 define 151 VHADD dY0,dX0,dX1 @ [b+d | a+c] 152 VHSUB dY1,dX0,dX1 @ [b-d | a-c] 156 VHSUB dX0,dY0,dY1 160 VSUB dX0,dY0,dY1 166 VST1 dX0[0],[pOut1]! 271 VHADD dY0,dX0,dX1 @ [b+d | a+c] 272 VHSUB dY1,dX0,dX1 @ [b-d | a-c] 276 VHSUB dX0,dY0,dY1 280 VSUB dX0,dY [all...] |
H A D | omxSP_FFTInv_CCSToR_S16_Sfs_s.S | 86 #define dX0 D0.S32 define 283 VLD1 {dX0[0]},[pSrc] @ pSrc contains pDst pointer 285 VRSHL dX0,dShift 286 VST1 {dX0[0]},[pSrc]!
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H A D | omxSP_FFTFwd_CToC_SC16_Sfs_s.S | 101 #define dX0 D0.S16 define 342 VRSHL dX0,dShift
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/external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
H A D | armSP_FFT_CToC_FC32_Radix2_fs_s.S | 70 #define dX0 v0.2s define 103 LD1 {dX0},[pSrc],pointStep 108 fadd dY0,dX0,dX1 109 fsub dY1,dX0,dX1
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H A D | armSP_FFT_CToC_FC32_Radix2_s.S | 73 #define dX0 v2.2s define 130 // point0: dX0-real part dX1-img part 131 LD2 {dX0,dX1},[pSrc],pointStep 152 fsub dY0,dX0,qT0 154 fadd dY2,dX0,qT0
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H A D | armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S | 73 #define dX0 v0.2s define 131 ld1 {dX0},[pSrc],step 141 fadd dY0,dX0,dX1 // [b+d | a+c] 142 fsub dY1,dX0,dX1 // [b-d | a-c] 152 fsub dX0,dY0,dY1
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