| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| H A D | armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S | 81 #define dY1 D3.S32 define
117 VHSUB dY1,dX0,dX1
122 VSUB dY1,dX0,dX1
128 VST1 dY1,[pDst],dstStep @// dstStep = step = -pointStep + 8
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| H A D | armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S | 73 #define dY1 D3.F32 define
107 VSUB dY1,dX0,dX1
111 VST1 dY1,[pDst],dstStep
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| H A D | armSP_FFT_CToC_SC16_Radix2_fs_unsafe_s.S | 81 #define dY1 D3.S16 define
121 VHSUB dY1,dX0,dX1
126 VSUB dY1,dX0,dX1
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| H A D | armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S | 92 #define dY1 D3.F32 define
163 VSUB dY1,dX0,dX1 @// [b-d | a-c]
165 VMUL dY1, dY1, half[0]
167 @// dY0= [a-c | a+c] ;dY1= [b-d | b+d]
168 VZIP dY0,dY1
170 VSUB dX0,dY0,dY1
172 VADD dX1,dY0,dY1
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| H A D | armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S | 99 #define dY1 D3.S32 define
167 VHSUB dY1,dX0,dX1 @// [b-d | a-c]
168 VZIP dY0,dY1 @// dY0= [a-c | a+c] ;dY1= [b-d | b+d]
171 VHSUB dX0,dY0,dY1
173 VHADD dX1,dY0,dY1
175 VSUB dX0,dY0,dY1
177 VADD dX1,dY0,dY1
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| H A D | armSP_FFT_CToC_FC32_Radix2_unsafe_s.S | 78 #define dY1 D7.F32 define
150 VSUB dY1,dX1,qT1
154 VST2 {dY0,dY1},[pDst],outPointStep
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| H A D | armSP_FFT_CToC_SC16_Radix2_ps_unsafe_s.S | 83 #define dY1 D7.S16 define
156 VHADD dY1,dX0,dX1
163 VADD dY1,dX0,dX1
172 VST1 dY1,[pDst],dstStep @// dstStep = -outPointStep + 8
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| H A D | armSP_FFT_CToC_SC16_Radix2_unsafe_s.S | 84 #define dY1 D7.S16 define
158 VHSUB dY1,dX1,dX3
164 VSUB dY1,dX1,dX3
170 VST2 {dY0,dY1},[pDst],outPointStep
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| H A D | armSP_FFT_CToC_SC32_Radix2_unsafe_s.S | 86 #define dY1 D7.S32 define
159 VHSUB dY1,dX1,dX3
165 VSUB dY1,dX1,dX3
171 VST2 {dY0,dY1},[pDst],outPointStep
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| H A D | armSP_FFTInv_CCSToR_S16_preTwiddleRadix2_unsafe_s.S | 78 #define dY1 D3.S16 define
152 VHSUB dY1,dX0,dX1 @ [b-d | a-c]
153 VTRN dY0,dY1 @ dY0= [a-c | a+c] ;dY1= [b-d | b+d]
156 VHSUB dX0,dY0,dY1
158 VHADD dX1,dY0,dY1
160 VSUB dX0,dY0,dY1
162 VADD dX1,dY0,dY1
272 VHSUB dY1,dX0,dX1 @ [b-d | a-c]
273 VTRN dY0,dY1
[all...] |
| H A D | omxSP_FFTInv_CCSToR_F32_Sfs_s.S | 101 #define dY1 D3.F32 define
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| H A D | omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 125 #define dY1 d11.f32 define
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| H A D | omxSP_FFTInv_CCSToR_S32_Sfs_s.S | 118 #define dY1 D3.S32 define
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| H A D | omxSP_FFTFwd_RToCCS_S16_Sfs_s.S | 141 #define dY1 d11.s16 define
487 VQDMULH dY1,dW1r,dT3
496 VRHADD dX1r, dY0, dY1
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| H A D | omxSP_FFTFwd_RToCCS_S32_Sfs_s.S | 139 #define dY1 d11.s32 define
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| H A D | omxSP_FFTInv_CCSToR_S16_Sfs_s.S | 91 #define dY1 D3.S32 define
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| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
| H A D | armSP_FFT_CToC_FC32_Radix2_fs_s.S | 73 #define dY1 v3.2s define
109 fsub dY1,dX0,dX1
113 ST1 {dY1},[pDst],dstStep
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| H A D | armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S | 80 #define dY1 v3.2s define
142 fsub dY1,dX0,dX1 // [b-d | a-c]
144 fmul dY1, dY1, half[0]
146 // dY0= [a-c | a+c] ;dY1= [b-d | b+d]
147 // VZIP dY0,dY1
148 zip1 dZip,dY0,dY1
149 zip2 dY1,dY0,dY1
152 fsub dX0,dY0,dY1
[all...] |
| H A D | armSP_FFT_CToC_FC32_Radix2_s.S | 78 #define dY1 v7.2s define
153 fsub dY1,dX1,qT1
157 st2 {dY0,dY1},[pDst],outPointStep
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