Searched refs:HI (Results 1 - 25 of 99) sorted by relevance

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/external/valgrind/main/none/tests/mips64/
H A Dmacro_int.h53 unsigned long long HI; \
63 : "=r" (HI), "=r" (LO) \
67 printf("%s :: rs 0x%llx, rt 0x%llx, HI 0x%llx, LO 0x%llx\n", \
68 instruction, (long long) RSval, (long long) RTval, HI, LO); \
73 unsigned long long HI; \
83 : "=r" (HI), "=r" (LO) \
87 printf("%s :: rs 0x%llx, rt 0x%llx, HI 0x%llx, LO 0x%llx\n", \
88 instruction, (long long) RSval, (long long) RTval, HI, LO); \
/external/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfAccelTable.cpp146 for (HashList::const_iterator HI = Buckets[i].begin(),
148 HI != HE; ++HI) {
150 Asm->EmitInt32((*HI)->HashValue);
161 for (HashList::const_iterator HI = Buckets[i].begin(),
163 HI != HE; ++HI) {
167 MCSymbolRefExpr::Create((*HI)->Sym, Context),
180 for (HashList::const_iterator HI = Buckets[i].begin(),
182 HI !
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H A DAsmPrinter.cpp372 for (const HandlerInfo &HI : Handlers) {
373 NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled);
374 HI.Handler->setSymbolSize(GVSym, Size);
546 for (const HandlerInfo &HI : Handlers) {
547 NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled);
548 HI.Handler->beginFunction(MF);
760 for (const HandlerInfo &HI : Handlers) {
761 NamedRegionTimer T(HI
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/external/pcre/dist/sljit/
H A DsljitNativePPC_common.c129 #define HI(opcode) ((opcode) << 26) macro
132 #define ADD (HI(31) | LO(266))
133 #define ADDC (HI(31) | LO(10))
134 #define ADDE (HI(31) | LO(138))
135 #define ADDI (HI(14))
136 #define ADDIC (HI(13))
137 #define ADDIS (HI(15))
138 #define ADDME (HI(31) | LO(234))
139 #define AND (HI(31) | LO(28))
140 #define ANDI (HI(2
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H A DsljitNativeMIPS_common.c93 #define HI(opcode) ((opcode) << 26) macro
98 #define ABS_S (HI(17) | FMT_S | LO(5))
99 #define ADD_S (HI(17) | FMT_S | LO(0))
100 #define ADDIU (HI(9))
101 #define ADDU (HI(0) | LO(33))
102 #define AND (HI(0) | LO(36))
103 #define ANDI (HI(12))
104 #define B (HI(4))
105 #define BAL (HI(1) | (17 << 16))
106 #define BC1F (HI(1
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/external/qemu/distrib/sdl-1.2.15/src/video/
H A DSDL_blit_1.c71 #define HI 1 macro
74 #define HI 0 macro
124 (map[src[HI]]<<16)|(map[src[LO]]);
128 (map[src[HI]]<<16)|(map[src[LO]]);
139 (map[src[HI]]<<16)|(map[src[LO]]);
156 (map[src[HI]]<<16)|(map[src[LO]]);
160 (map[src[HI]]<<16)|(map[src[LO]]);
171 (map[src[HI]]<<16)|(map[src[LO]]);
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h38 HI, // Unsigned higher Greater than, or unordered enumerator in enum:llvm::ARMCC::CondCodes
58 case HI: return LS;
59 case LS: return HI;
78 case ARMCC::HI: return "hi";
/external/aac/libSBRenc/src/
H A Dsbr_def.h155 #define HI 1 macro
H A Dsbr_encoder.cpp638 if (hSbrElement->sbrConfigData.freqBandTable[HI])
639 FreeRam_Sbr_freqBandTableHI(&hSbrElement->sbrConfigData.freqBandTable[HI]);
737 sbrConfigData->freqBandTable[HI],
738 &sbrConfigData->nSfb[HI],
750 sbrConfigData->freqBandTable[HI],
751 sbrConfigData->nSfb[HI]
780 sbrConfigData->freqBandTable[HI][0],
790 hEnv->sbrCodeNoiseFloor.nSfb[HI] = hEnv->TonCorr.sbrNoiseFloorEstimate.noNoiseBands;
793 hEnv->sbrCodeEnvelope.nSfb[HI] = sbrConfigData->nSfb[HI];
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H A Dton_corr.cpp781 nSfb[HI],
849 nSfb[HI]))
/external/llvm/lib/Target/NVPTX/
H A DNVPTX.h166 HI, enumerator in enum:llvm::NVPTX::PTXCmpMode::CmpMode
/external/clang/test/Sema/
H A Dattr-mode.c8 typedef int i16_1 __attribute((mode(HI)));
/external/chromium_org/third_party/boringssl/linux-arm/crypto/sha/
H A Dsha512-armv4.S5 # define HI 4
8 # define HI 0
80 ldr r8,[r0,#32+HI]
82 ldr r10, [r0,#48+HI]
84 ldr r12, [r0,#56+HI]
91 ldr r6,[r0,#0+HI]
93 ldr r4,[r0,#8+HI]
95 ldr r10, [r0,#16+HI]
97 ldr r12, [r0,#24+HI]
105 ldr r4,[r0,#40+HI]
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/external/openssl/crypto/sha/asm/
H A Dsha512-armv4.S4 # define HI 4
7 # define HI 0
78 ldr r8,[r0,#32+HI]
80 ldr r10, [r0,#48+HI]
82 ldr r12, [r0,#56+HI]
89 ldr r6,[r0,#0+HI]
91 ldr r4,[r0,#8+HI]
93 ldr r10, [r0,#16+HI]
95 ldr r12, [r0,#24+HI]
103 ldr r4,[r0,#40+HI]
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H A Dsha512-armv4.pl37 $hi="HI";
77 @ HI hi>>14^lo<<18 ^ hi>>18^lo<<14 ^ lo>>9^hi<<23
132 @ HI hi>>28^lo<<4 ^ lo>>2^hi<<30 ^ lo>>7^hi<<25
169 # define HI 4
172 # define HI 0
307 @ HI hi>>1^lo<<31 ^ hi>>8^lo<<24 ^ hi>>7
324 @ HI hi>>19^lo<<13 ^ lo>>29^hi<<3 ^ hi>>6
/external/llvm/lib/Target/Hexagon/
H A DHexagonSplitConst32AndConst64.cpp1 //=== HexagonSplitConst32AndConst64.cpp - split CONST32/Const64 into HI/LO ===//
12 // appropriate LO and HI instructions. This splitting is done by this pass.
15 // register to the result of LO and HI instructions. This pass is always
95 TII->get(Hexagon::HI), DestReg).addOperand(Symbol);
/external/linux-tools-perf/perf-3.12.0/arch/hexagon/lib/
H A Dmemcpy.S229 mask.h = #HI(0x7fffffff);
242 r31.h = #HI(.Lmemcpy_return); /* set up final return pointer */
/external/valgrind/main/VEX/auxprogs/
H A Dgenoffsets.c227 GENOFFSET(MIPS32,mips32,HI);
264 GENOFFSET(MIPS64,mips64,HI);
/external/chromium_org/third_party/boringssl/src/crypto/sha/asm/
H A Dsha512-armv4.pl54 $hi="HI";
94 @ HI hi>>14^lo<<18 ^ hi>>18^lo<<14 ^ lo>>9^hi<<23
149 @ HI hi>>28^lo<<4 ^ lo>>2^hi<<30 ^ lo>>7^hi<<25
187 # define HI 4
190 # define HI 0
326 @ HI hi>>1^lo<<31 ^ hi>>8^lo<<24 ^ hi>>7
343 @ HI hi>>19^lo<<13 ^ lo>>29^hi<<3 ^ hi>>6
/external/llvm/lib/Target/NVPTX/InstPrinter/
H A DNVPTXInstPrinter.cpp183 case NVPTX::PTXCmpMode::HI:
/external/qemu/target-mips/
H A Dmachine.c15 qemu_put_betls(f, &tc->HI[i]);
162 qemu_get_betls(f, &tc->HI[i]);
H A Dop_helper.c207 return ((uint64_t)(env->active_tc.HI[0]) << 32) | (uint32_t)env->active_tc.LO[0];
213 env->active_tc.HI[0] = (int32_t)(HILO >> 32);
219 arg1 = env->active_tc.HI[0] = (int32_t)(HILO >> 32);
225 env->active_tc.HI[0] = (int32_t)(HILO >> 32);
344 muls64(&(env->active_tc.LO[0]), &(env->active_tc.HI[0]), arg1, arg2);
349 mulu64(&(env->active_tc.LO[0]), &(env->active_tc.HI[0]), arg1, arg2);
1550 return other->active_tc.HI[sel];
1552 return other->tcs[other_tc].HI[sel];
1605 other->active_tc.HI[sel] = arg1;
1607 other->tcs[other_tc].HI[se
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/external/chromium_org/v8/src/mips/
H A Dsimulator-mips.h131 // LO, HI, and pc.
133 HI, enumerator in enum:v8::internal::Simulator::Register
H A Dsimulator-mips.cc303 // t9, k1, HI.
1964 *alu_out = get_register(HI);
2510 // Instructions using HI and LO registers.
2514 set_register(HI, static_cast<int32_t>(i64hilo >> 32));
2533 set_register(HI, static_cast<int32_t>(u64hilo >> 32));
2577 set_register(HI, 0);
2580 set_register(HI, rs % rt);
2604 set_register(HI, rs_u % rt_u);
2645 // HI and LO are UNPREDICTABLE after the operation.
2647 set_register(HI, Unpredictabl
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/external/qemu-pc-bios/bochs/
H A Dconfig.guess302 SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
613 3050*:HI-UX:*:*)

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