/external/aac/libSBRdec/src/arm/ |
H A D | env_calc_arm.cpp | 128 ORR r0, r0, r4 129 ORR r0, r0, r5 136 ORR r0, r0, r4 137 ORR r0, r0, r5
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/external/libhevc/common/arm64/ |
H A D | ihevc_sao_band_offset_luma.s | 152 ORR v4.8b, v4.8b , v25.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp) 160 ORR v3.8b, v3.8b , v24.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp) 170 ORR v2.8b, v2.8b , v23.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp) 180 ORR v1.8b, v1.8b , v22.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
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H A D | ihevc_sao_band_offset_chroma.s | 176 ORR v4.8b, v4.8b , v13.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp) 184 ORR v3.8b, v3.8b , v14.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp) 194 ORR v2.8b, v2.8b , v15.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp) 203 ORR v1.8b, v1.8b , v16.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp) 250 ORR v12.8b, v12.8b , v17.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp) 258 ORR v11.8b, v11.8b , v18.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp) 268 ORR v10.8b, v10.8b , v19.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp) 278 ORR v9.8b, v9.8b , v20.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
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/external/pcre/dist/sljit/ |
H A D | sljitNativeARM_64.c | 104 #define ORR 0xaa000000 macro 451 /* A large amount of number can be constructed from ORR and MOVx, 670 return push_inst(compiler, ORR | RD(dst) | RN(TMP_ZERO) | RM(arg2)); 696 return push_inst(compiler, (ORR ^ (1 << 31)) | RD(dst) | RN(TMP_ZERO) | RM(arg2)); 743 FAIL_IF(push_inst(compiler, (ORR ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2))); 981 return push_inst(compiler, ORR | RD(arg) | RN(TMP_ZERO) | RM(TMP_REG4)); 1128 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S0) | RN(TMP_ZERO) | RM(SLJIT_R0))); 1130 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S1) | RN(TMP_ZERO) | RM(SLJIT_R1))); 1132 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S2) | RN(TMP_ZERO) | RM(SLJIT_R2))); 1231 FAIL_IF(push_inst(compiler, ORR | R [all...] |
/external/chromium_org/v8/src/arm64/ |
H A D | constants-arm64.h | 502 ORR = 0x20000000, enumerator in enum:v8::internal::LogicalOp 503 ORN = ORR | NOT, 517 ORR_w_imm = LogicalImmediateFixed | ORR, 518 ORR_x_imm = LogicalImmediateFixed | ORR | SixtyFourBits, 536 ORR_w = LogicalShiftedFixed | ORR, 537 ORR_x = LogicalShiftedFixed | ORR | SixtyFourBits,
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H A D | macro-assembler-arm64.cc | 92 case ORR: // Fall through. 108 case ORR: 431 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
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H A D | macro-assembler-arm64-inl.h | 94 LogicalMacro(rd, rn, operand, ORR);
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H A D | assembler-arm64.cc | 1215 Logical(rd, rn, operand, ORR);
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H A D | simulator-arm64.cc | 1475 case ORR: result = op1 | op2; break;
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/external/vixl/src/a64/ |
H A D | constants-a64.h | 392 ORR = 0x20000000, enumerator in enum:vixl::LogicalOp 393 ORN = ORR | NOT, 407 ORR_w_imm = LogicalImmediateFixed | ORR, 408 ORR_x_imm = LogicalImmediateFixed | ORR | SixtyFourBits, 426 ORR_w = LogicalShiftedFixed | ORR, 427 ORR_x = LogicalShiftedFixed | ORR | SixtyFourBits,
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H A D | macro-assembler-a64.cc | 92 LogicalMacro(rd, rn, operand, ORR); 146 case ORR: // Fall through. 162 case ORR: 304 LogicalImmediate(rd, AppropriateZeroRegFor(rd), n, imm_s, imm_r, ORR);
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H A D | assembler-a64.cc | 675 Logical(rd, rn, operand, ORR);
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H A D | simulator-a64.cc | 693 case ORR: result = op1 | op2; break;
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/external/chromium_org/v8/src/arm/ |
H A D | constants-arm.h | 142 ORR = 12 << 21, // Logical (inclusive) OR. enumerator in enum:v8::internal::Opcode
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H A D | assembler-arm.cc | 1460 addrmod1(cond | ORR | s, src1, dst, src2);
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H A D | simulator-arm.cc | 2431 case ORR: {
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/external/tremolo/Tremolo/ |
H A D | bitwiseARM.s | 108 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits 304 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits
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H A D | dpen.s | 146 ORR r0, r14,r10,LSL #8 @ r7 = chase = (next<<8) | r14 206 ORR r0, r14,r10,LSL #16 @ r7 = chase = (next<<16) | r14
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H A D | mdctLARM.s | 998 ORR r7, r7, r8, LSL #6 @ r7 = bitrev[bit]
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H A D | mdctARM.s | 1011 ORR r7, r7, r8, LSL #6 @ r7 = bitrev[bit]
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/external/llvm/test/MC/ARM/ |
H A D | basic-thumb-instructions.s | 448 @ ORR
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H A D | basic-arm-instructions.s | 1285 @ ORR
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H A D | v8_IT_manual.s | 265 @ ORR reg, encoding T1 269 @ ORR reg, encoding T2 (32-bit)
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H A D | basic-thumb2-instructions.s | 1624 @ ORR
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/external/llvm/test/MC/AArch64/ |
H A D | arm64-aliases.s | 25 ; ORR Rd, Rn, Rn is a MOV
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