Searched refs:ORR (Results 1 - 25 of 26) sorted by relevance

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/external/aac/libSBRdec/src/arm/
H A Denv_calc_arm.cpp128 ORR r0, r0, r4
129 ORR r0, r0, r5
136 ORR r0, r0, r4
137 ORR r0, r0, r5
/external/libhevc/common/arm64/
H A Dihevc_sao_band_offset_luma.s152 ORR v4.8b, v4.8b , v25.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
160 ORR v3.8b, v3.8b , v24.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
170 ORR v2.8b, v2.8b , v23.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp)
180 ORR v1.8b, v1.8b , v22.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
H A Dihevc_sao_band_offset_chroma.s176 ORR v4.8b, v4.8b , v13.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
184 ORR v3.8b, v3.8b , v14.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
194 ORR v2.8b, v2.8b , v15.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp)
203 ORR v1.8b, v1.8b , v16.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
250 ORR v12.8b, v12.8b , v17.8b //band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
258 ORR v11.8b, v11.8b , v18.8b //band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
268 ORR v10.8b, v10.8b , v19.8b //band_table.val[1] = vorr_u8(band_table.val[1], au1_cmp)
278 ORR v9.8b, v9.8b , v20.8b //band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
/external/pcre/dist/sljit/
H A DsljitNativeARM_64.c104 #define ORR 0xaa000000 macro
451 /* A large amount of number can be constructed from ORR and MOVx,
670 return push_inst(compiler, ORR | RD(dst) | RN(TMP_ZERO) | RM(arg2));
696 return push_inst(compiler, (ORR ^ (1 << 31)) | RD(dst) | RN(TMP_ZERO) | RM(arg2));
743 FAIL_IF(push_inst(compiler, (ORR ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2)));
981 return push_inst(compiler, ORR | RD(arg) | RN(TMP_ZERO) | RM(TMP_REG4));
1128 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S0) | RN(TMP_ZERO) | RM(SLJIT_R0)));
1130 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S1) | RN(TMP_ZERO) | RM(SLJIT_R1)));
1132 FAIL_IF(push_inst(compiler, ORR | RD(SLJIT_S2) | RN(TMP_ZERO) | RM(SLJIT_R2)));
1231 FAIL_IF(push_inst(compiler, ORR | R
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/external/chromium_org/v8/src/arm64/
H A Dconstants-arm64.h502 ORR = 0x20000000, enumerator in enum:v8::internal::LogicalOp
503 ORN = ORR | NOT,
517 ORR_w_imm = LogicalImmediateFixed | ORR,
518 ORR_x_imm = LogicalImmediateFixed | ORR | SixtyFourBits,
536 ORR_w = LogicalShiftedFixed | ORR,
537 ORR_x = LogicalShiftedFixed | ORR | SixtyFourBits,
H A Dmacro-assembler-arm64.cc92 case ORR: // Fall through.
108 case ORR:
431 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
H A Dmacro-assembler-arm64-inl.h94 LogicalMacro(rd, rn, operand, ORR);
H A Dassembler-arm64.cc1215 Logical(rd, rn, operand, ORR);
H A Dsimulator-arm64.cc1475 case ORR: result = op1 | op2; break;
/external/vixl/src/a64/
H A Dconstants-a64.h392 ORR = 0x20000000, enumerator in enum:vixl::LogicalOp
393 ORN = ORR | NOT,
407 ORR_w_imm = LogicalImmediateFixed | ORR,
408 ORR_x_imm = LogicalImmediateFixed | ORR | SixtyFourBits,
426 ORR_w = LogicalShiftedFixed | ORR,
427 ORR_x = LogicalShiftedFixed | ORR | SixtyFourBits,
H A Dmacro-assembler-a64.cc92 LogicalMacro(rd, rn, operand, ORR);
146 case ORR: // Fall through.
162 case ORR:
304 LogicalImmediate(rd, AppropriateZeroRegFor(rd), n, imm_s, imm_r, ORR);
H A Dassembler-a64.cc675 Logical(rd, rn, operand, ORR);
H A Dsimulator-a64.cc693 case ORR: result = op1 | op2; break;
/external/chromium_org/v8/src/arm/
H A Dconstants-arm.h142 ORR = 12 << 21, // Logical (inclusive) OR. enumerator in enum:v8::internal::Opcode
H A Dassembler-arm.cc1460 addrmod1(cond | ORR | s, src1, dst, src2);
H A Dsimulator-arm.cc2431 case ORR: {
/external/tremolo/Tremolo/
H A DbitwiseARM.s108 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits
304 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits
H A Ddpen.s146 ORR r0, r14,r10,LSL #8 @ r7 = chase = (next<<8) | r14
206 ORR r0, r14,r10,LSL #16 @ r7 = chase = (next<<16) | r14
H A DmdctLARM.s998 ORR r7, r7, r8, LSL #6 @ r7 = bitrev[bit]
H A DmdctARM.s1011 ORR r7, r7, r8, LSL #6 @ r7 = bitrev[bit]
/external/llvm/test/MC/ARM/
H A Dbasic-thumb-instructions.s448 @ ORR
H A Dbasic-arm-instructions.s1285 @ ORR
H A Dv8_IT_manual.s265 @ ORR reg, encoding T1
269 @ ORR reg, encoding T2 (32-bit)
H A Dbasic-thumb2-instructions.s1624 @ ORR
/external/llvm/test/MC/AArch64/
H A Darm64-aliases.s25 ; ORR Rd, Rn, Rn is a MOV

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