| /external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
| H A D | sse_xform3.S | 77 MOVAPS ( REGOFF(0, EDX), XMM0 ) /* m0 | m1 | m2 | m3 */
92 MULPS ( XMM0, XMM4 ) /* m3*ox | m2*ox | m1*ox | m0*ox */
150 MOVLPS ( S(0), XMM0 )
151 MOVLPS ( XMM0, D(0) )
152 MOVSS ( S(2), XMM0 )
153 MOVSS ( XMM0, D(2) )
201 XORPS( XMM0, XMM0 ) /* clean the working register */
214 MOVLPS ( S(0), XMM0 ) /* - | - | s1 | s0 */
215 MULPS ( XMM1, XMM0 ) /*
[all...] |
| H A D | sse_normal.S | 79 MOVSS ( ARG_SCALE, XMM0 ) /* scale */
80 SHUFPS ( CONST(0x0), XMM0, XMM0 ) /* scale | scale */
81 MULPS ( XMM0, XMM1 ) /* m5*scale | m0*scale */
82 MULSS ( M(10), XMM0 ) /* m10*scale */
91 MULSS ( XMM0, XMM2 ) /* uz*m10*scale */
138 MOVSS ( M(0), XMM0 ) /* m0 */
140 UNPCKLPS( XMM1, XMM0 ) /* m4 | m0 */
145 MULPS ( XMM4, XMM0 ) /* m4*scale | m0*scale */
164 MULPS ( XMM0, XMM
[all...] |
| H A D | sse_xform4.S | 78 MOVSS( SRC(0), XMM0 ) /* ox */
79 SHUFPS( CONST(0x0), XMM0, XMM0 ) /* ox | ox | ox | ox */
80 MULPS( XMM4, XMM0 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
94 ADDPS( XMM1, XMM0 ) /* ox*m3+oy*m7 | ... */
95 ADDPS( XMM2, XMM0 ) /* ox*m3+oy*m7+oz*m11 | ... */
96 ADDPS( XMM3, XMM0 ) /* ox*m3+oy*m7+oz*m11+ow*m15 | ... */
97 MOVAPS( XMM0, DST(0) ) /* ->D(3) | ->D(2) | ->D(1) | ->D(0) */
143 MOVAPS( MAT(0), XMM0 ) /* m3 | m2 | m1 | m0 */
152 MULPS( XMM0, XMM
[all...] |
| H A D | sse_xform1.S | 77 MOVAPS( M(0), XMM0 ) /* m3 | m2 | m1 | m0 */
84 MULPS( XMM0, XMM2 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
186 MOVSS( M(0), XMM0 ) /* m0 */
194 MULSS( XMM0, XMM4 ) /* ox*m0 */
247 XORPS( XMM0, XMM0 ) /* 0 | 0 | 0 | 0 */
258 MOVSS( XMM0, D(1) )
259 MOVSS( XMM0, D(3) )
305 MOVLPS( M(0), XMM0 ) /* m1 | m0 */
312 MULPS( XMM0, XMM
[all...] |
| H A D | common_x86_asm.S | 168 XORPS ( XMM0, XMM0 )
197 XORPS ( XMM0, XMM0 )
206 DIVPS ( XMM0, XMM1 )
|
| H A D | sse_xform2.S | 76 MOVAPS( M(0), XMM0 ) /* m3 | m2 | m1 | m0 */
84 MULPS( XMM0, XMM3 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
189 XORPS( XMM0, XMM0 ) /* clean the working register */
200 MOVLPS ( S(0), XMM0 ) /* - | - | oy | ox */
201 MULPS ( XMM1, XMM0 ) /* - | - | oy*m5 | ox*m0 */
202 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
203 MOVLPS ( XMM0, D(0) ) /* -> D(1) | -> D(0) */
255 XORPS ( XMM0, XMM0 ) /*
[all...] |
| H A D | assyntax.h | 224 #define XMM0 %xmm0 macro
|
| /external/mesa3d/src/mesa/x86/ |
| H A D | sse_xform3.S | 77 MOVAPS ( REGOFF(0, EDX), XMM0 ) /* m0 | m1 | m2 | m3 */
92 MULPS ( XMM0, XMM4 ) /* m3*ox | m2*ox | m1*ox | m0*ox */
150 MOVLPS ( S(0), XMM0 )
151 MOVLPS ( XMM0, D(0) )
152 MOVSS ( S(2), XMM0 )
153 MOVSS ( XMM0, D(2) )
201 XORPS( XMM0, XMM0 ) /* clean the working register */
214 MOVLPS ( S(0), XMM0 ) /* - | - | s1 | s0 */
215 MULPS ( XMM1, XMM0 ) /*
[all...] |
| H A D | sse_normal.S | 79 MOVSS ( ARG_SCALE, XMM0 ) /* scale */
80 SHUFPS ( CONST(0x0), XMM0, XMM0 ) /* scale | scale */
81 MULPS ( XMM0, XMM1 ) /* m5*scale | m0*scale */
82 MULSS ( M(10), XMM0 ) /* m10*scale */
91 MULSS ( XMM0, XMM2 ) /* uz*m10*scale */
138 MOVSS ( M(0), XMM0 ) /* m0 */
140 UNPCKLPS( XMM1, XMM0 ) /* m4 | m0 */
145 MULPS ( XMM4, XMM0 ) /* m4*scale | m0*scale */
164 MULPS ( XMM0, XMM
[all...] |
| H A D | sse_xform4.S | 78 MOVSS( SRC(0), XMM0 ) /* ox */
79 SHUFPS( CONST(0x0), XMM0, XMM0 ) /* ox | ox | ox | ox */
80 MULPS( XMM4, XMM0 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
94 ADDPS( XMM1, XMM0 ) /* ox*m3+oy*m7 | ... */
95 ADDPS( XMM2, XMM0 ) /* ox*m3+oy*m7+oz*m11 | ... */
96 ADDPS( XMM3, XMM0 ) /* ox*m3+oy*m7+oz*m11+ow*m15 | ... */
97 MOVAPS( XMM0, DST(0) ) /* ->D(3) | ->D(2) | ->D(1) | ->D(0) */
143 MOVAPS( MAT(0), XMM0 ) /* m3 | m2 | m1 | m0 */
152 MULPS( XMM0, XMM
[all...] |
| H A D | sse_xform1.S | 77 MOVAPS( M(0), XMM0 ) /* m3 | m2 | m1 | m0 */
84 MULPS( XMM0, XMM2 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
186 MOVSS( M(0), XMM0 ) /* m0 */
194 MULSS( XMM0, XMM4 ) /* ox*m0 */
247 XORPS( XMM0, XMM0 ) /* 0 | 0 | 0 | 0 */
258 MOVSS( XMM0, D(1) )
259 MOVSS( XMM0, D(3) )
305 MOVLPS( M(0), XMM0 ) /* m1 | m0 */
312 MULPS( XMM0, XMM
[all...] |
| H A D | common_x86_asm.S | 168 XORPS ( XMM0, XMM0 )
197 XORPS ( XMM0, XMM0 )
206 DIVPS ( XMM0, XMM1 )
|
| H A D | sse_xform2.S | 76 MOVAPS( M(0), XMM0 ) /* m3 | m2 | m1 | m0 */
84 MULPS( XMM0, XMM3 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
189 XORPS( XMM0, XMM0 ) /* clean the working register */
200 MOVLPS ( S(0), XMM0 ) /* - | - | oy | ox */
201 MULPS ( XMM1, XMM0 ) /* - | - | oy*m5 | ox*m0 */
202 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
203 MOVLPS ( XMM0, D(0) ) /* -> D(1) | -> D(0) */
255 XORPS ( XMM0, XMM0 ) /*
[all...] |
| H A D | assyntax.h | 224 #define XMM0 %xmm0 macro
|
| /external/qemu/target-i386/ |
| H A D | ops_sse.h | 1535 #define XMM0 (env->xmm_regs[0]) macro
1541 d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0)); \
1542 d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1)); \
1544 d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2)); \
1545 d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3)); \
1547 d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4)); \
1548 d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5)); \
1549 d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6)); \
1550 d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7)); \
1552 d->elem(8) = F(d->elem(8), s->elem(8), XMM0
[all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 235 getMemIndexReg() >= X86::XMM0 && getMemIndexReg() <= X86::XMM15;
243 getMemIndexReg() >= X86::XMM0 && getMemIndexReg() <= X86::XMM15;
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 393 for (MCRegAliasIterator AI(X86::XMM0 + n, this, true); AI.isValid(); ++AI)
708 if (Reg >= X86::XMM0 && Reg <= X86::XMM31)
709 return X86::ZMM0 + (Reg - X86::XMM0);
|
| H A D | X86FastISel.cpp | 2608 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3,
2953 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3,
|
| H A D | X86ISelLowering.cpp | 1908 VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) &&
1932 // 64-bit vector (MMX) values are returned in XMM0 / XMM1 except for v1i64
1936 if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) {
2382 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3,
2732 case X86::XMM0: ShadowReg = X86::RCX; break;
2789 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3,
16119 // which returns the values as { float, float } (in XMM0) or
16120 // { double, double } (which is returned in XMM0, XMM1).
16943 // FIXME: When we get size specific XMM0 registers, i.e. XMM0_V16I8
16975 .addReg(X86::XMM0);
[all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86Disassembler.cpp | 359 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4)));
|
| H A D | X86DisassemblerDecoder.h | 217 ENTRY(XMM0) \
|
| /external/llvm/test/MC/X86/ |
| H A D | intel-syntax.s | 73 vshufpd XMM0, XMM1, XMM2, 1
|
| /external/qemu/disas/ |
| H A D | i386.c | 446 #define XMM0 { XMM_Fixup, 0 } macro
2253 { "pblendvb", {XM, EXx, XMM0 } },
2261 { "blendvps", {XM, EXx, XMM0 } },
2269 { "blendvpd", { XM, EXx, XMM0 } },
|
| /external/valgrind/main/memcheck/ |
| H A D | mc_machine.c | 742 if (o >= GOF(XMM0) && o+sz <= GOF(XMM0)+SZB(XMM0)) return GOF(XMM0);
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
| H A D | avx.asm | 1295 ; implicit XMM0 cannot be VEX encoded
|