/external/linux-tools-perf/perf-3.12.0/arch/arm/lib/ |
H A D | memcpy.S | 23 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort 24 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4} 27 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 28 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8} 39 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 40 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
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/external/pixman/pixman/ |
H A D | pixman-android-neon.S | 93 acc1, acc2, reg1, reg2, reg3, reg4, tmp1, tmp2 98 bilinear_load_8888 reg3, reg4, tmp2 100 vmlal.u8 acc2, reg4, d29
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H A D | pixman-arm-neon-asm-bilinear.S | 109 acc1, acc2, reg1, reg2, reg3, reg4, tmp1, tmp2 114 bilinear_load_8888 reg3, reg4, tmp2 116 vmlal.u8 acc2, reg4, d29 130 acc1, acc2, reg1, reg2, reg3, reg4, acc2lo, acc2hi 144 vzip.u8 reg2, reg4 145 vzip.u8 reg3, reg4 150 vmlal.u8 acc2, reg4, d29
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H A D | pixman-arm-neon-asm.h | 92 .macro pixldst4 op, elem_size, reg1, reg2, reg3, reg4, mem_operand, abits variable 94 op&.&elem_size {d®1, d®2, d®3, d®4}, [&mem_operand&, :&abits&]! 96 op&.&elem_size {d®1, d®2, d®3, d®4}, [&mem_operand&]!
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H A D | pixman-arm-neon-asm.S | 2868 acc1, acc2, reg1, reg2, reg3, reg4, tmp1, tmp2 2873 bilinear_load_8888 reg3, reg4, tmp2 2875 vmlal.u8 acc2, reg4, d29 2889 acc1, acc2, reg1, reg2, reg3, reg4, acc2lo, acc2hi 2903 vzip.u8 reg2, reg4 2904 vzip.u8 reg3, reg4 2909 vmlal.u8 acc2, reg4, d29
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/external/vixl/src/a64/ |
H A D | macro-assembler-a64.cc | 1417 const Register& reg4) { 1418 RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); 1429 const FPRegister& reg4) { 1430 RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); 1448 const Register& reg4) { 1449 RegList exclude = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); 1457 const FPRegister& reg4) { 1458 RegList excludefp = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); 1466 const CPURegister& reg4) { 1470 const CPURegister regs[] = {reg1, reg2, reg3, reg4}; [all...] |
H A D | assembler-a64.h | 284 const CPURegister& reg4 = NoReg, 298 const CPURegister& reg4 = NoCPUReg, 311 CPURegister reg4 = NoCPUReg) 312 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()), 314 VIXL_ASSERT(AreSameSizeAndType(reg1, reg2, reg3, reg4));
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H A D | macro-assembler-a64.h | 1322 const Register& reg4 = NoReg); 1326 const FPRegister& reg4 = NoFPReg); 1336 const Register& reg4 = NoReg); 1340 const FPRegister& reg4 = NoFPReg); 1344 const CPURegister& reg4 = NoCPUReg);
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H A D | assembler-a64.cc | 2246 const CPURegister& reg3, const CPURegister& reg4, 2255 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; 2283 const CPURegister& reg3, const CPURegister& reg4, 2290 match &= !reg4.IsValid() || reg4.IsSameSizeAndType(reg1); 2245 AreAliased(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument 2282 AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument
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/external/chromium_org/third_party/skia/gm/ |
H A D | bitmaprect.cpp | 255 static skiagm::GMRegistry reg4(MyFactory4);
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H A D | glyph_pos.cpp | 199 static GMRegistry reg4(GlyphPosStrokeFactory);
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H A D | gradients.cpp | 453 static GMRegistry reg4(MyFactory4);
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/external/skia/gm/ |
H A D | bitmaprect.cpp | 248 static skiagm::GMRegistry reg4(MyFactory4);
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H A D | gradients.cpp | 457 static GMRegistry reg4(MyFactory4);
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/external/chromium_org/v8/src/arm64/ |
H A D | assembler-arm64.h | 413 Register reg4 = NoReg); 421 const CPURegister& reg4 = NoReg, 434 const CPURegister& reg4 = NoCPUReg, 451 CPURegister reg4 = NoCPUReg) 452 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()), 454 DCHECK(AreSameSizeAndType(reg1, reg2, reg3, reg4));
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H A D | assembler-arm64.cc | 207 Register reg3, Register reg4) { 208 CPURegList regs(reg1, reg2, reg3, reg4); 220 const CPURegister& reg3, const CPURegister& reg4, 229 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; 257 const CPURegister& reg3, const CPURegister& reg4, 264 match &= !reg4.IsValid() || reg4.IsSameSizeAndType(reg1); 206 GetAllocatableRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4) argument 219 AreAliased(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument 256 AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument
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/external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/ |
H A D | vp9_idct32x32_add_neon.asm | 241 DO_BUTTERFLY $regC, $regD, $regA, $regB, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4 279 vqrshrn.s32 $reg4, q10, #14 286 DO_BUTTERFLY_STD $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4 287 DO_BUTTERFLY d28, d29, d26, d27, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
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/external/libvpx/libvpx/vp9/common/arm/neon/ |
H A D | vp9_idct32x32_add_neon.asm | 241 DO_BUTTERFLY $regC, $regD, $regA, $regB, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4 279 vqrshrn.s32 $reg4, q10, #14 286 DO_BUTTERFLY_STD $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4 287 DO_BUTTERFLY d28, d29, d26, d27, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
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/external/chromium_org/v8/src/arm/ |
H A D | macro-assembler-arm.cc | 3948 Register reg4, 3955 if (reg4.is_valid()) regs |= reg4.bit(); 3999 Register reg4, 4005 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 4012 if (reg4.is_valid()) regs |= reg4.bit();
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H A D | macro-assembler-arm.h | 51 Register reg4 = no_reg, 60 Register reg4 = no_reg,
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/external/chromium_org/v8/src/mips/ |
H A D | macro-assembler-mips.h | 83 Register reg4 = no_reg, 90 Register reg4 = no_reg,
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/external/chromium_org/v8/src/mips64/ |
H A D | macro-assembler-mips64.h | 89 Register reg4 = no_reg, 96 Register reg4 = no_reg,
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/external/chromium_org/v8/src/ia32/ |
H A D | macro-assembler-ia32.cc | 3013 Register reg4, 3019 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 3026 if (reg4.is_valid()) regs |= reg4.bit(); 3010 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
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H A D | macro-assembler-ia32.h | 38 Register reg4 = no_reg,
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/external/chromium_org/v8/src/x87/ |
H A D | macro-assembler-x87.cc | 2973 Register reg4, 2979 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + 2986 if (reg4.is_valid()) regs |= reg4.bit(); 2970 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
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