Searched refs:reg_size (Results 1 - 25 of 37) sorted by relevance

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/external/vixl/src/a64/
H A Dinstructions-a64.cc43 static uint64_t RepeatBitsAcrossReg(unsigned reg_size, argument
48 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize));
50 for (unsigned i = width; i < reg_size; i *= 2) {
61 unsigned reg_size = SixtyFourBits() ? kXRegSize : kWRegSize; local
100 return RepeatBitsAcrossReg(reg_size,
H A Dsimulator-a64.cc240 int64_t Simulator::AddWithCarry(unsigned reg_size,
246 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize));
254 if (reg_size == kWRegSize) {
282 N = CalcNFlag(result, reg_size);
295 int64_t Simulator::ShiftOperand(unsigned reg_size,
302 int64_t mask = reg_size == kXRegSize ? kXRegMask : kWRegMask;
310 unsigned s_shift = kXRegSize - reg_size;
316 if (reg_size == kWRegSize) {
321 (reg_size
589 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
620 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
636 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
646 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
665 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
683 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
711 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
722 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1075 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1208 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1244 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1275 unsigned reg_size = instr->SixtyFourBits() ? kXRegSize : kWRegSize; local
1329 unsigned reg_size = (instr->SixtyFourBits() != 0) ? kXRegSize local
1526 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSize : kSRegSize; local
1548 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSize : kSRegSize; local
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H A Dassembler-a64.h932 unsigned reg_size = rd.size();
933 VIXL_ASSERT(shift < reg_size);
934 ubfm(rd, rn, (reg_size - shift) % reg_size, reg_size - shift - 1);
1513 static inline Instr ImmS(unsigned imms, unsigned reg_size) {
1514 VIXL_ASSERT(((reg_size == kXRegSize) && is_uint6(imms)) ||
1515 ((reg_size == kWRegSize) && is_uint5(imms)));
1516 USE(reg_size);
1520 static inline Instr ImmR(unsigned immr, unsigned reg_size) {
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H A Ddisasm-a64.h85 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
H A Dmacro-assembler-a64.cc128 unsigned reg_size = rd.size(); local
177 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
291 unsigned reg_size = rd.size(); local
293 if (IsImmMovz(imm, reg_size) && !rd.IsSP()) {
297 } else if (IsImmMovn(imm, reg_size) && !rd.IsSP()) {
301 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) {
315 if (CountClearHalfWords(~imm, reg_size) >
316 CountClearHalfWords(imm, reg_size)) {
328 VIXL_ASSERT((reg_size % 16) == 0);
358 unsigned MacroAssembler::CountClearHalfWords(uint64_t imm, unsigned reg_size) { argument
373 IsImmMovz(uint64_t imm, unsigned reg_size) argument
381 IsImmMovn(uint64_t imm, unsigned reg_size) argument
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H A Ddisasm-a64.cc242 unsigned reg_size = (instr->SixtyFourBits() != 0) ? kXRegSize local
244 if (rn_is_zr && !IsMovzMovnImm(reg_size, instr->ImmLogical())) {
267 bool Disassembler::IsMovzMovnImm(unsigned reg_size, uint64_t value) { argument
268 VIXL_ASSERT((reg_size == kXRegSize) ||
269 ((reg_size == kWRegSize) && (value <= 0xffffffff)));
280 if ((reg_size == kXRegSize) &&
287 if ((reg_size == kWRegSize) &&
1492 unsigned reg_size = (instr->SixtyFourBits() != 0) ? kXRegSize : kWRegSize; local
1493 AppendToOutput("#%d", reg_size - r);
H A Dsimulator-a64.h478 int64_t AddWithCarry(unsigned reg_size,
507 int64_t ShiftOperand(unsigned reg_size,
626 static inline int CalcNFlag(uint64_t result, unsigned reg_size) {
627 return (result >> (reg_size - 1)) & 1;
H A Dmacro-assembler-a64.h187 bool IsImmMovz(uint64_t imm, unsigned reg_size);
188 bool IsImmMovn(uint64_t imm, unsigned reg_size);
189 unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size);
264 void PushSizeRegList(RegList registers, unsigned reg_size, argument
266 PushCPURegList(CPURegList(type, reg_size, registers));
268 void PopSizeRegList(RegList registers, unsigned reg_size, argument
270 PopCPURegList(CPURegList(type, reg_size, registers));
H A Dassembler-a64.cc1651 unsigned reg_size = rd.size(); local
1664 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
1686 unsigned reg_size = rd.size(); local
1688 Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) |
1689 ImmSetBits(imm_s, reg_size) | ImmRotate(imm_r, reg_size) | dest_reg |
1775 unsigned reg_size = rd.size(); local
1781 unsigned non_shift_bits = (reg_size - left_shift) & (reg_size - 1);
/external/chromium_org/v8/src/arm64/
H A Dassembler-arm64-inl.h59 return reg_size;
66 return reg_size / 8;
72 return reg_size == 32;
78 return reg_size == 64;
95 ((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits)) &&
102 ((reg_size == kSRegSizeInBits) || (reg_size == kDRegSizeInBits)) &&
110 DCHECK((reg_type != kNoRegister) || (reg_size == 0));
118 return Aliases(other) && (reg_size
1067 ImmS(unsigned imms, unsigned reg_size) argument
1075 ImmR(unsigned immr, unsigned reg_size) argument
1084 ImmSetBits(unsigned imms, unsigned reg_size) argument
1093 ImmRotate(unsigned immr, unsigned reg_size) argument
1108 BitN(unsigned bitn, unsigned reg_size) argument
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H A Dinstructions-arm64.cc77 static uint64_t RepeatBitsAcrossReg(unsigned reg_size, argument
82 DCHECK((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits));
84 for (unsigned i = width; i < reg_size; i *= 2) {
95 unsigned reg_size = SixtyFourBits() ? kXRegSizeInBits : kWRegSizeInBits; local
134 return RepeatBitsAcrossReg(reg_size,
H A Ddisasm-arm64.h66 bool IsMovzMovnImm(unsigned reg_size, uint64_t value);
H A Dassembler-arm64.h89 unsigned reg_size; member in struct:v8::internal::CPURegister
101 reg_size = 0;
107 reg_size = r.reg_size;
114 reg_size = r.reg_size;
230 reg_size = 0;
236 reg_size = r.reg_size;
243 reg_size
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H A Ddisasm-arm64.cc235 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits local
237 if (rn_is_zr && !IsMovzMovnImm(reg_size, instr->ImmLogical())) {
260 bool Disassembler::IsMovzMovnImm(unsigned reg_size, uint64_t value) { argument
261 DCHECK((reg_size == kXRegSizeInBits) ||
262 ((reg_size == kWRegSizeInBits) && (value <= 0xffffffff)));
273 if ((reg_size == kXRegSizeInBits) &&
280 if ((reg_size == kWRegSizeInBits) &&
1498 unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits local
1500 AppendToOutput("#%d", reg_size - r);
H A Dmacro-assembler-arm64.cc68 unsigned reg_size = rd.SizeInBits(); local
123 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
186 unsigned reg_size = rd.SizeInBits(); local
197 if (CountClearHalfWords(~imm, reg_size) >
198 CountClearHalfWords(imm, reg_size)) {
210 DCHECK((reg_size % 16) == 0);
320 unsigned MacroAssembler::CountClearHalfWords(uint64_t imm, unsigned reg_size) { argument
321 DCHECK((reg_size % 8) == 0);
323 for (unsigned i = 0; i < (reg_size / 16); i++) {
335 bool MacroAssembler::IsImmMovz(uint64_t imm, unsigned reg_size) { argument
343 IsImmMovn(uint64_t imm, unsigned reg_size) argument
418 int reg_size = dst.SizeInBits(); local
440 int reg_size = dst.SizeInBits(); local
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H A Dmacro-assembler-arm64.h226 static bool IsImmMovn(uint64_t imm, unsigned reg_size);
227 static bool IsImmMovz(uint64_t imm, unsigned reg_size);
228 static unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size);
585 inline void PushSizeRegList(RegList registers, unsigned reg_size, argument
587 PushCPURegList(CPURegList(type, reg_size, registers));
589 inline void PopSizeRegList(RegList registers, unsigned reg_size, argument
591 PopCPURegList(CPURegList(type, reg_size, registers));
/external/vixl/test/
H A Dtest-simulator-a64.cc277 uintptr_t results, unsigned reg_size) {
278 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
292 bool double_op = reg_size == kDRegSize;
394 uintptr_t results, unsigned reg_size) {
395 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
410 bool double_op = reg_size == kDRegSize;
526 uintptr_t results, unsigned reg_size) {
527 VIXL_ASSERT((reg_size
275 Test2Op_Helper(Test2OpFPHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size) argument
392 Test3Op_Helper(Test3OpFPHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size) argument
524 TestCmp_Helper(TestFPCmpHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size) argument
650 TestCmpZero_Helper(TestFPCmpZeroHelper_t helper, uintptr_t inputs, unsigned inputs_length, uintptr_t results, unsigned reg_size) argument
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H A Dtest-utils-a64.h192 // r array will be populated with <reg_size>-sized registers,
202 int reg_size, int reg_count, RegList allowed);
206 int reg_size, int reg_count, RegList allowed);
H A Dtest-utils-a64.cc214 int reg_size, int reg_count, RegList allowed) {
221 r[i] = Register(n, reg_size);
241 int reg_size, int reg_count, RegList allowed) {
248 v[i] = FPRegister(n, reg_size);
213 PopulateRegisterArray(Register* w, Register* x, Register* r, int reg_size, int reg_count, RegList allowed) argument
240 PopulateFPRegisterArray(FPRegister* s, FPRegister* d, FPRegister* v, int reg_size, int reg_count, RegList allowed) argument
/external/chromium_org/v8/test/cctest/
H A Dtest-utils-arm64.h197 // r array will be populated with <reg_size>-sized registers,
207 int reg_size, int reg_count, RegList allowed);
211 int reg_size, int reg_count, RegList allowed);
H A Dtest-utils-arm64.cc214 int reg_size, int reg_count, RegList allowed) {
221 r[i] = Register::Create(n, reg_size);
241 int reg_size, int reg_count, RegList allowed) {
248 v[i] = FPRegister::Create(n, reg_size);
213 PopulateRegisterArray(Register* w, Register* x, Register* r, int reg_size, int reg_count, RegList allowed) argument
240 PopulateFPRegisterArray(FPRegister* s, FPRegister* d, FPRegister* v, int reg_size, int reg_count, RegList allowed) argument
/external/jemalloc/test/unit/
H A Djunk.c19 for (i = 0; i < bin_info->reg_size; i++) {
22 i, bin_info->reg_size);
/external/jemalloc/src/
H A Dstats.c86 size_t reg_size, run_size, allocated; local
105 CTL_J_GET("arenas.bin.0.size", &reg_size, size_t);
132 j, reg_size, nregs, run_size / page,
140 j, reg_size, nregs, run_size / page,
/external/qemu/
H A Dgdbstub.c1600 int ch, reg_size, type, res; local
1683 reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1684 len += reg_size;
1694 reg_size = gdb_write_register(s->g_cpu, registers, addr);
1695 len -= reg_size;
1696 registers += reg_size;
1733 reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1734 if (reg_size) {
1735 memtohex(buf, mem_buf, reg_size);
1747 reg_size
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
H A Dbrw_vs_emit.c1168 GLuint reg_size )
1174 GLuint byte_offset = arg.nr * 32 + arg.subnr + offset * reg_size;
1187 brw_MUL(p, acc, vp_address, brw_imm_uw(reg_size));
1190 brw_MUL(p, acc, suboffset(vp_address, 4), brw_imm_uw(reg_size));
1208 int reg_size = 32; local
1225 brw_MUL(p, acc, vp_address, brw_imm_uw(reg_size));
1229 brw_MUL(p, acc, suboffset(vp_address, 4), brw_imm_uw(reg_size));
1231 brw_imm_uw(byte_offset + reg_size / 2));

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