1/*
2 *  Copyright 2012 The LibYuv Project Authors. All rights reserved.
3 *
4 *  Use of this source code is governed by a BSD-style license
5 *  that can be found in the LICENSE file in the root of the source
6 *  tree. An additional intellectual property rights grant can be found
7 *  in the file PATENTS. All contributing project authors may
8 *  be found in the AUTHORS file in the root of the source tree.
9 */
10
11#include <stdio.h>
12#include <stdlib.h>
13#include <string.h>
14
15#define INCLUDE_LIBYUV_COMPARE_H_
16#include "libyuv.h"
17#include "./psnr.h"
18#include "./ssim.h"
19
20int main(int argc, const char* argv[]) {
21  int cpu_flags = TestCpuFlag(-1);
22  int has_arm = TestCpuFlag(kCpuHasARM);
23  int has_mips = TestCpuFlag(kCpuHasMIPS);
24  int has_x86 = TestCpuFlag(kCpuHasX86);
25#if defined(__i386__) || defined(__x86_64__) || \
26    defined(_M_IX86) || defined(_M_X64)
27  if (has_x86) {
28    uint32 family, model, cpu_info[4];
29    // Vendor ID:
30    // AuthenticAMD AMD processor
31    // CentaurHauls Centaur processor
32    // CyrixInstead Cyrix processor
33    // GenuineIntel Intel processor
34    // GenuineTMx86 Transmeta processor
35    // Geode by NSC National Semiconductor processor
36    // NexGenDriven NexGen processor
37    // RiseRiseRise Rise Technology processor
38    // SiS SiS SiS  SiS processor
39    // UMC UMC UMC  UMC processor
40    CpuId(0, 0, &cpu_info[0]);
41    cpu_info[0] = cpu_info[1];  // Reorder output
42    cpu_info[1] = cpu_info[3];
43    cpu_info[3] = 0;
44    printf("Cpu Vendor: %s\n", (char*)(&cpu_info[0]));
45
46    // CPU Family and Model
47    // 3:0 - Stepping
48    // 7:4 - Model
49    // 11:8 - Family
50    // 13:12 - Processor Type
51    // 19:16 - Extended Model
52    // 27:20 - Extended Family
53    CpuId(1, 0, &cpu_info[0]);
54    family = ((cpu_info[0] >> 8) & 0x0f) | ((cpu_info[0] >> 16) & 0xff0);
55    model = ((cpu_info[0] >> 4) & 0x0f) | ((cpu_info[0] >> 12) & 0xf0);
56    printf("Cpu Family %d (0x%x), Model %d (0x%x)\n", family, family,
57           model, model);
58  }
59#endif
60  printf("Cpu Flags %x\n", cpu_flags);
61  printf("Has ARM %x\n", has_arm);
62  printf("Has MIPS %x\n", has_mips);
63  printf("Has X86 %x\n", has_x86);
64  if (has_arm) {
65    int has_neon = TestCpuFlag(kCpuHasNEON);
66    printf("Has NEON %x\n", has_neon);
67  }
68  if (has_mips) {
69    int has_mips_dsp = TestCpuFlag(kCpuHasMIPS_DSP);
70    int has_mips_dspr2 = TestCpuFlag(kCpuHasMIPS_DSPR2);
71    printf("Has MIPS DSP %x\n", has_mips_dsp);
72    printf("Has MIPS DSPR2 %x\n", has_mips_dspr2);
73  }
74  if (has_x86) {
75    int has_sse2 = TestCpuFlag(kCpuHasSSE2);
76    int has_ssse3 = TestCpuFlag(kCpuHasSSSE3);
77    int has_sse41 = TestCpuFlag(kCpuHasSSE41);
78    int has_sse42 = TestCpuFlag(kCpuHasSSE42);
79    int has_avx = TestCpuFlag(kCpuHasAVX);
80    int has_avx2 = TestCpuFlag(kCpuHasAVX2);
81    int has_erms = TestCpuFlag(kCpuHasERMS);
82    int has_fma3 = TestCpuFlag(kCpuHasFMA3);
83    printf("Has SSE2 %x\n", has_sse2);
84    printf("Has SSSE3 %x\n", has_ssse3);
85    printf("Has SSE4.1 %x\n", has_sse41);
86    printf("Has SSE4.2 %x\n", has_sse42);
87    printf("Has AVX %x\n", has_avx);
88    printf("Has AVX2 %x\n", has_avx2);
89    printf("Has ERMS %x\n", has_erms);
90    printf("Has FMA3 %x\n", has_fma3);
91  }
92  return 0;
93}
94
95